Matches 501 - 550 out of 16945 < 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 >
Match Document Document Title
7312626 CMOS circuits with reduced crowbar current  
Various circuit embodiments comprise an input node to receive an input signal for a CMOS transistor stack, a first output node to deliver the input signal to a PMOS pull-up transistor of the CMOS...
7312516 Chip scale package with heat spreader  
A dense semiconductor flip-chip device assembly is provided with a heat sink/spreading/dissipating member that is formed as a paddle of a metallic paddle frame in a strip of paddle frames....
7312494 Lanthanide oxide / hafnium oxide dielectric layers  
Dielectric layers containing a hafnium oxide hafnium oxide layer arranged as one or more monolayers and a lanthanide oxide layer and a method of fabricating such a dielectric layer produce a...
7312431 CMOS imaging for ALC and CDS  
Embodiments of the invention provide pixel cells that allow both automatic light control and correlated double sampling operations. The pixel cell includes first and second photo-conversion devices...
7312164 Selective passivation of exposed silicon  
A method for applying a passivation layer selectively on an exposed silicon surface includes use of a liquid phase solution supersaturated in silicon dioxide. The application is conducted at...
7312163 Atomic layer deposition methods, and methods of forming materials over semiconductor substrates  
The invention includes methods in which at least two different precursors are flowed into a reaction chamber at different and substantially non-overlapping times relative to one another to form a...
7312159 Compositions for dissolution of low-k dielectric films, and methods of use  
An improved composition and method for cleaning the surface of a semiconductor wafer are provided. The composition can be used to selectively remove a low-k dielectric material such as silicon...
7312120 Method for obtaining extreme selectivity of metal nitrides and metal oxides  
Methods for etching metal nitrides and metal oxides include using ultradilute HF solutions and buffered, low-pH HF solutions containing a minimal amount of the hydrofluoric acid species H 2 F 2 ....
7312101 Packaged microelectronic devices and methods for packaging microelectronic devices  
Packaged microelectronic devices and methods for packaging microelectronic devices are disclosed herein. In one embodiment, a method of packaging a microelectronic device including a...
7311947 Laser assisted material deposition  
A method of forming a film on a substrate includes activating a gas precursor to form a material on the substrate by irradiating the gas precursor with electromagnetic energy at a frequency tuned...
7311942 Method for binding halide-based contaminants during formation of a titanium-based film  
A method and apparatus are presented for reducing halide-based contamination within deposited titanium-based thin films. Halide adsorbing materials are utilized within the deposition chamber to...
7310752 System and method for on-board timing margin testing of memory modules  
A memory module includes several memory devices coupled to a memory hub. The memory hub includes several link interfaces coupled to respective processors, several memory controller coupled to...
7310748 Memory hub tester interface and method for use thereof  
A memory hub including a memory test bridge circuit for testing memory devices. Test command packets are coupled from a tester to the memory hub responsive to a test clock signal having a test...
7310276 Memory device and method having data path with multiple prefetch I/O configurations  
A memory device is operable in either a high mode or a low speed mode. In either mode 32 bits of data from each of two memory arrays are prefetched into respective sets of 32 flip-flops. In the...
7310259 Access circuit and method for allowing external test voltage to be applied to isolated wells  
An access circuit selectively couples an externally accessible terminal to each of a plurality of isolated DRAM wells in which respective DRAM arrays are fabricated. The access circuit for each...
7310257 Local digit line architecture and method for memory devices having multi-bit or low capacitance memory cells  
A DRAM array includes for each column a pair of complimentary digit lines that are coupled to a sense amplifier. Each of the global digit lines is selectively coupled to a plurality of local digit...
7310252 Closed-loop high voltage booster  
A voltage boosting circuit with a closed-loop control mechanism and a controllable slew rate. A tracking capacitor and a control current form the closed-loop and are used to adjust the slew rate of...
7310018 Method and apparatus providing input buffer design using common-mode feedback  
An input buffer includes a first stage for receiving an input signal and having a first pair of complementary output signals, the first stage including an input circuit for receiving the input...
7310013 Method, apparatus, and system for low voltage temperature sensing  
A temperature sensor device and method of sensing temperature are disclosed. The device and method include generating a reference voltage inversely correlated to the temperature, generating a...
7309889 Constructions comprising perovskite-type dielectric  
The invention includes a capacitor construction. A capacitor electrode has a perovskite-type dielectric material thereover. The perovskite-type dielectric material has an edge region proximate the...
7309623 Method of fabricating a stacked die in die BGA package  
Semiconductor devices and stacked die assemblies, and methods of fabricating the devices and assemblies for increasing semiconductor device density are provided.
7309549 Method for quartz bump defect repair with less substrate damage  
A method for minimizing damage to a substrate while repairing a defect in a phase shifting mask for an integrated circuit comprising locating a bump defect in a phase shifting mask, depositing a...
7308594 Apparatus and method for generating a delayed clock signal  
An apparatus and method for generating a delayed clock signal is provided. The clock signal generator includes a synchronizing circuit for generating an output clock signal from an input clock...
7307908 Software refreshed memory device and method  
A software refreshed memory device comprises a plurality of memory cells that must be periodically refreshed to avoid losing data. Preferably, the memory cells can avoid losing data even though the...
7307901 Apparatus and method for improving dynamic refresh in a memory device  
An apparatus and method for generating a control pulse for closing an active wordline in a memory device is provided. A timeout generator circuit having a time delay portion and a reset portion may...
7307896 Detection of row-to-row shorts and other row decode defects in memory devices  
A system and method to detect row-to-row shorts and other row decode defects in memory devices and other electronic devices having a similar data storage functionality is disclosed. A selective...
7307860 Static content addressable memory cell  
A static content addressable memory (CAM) cell. The CAM cell includes a latch having complementary data nodes capacitively coupled to ground, first and second access transistors, each coupled...
7307850 Soldermask opening to prevent delamination  
A multilayer circuit board includes a base layer, a conductive layer and a soldermask. The soldermask layer has two sets of openings. One of the openings are vent openings, that expose the base...
7307788 Gapless microlens array and method of fabrication  
A microlens array having first and second sets of spherically-shaped microlenses. The second set of spherically-shaped microlenses are located in the areas between individual microlenses of the...
7307353 Technique for attaching die to leads  
A semiconductor die assembly comprising a semiconductor die with bond pads, a plurality of leads which extend across the semiconductor die and terminates over their respective bond pads, and an...
7307348 Semiconductor components having through wire interconnects (TWI)  
A semiconductor component includes a semiconductor substrate having a substrate contact, and a through wire interconnect (TWI) bonded to the substrate contact. The through wire interconnect (TWI)...
7307327 Reduced crosstalk CMOS image sensors  
CMOS image sensor having high sensitivity and low crosstalk, particularly at far-red to infrared wavelengths, and a method for fabricating a CMOS image sensor. A CMOS image sensor has a substrate,...
7307306 Etch mask and method of forming a magnetic random access memory structure  
A method for forming an MRAM bit is described that includes providing a covering layer over an integrated circuit structure. In one embodiment, the covering layer includes tantalum. A first mask...
7306991 Stepped gate configuration for non-volatile memory  
A memory device having a field effect transistor with a stepped gate dielectric and a method of making the same are herein disclosed. The stepped gate dielectric is formed on a semiconductor...
7306974 Microelectronic devices and methods for manufacturing and operating packaged microelectronic device assemblies  
Packaged microelectronic devices, methods for packaging microelectronic devices, and methods of operating microelectronic devices. In one embodiment, a packaged microelectronic device comprises a...
7306954 Process flow for building MRAM structures  
MRAM structures employ the magnetic properties of layered magnetic and non-magnetic materials to read memory storage logic states. Improvements in switching reliability may be achieved by altering...
7306506 In-situ chemical-mechanical planarization pad metrology using ultrasonic imaging  
Chemical-mechanical planarization (CMP) apparatus and methods for detecting polishing pad properties using ultrasonic imaging is presented. An ultrasonic probe assembly transmits ultrasonic signals...
7305514 Command sequence for optimized power consumption  
Power consumption by a memory device may be controlled by maintaining data input buffers in an off state until a command sequence containing a specified command is received by the memory. A...
7304638 Computer touch screen adapted to facilitate selection of features at edge of screen  
In one embodiment of the invention, a hot spot is normally centered in an area of contact between a user's finger and a touch screen to position the hot spot on an icon or other feature thereby...
7304516 Method and apparatus for digital phase generation for high frequency clock applications  
An apparatus and method for generating phase-related clocks are disclosed. A clock input is delayed by an alignment magnitude to generate a first phase signal. The first phase signal is delayed by...
7304491 Interconnect for testing semiconductor components  
An interconnect for testing semiconductor components includes interconnect contacts configured for bonding to, and then separation from component contacts on the components. The interconnect can be...
7304380 Integrated circuit cooling and insulating device and method  
A method and device for cooling an integrated circuit is provided. A method and device using a gas to cool circuit structures such as a number of air bridge structures is provided. A method and...
7304375 Castellation wafer level packaging of integrated circuit chips  
Systems and methods for packaging integrated circuit chips in castellation wafer level packaging are provided. The active circuit areas of the chips are coupled to castellation blocks and,...
7304368 Chalcogenide-based electrokinetic memory element and method of forming the same  
Memory elements including a first electrode and a second electrode. A chalcogenide material layer is between the first and second electrodes and a tin-chalcogenide layer is between the chalcogenide...
7304353 Formation of standard voltage threshold and low voltage threshold MOSFET devices  
Wells are formed in a substrate where standard Vt and low Vt devices of both a first and second type are to be fabricated. Wells defining the locations of first type standard Vt devices are masked,...
7303991 Atomic layer deposition methods  
The invention includes an atomic layer deposition method of forming a layer of a deposited composition on a substrate. The method includes positioning a semiconductor substrate within an atomic...
7303939 Electro- and electroless plating of metal in the manufacture of PCRAM devices  
Non-volatile, resistance variable memory devices, integrated circuit elements, and methods of forming such devices are provided. According to one embodiment of a method of the invention, a memory...
7303938 Gated isolation structure for imagers  
Isolation methods and devices for isolating pixels of an image sensor pixel. The isolation structure and methods include forming a biased gate over a field isolation region and adjacent a pixel of...
7303931 Microfeature workpieces having microlenses and methods of forming microlenses on microfeature workpieces  
Microfeature workpieces having microlenses and methods of forming microlenses on microfeature workpieces are disclosed herein. In one embodiment, a method for forming microlenses includes forming a...
7303637 Method of cleaning semiconductor surfaces  
Devices and methods of cleaning are described. The methods, and devices formed by the methods have a number of advantages. Embodiments are shown that include cleaning using a supercritical fluid....
Matches 501 - 550 out of 16945 < 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 >