Match Document Document Title
7321150 Semiconductor device precursor structures to a double-sided capacitor or a contact  
A method of forming a double-sided capacitor using at least one sacrificial structure, such as a sacrificial liner or a sacrificial plug. A sacrificial liner is formed along sidewalls of at least...
7321149 Capacitor structures, and DRAM arrays  
A patterned mask can be formed as follows. A first patterned photoresist is formed over a masking layer and utilized during a first etch into the masking layer. The first etch extends to a depth in...
7321148 Capacitor constructions and rugged silicon-containing surfaces  
The invention encompasses a method of forming a rugged silicon-containing surface. A layer comprising amorphous silicon is provided within a reaction chamber at a first temperature. The temperature...
7320933 Double bumping of flexible substrate for first and second level interconnects  
An apparatus and method for improving the yield and reducing the cost of forming a semiconductor device assembly. An interposer substrate is formed with interconnections in the form of conductive...
7320911 Methods of forming pluralities of capacitors  
A method of forming a plurality of capacitors includes providing a plurality of capacitor electrodes comprising sidewalls. The plurality of capacitor electrodes are supported at least in part with...
7320049 Detection circuit for mixed asynchronous and synchronous memory operation  
A memory access mode detection circuit and method for detecting and initiating memory access modes for a memory device The memory access mode detection circuit receives the memory address signals,...
7319935 System and method for analyzing electrical failure data  
A system and method to perform analysis on test results of multiple integrated circuits. Based on the analysis, the system and method display a wafer map having map indicators representing...
7319728 Delay locked loop with frequency control  
A delay locked loop includes a delay line for delaying an input signal generated from an external signal. A delay controller controls the delay line to keep the external and internal signals...
7319629 Method of operating a dynamic random access memory cell  
A method of operating a dynamic random access memory cell is disclosed. The true logic state of a stored bit is rewritten to a first storage node of the memory cell and the complementary logic...
7319621 Reducing DQ pin capacitance in a memory device  
A system and method to operate an electronic device, such as a memory chip, with a data driver circuit that is configured to reduce data pin (DQ) capacitance. In a driver circuit that is comprised...
7319620 Input and output buffers having symmetrical operating characteristics and immunity from voltage variations  
A pair of self-biased differential amplifiers having a non-symmetrical topology are combined to provide a self-biased differential amplifier having a symmetrical topology. Each of the combined...
7319613 NROM flash memory cell with integrated DRAM  
A memory device that is comprised of a dynamic random access memory (DRAM) capacitor and a nitride read only memory (NROM) transistor. The memory device provides multiple modes of operation...
7319605 Conductive structure for microelectronic devices and methods of fabricating such structures  
A conductive structure for gate lines and local interconnects in microelectronic devices. The conductive structure can be used in memory cells for SRAM devices or other types of products. The...
7319340 Integrated circuit load board and method having on-board test circuit  
An integrated circuit load board includes a substrate on which a plurality of integrated circuit sockets and an integrated test circuit are mounted. The integrated test circuit generates test...
7319273 Methods and apparatus for a flexible circuit interposer  
A flexible circuit interposer includes a flexible circuit substrate which allows in-situ probing of an attached device during, for example, circuit debugging, assembly qualification, and the like....
7319218 Method and apparatus for pixel signal binning and interpolation in column circuits of a sensor circuit  
A binning circuit and related method, wherein pixel signals from column circuits in a sensor circuit are sampled and interpolated. The binning circuit samples analog pixel and reset signals from...
7319075 Etchant with selectivity for doped silicon dioxide over undoped silicon dioxide and silicon nitride, processes which employ the etchant, and structures formed thereby  
A selective dry etch process includes use of an etchant that includes C 2 H x F y , where x is an integer from three to five, inclusive, where y is an integer from one to three, inclusive, and...
7319071 Methods for forming a metallic damascene structure  
In damascene process integration, a reducing plasma is applied after the etch stop or barrier layer is opened over a copper layer. Currently known methods for opening barrier layers suffer from the...
7318204 Synthesizing semiconductor process flow models  
Systems and methods of modeling a best-guess semiconductor process flow for fabricating a desired semiconductor device are provided. The best-guess process flow is modeled using an inverse modeling...
7318181 ROM-based controller monitor in a memory device  
A circuit to monitor the activity of a memory device during program/erase operations that are managed by a ROM-based microcontroller. Different signals can be monitored according to different test...
7318167 DDR II write data capture calibration  
A calibration circuit for calibrating the input data path of a digital circuit is disclosed. A simple string of a repeating data pattern such as, e.g., “1100,” is sent on the data path. The...
7318146 Peripheral device with hardware linked list  
A linked list is implemented in hardware. Various registers within the linked list are writeable until a control register is written, rendering the registers read-only. A computer peripheral...
7317647 Noise suppression in memory device sensing  
NAND memory devices utilize sensing devices for sensing a programmed state of a nonvolatile memory cell or writing a data value to a nonvolatile memory cell. Latches in sensing devices are...
7317635 User configurable commands for flash memory  
A memory device includes a plurality of memory dies, each having an assigned address. A register on each die is reset on power-up. Boot data is loaded as part of the initialization routine. If the...
7317579 Method and apparatus providing graded-index microlenses  
Microlenses are fabricated with a refractive-index gradient. The refractive-index gradient is produced in a microlens material such that the refractive index is relatively higher in the material...
7317567 Method and apparatus for providing color changing thin film material  
An electrochromic device and methods for forming the same are provided. The device includes first and second electrodes. A layer of (Ge x Se 100-x ) 100-y Mn y is between the first and second...
7317521 Particle detection method  
A method for detecting on a substrate used in the fabrication of integrated devices comprises the steps of (1) contacting the substrate with a monomer, wherein the particle catalyzes the...
7317480 Imaging apparatus providing black level compensation of a successive approximation A/D converter  
Image sensor with a successive approximation A/D converter that automatically compensates for black level and provides a signal indicative of the difference between the reset level and the signal...
7317446 Method for entering data into a computer using a peripheral input device having a retractable cord  
The invention, in one embodiment, is a method for entering data into a computer. The method includes anchoring an electrical cord connecting a peripheral input device to the computer, positioning...
7317322 Interconnect for bumped semiconductor components  
An interconnect for testing semiconductor components includes a substrate, and contacts on the substrate for making temporary electrical connections with bumped contacts on the components. Each...
7317220 Even nucleation between silicon and oxide surfaces for thin silicon nitride film growth  
A semiconductor assembly providing even nucleation between silicon and oxide surfaces for growing uniformly thin silicon nitride layers used in semiconductor devices is disclosed. First, a...
7317200 SnSe-based limited reprogrammable cell  
Methods and apparatus for providing a memory device that can be programmed a limited number of times. According to exemplary embodiments, a memory device and its method of formation provide a first...
7316981 Method of removing silicon from a substrate  
A wet etching method of removing silicon from a substrate includes depositing a layer comprising silicon in elemental form over a substrate. The layer is exposed to an aqueous liquid etching...
7316063 Methods of fabricating substrates including at least one conductive via  
A method of fabricating a substrate is disclosed. Apertures are formed in a substrate blank. A conductive layer is formed on opposing surfaces of the substrate, as well as inside the apertures....
7315522 Communication methods using slotted replies  
An RFID tag population is selected by an interrogator. Each tag of the selected tag population then responds to the interrogator in accordance with a slotted arbitration scheme. According to the...
7315476 System and method for communicating information to a memory device using a reconfigured device pin  
System and method for communicating information to and from memory devices. In one embodiment, the invention includes a memory system having a memory device having at least one extraneous device...
7315179 System for isolating a short-circuited integrated circuit (IC) from other ICs on a semiconductor wafer  
A circuit for isolating a short-circuited integrated circuit (IC) formed on the surface of a semiconductor wafer from other ICs formed on the wafer that are interconnected with the short-circuited...
7315082 Semiconductor device having integrated circuit contact  
A process for forming vertical contacts in the manufacture of integrated circuits, and devices so manufactured, is disclosed. The process eliminates the need for precise mask alignment and allows...
7315074 Use of DAR coating to modulate the efficiency of laser fuse blows  
The present invention relates to a laser fuse. The laser fuse comprises an element comprising a heat conductive material. The fuse also includes an absorption element comprising a material with an...
7315014 Image sensors with optical trench  
A device and method for providing an optical trench structure for a pixel which guides incoming light onto the photosensor of the pixel. The optical trench structure has an optically reflecting...
7314837 Chemical treatment of semiconductor substrates  
A method is disclosed for removing liquids from a semiconductor substrate by contacting the liquid on the substrate with a liquid which attracts the liquid on the substrate, separating the liquids...
7314822 Method of fabricating stacked local interconnect structure  
A method is provided for forming stacked local interconnects that do not extend into higher levels within a multilevel IC device, thereby economizing space available within the IC device and...
7314821 Method for fabricating a semiconductor interconnect having conductive spring contacts  
An interconnect for testing a semiconductor component includes a substrate, and interconnect contacts on the substrate configured to electrically engage component contacts on a semiconductor...
7314812 Method for reducing the effective thickness of gate oxides by nitrogen implantation and anneal  
A method for reducing the effective thickness of a gate oxide using nitrogen implantation and anneal subsequent to dopant implantation and activation is provided. More particularly, the present...
7314401 Methods and systems for conditioning planarizing pads used in planarizing substrates  
Monitoring the process of planarizing a workpiece, e.g., conditioning a CMP pad, can present some difficulties. Aspects of this invention provide methods and systems for monitoring and/or...
7313826 Connected support entitlement system method of operation  
An entitlement system and method for computers allowing controlled access to operating systems, software applications, data, or hardware for a computer system. More particularly, the entitlement...
7313644 Memory device interface  
An interface device provided on a motherboard, or with a memory control chip set, translates between a controller, intended to communicate with a packet based memory system, and a non-packet based...
7313273 Automatic color constancy for image sensors  
An electronic imaging system operates as closely as possible to the cone spectral response space to obtain a human eye-like long, medium, short (LMS) wavelength response. An input image, for...
7313034 Low supply voltage temperature compensated reference voltage generator and method  
A reference voltage generator uses a conventional forward junction voltage generating device and a conventional thermal generator to generate a thermal voltage. The forward junction voltage and the...
7312857 Method and system for monitoring plasma using optical emission spectrometry  
A method and system are presented for monitoring the optical emissions associated with a plasma used in integrated circuit fabrication. The optical emissions may be processed by an optical...