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US20090293039 |
METHOD FOR MANUFACTURING A PHOTOMASK
A method for manufacturing a photomask based on design data includes the steps of forming a figure element group including a figure element in a layout pattern on the photomask and a figure element...
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US20090293038 |
METHOD AND CORRECTION APPARATUS FOR CORRECTING PROCESS PROXIMITY EFFECT AND COMPUTER PROGRAM PRODUCT
A process proximity effect (PPE) correction method includes providing corrected cells arranged in a place/route arrangement, the corrected cells being obtained by correcting design data of a...
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US20090293037 |
Technique for Correcting Hotspots in Mask Patterns and Write Patterns
Embodiments of a method for determining a mask pattern to be used on a photo-mask in a lithography process are described. This method may be performed by a computer system. During operation, this...
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US20090291547 |
Method for Reducing Plasma Discharge Damage During Processing
A semiconductor process and apparatus to provide a way to reduce plasma-induced damage by applying a patterned layer of photoresist ( 114 ) which includes resist openings formed ( 117 ) over the...
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US20090276751 |
METHOD OF PERFORMING MASK-WRITER TUNING AND OPTIMIZATION
A model-based tuning method for tuning a first mask writer unit utilizing a reference mask writer unit, each of which has tunable parameters for controlling mask writing performance. The method...
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US20090276750 |
METHOD FOR ESTABLISHING SCATTERING BAR RULE
A method for establishing a scattering bar rule for a mask pattern for fabricating a device is provided. The method is described as follows. First, at least one image simulation model is...
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US20090271759 |
CONTRAST-BASED RESOLUTION ENHANCEMENT FOR PHOTOLITHOGRAPHIC PROCESSING
A contrast-based resolution enhancing technology (RET) determines a distribution of contrast values for edge fragments in a design layout or portion thereof. Resolution enhancement is applied to...
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US20090271758 |
METHODS FOR FORMING ARRAYS OF SMALL, CLOSELY SPACED FEATURES
Methods of forming arrays of small, densely spaced holes or pillars for use in integrated circuits are disclosed. Various pattern transfer and etching steps can be used, in combination with...
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US20090271757 |
DATA CORRECTING HIERARCHICAL INTEGRATED CIRCUIT LAYOUT ACCOMMODATING COMPENSATE FOR LONG RANGE CRITICAL DIMENSION VARIATION
A solution for performing a data correction on a hierarchical integrated circuit layout is provided. A method includes: receiving a CD compensation map for the long range critical dimension...
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US20090265679 |
SYSTEM AND METHOD OF PREDICTING PROBLEMATIC AREAS FOR LITHOGRAPHY IN A CIRCUIT DESIGN
A system and method is provided which predicts problematic areas for lithography in a circuit design, and more specifically, which uses modeling data from a modeling tool to accurately predict...
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US20090249261 |
METHOD AND APPARATUS FOR OPTIMIZING AN OPTICAL PROXIMITY CORRECTION MODEL
A method includes receiving optical profiles for a plurality of design target features associated with an integrated circuit device and optical profiles for a plurality of test features. An optical...
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US20090243022 |
METHOD OF FORMING MASK FOR LITHOGRAPHY, METHOD OF FORMING MASK DATA FOR LITHOGRAPHY, METHOD OF MANUFACTURING BACK-ILLUMINATED SOLID-STATE IMAGING DEVICE, BACK-ILLUMINATED SOLID-STATE IMAGING DEVICE AND ELECTRONIC DEVICE
A method of forming a mask for lithography includes the step of forming the mask by using reverse data in which positions of at least part of output terminals are reversed, when forming the mask...
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US20090241086 |
METHOD OF MAKING PATTERN DATA, AND MEDIUM FOR STORING THE PROGRAM FOR MAKING THE PATTERN DATA
A method of making pattern data of a photomask pattern includes: the processes of adding, to each of first cells, information of the first cell higher than the first cell on the basis of a...
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US20090241085 |
SYSTEM AND METHOD FOR IMPLEMENTING OPTICAL RULE CHECKING TO IDENTIFY AND QUANTIFY CORNER ROUNDING ERRORS
A method for implementing optical rule checking to identify and quantify corner rounding errors includes receiving corner rounding data based on established ground rules; determining a simulated...
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US20090241077 |
Site Selective Optical Proximity Correction
Techniques for performing optical proximity correction on a layout design or portion thereof are provided with various implementations of the invention. With various implementations of the...
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US20090240362 |
SIMULATION MODEL CREATING METHOD, MASK DATA CREATING METHOD AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD
A simulation model creating method computes, for measurement results of a line width of a resist pattern formed with varied an exposure amount and focus value, a permissible fluctuation range of...
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US20090239177 |
MASK PATTERN DATA GENERATION METHOD, MASK MANUFACTURING METHOD, SEMICONDUCTOR DEVICE MANUFACTURING METHOD, AND PATTERN DATA GENERATION PROGRAM
According to an aspect of the present invention, there is provided a mask pattern data generation method including: a first step of obtaining a mask data representing from a design pattern by...
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US20090236665 |
SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREOF
A semiconductor device and a fabrication method thereof are provided. The semiconductor device includes a semiconductor substrate which comprise a first type well and a second type well, and a...
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US20090233187 |
Designing method of photo-mask and method of manufacturing semiconductor device using the photo-mask
In a method of designing a photo-mask, a graphic pattern as a target of development simulation is divided into a plurality of sub graphic patterns which are respectively assigned with a plurality...
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US20090228860 |
PHOTOMASK DATA PROCESSING METHOD, PHOTOMASK DATA PROCESSING SYSTEM AND MANUFACTURING METHOD
A computer-implemented method, of processing design data to obtain photomask data, includes: selecting, amongst design data, data representing a first cell; selecting a first area in said first...
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US20090222785 |
METHOD FOR SHAPE AND TIMING EQUIVALENT DIMENSION EXTRACTION
An integrated circuit (IC) design method includes providing an IC layout contour based on an IC design layout of an IC device and IC manufacturing data; generating an effective rectangle layout to...
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US20090220868 |
MASK AND DESIGN METHOD THEREOF
A mask and the design method thereof are provided. The mask includes a light-shielding area shielding off a light, wherein the light-shielding area includes a photonic crystal having a lattice...
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US20090217218 |
OPC SIMULATION MODEL USING SOCS DECOMPOSITION OF EDGE FRAGMENTS
A system for estimating image intensity within a window area of a wafer using a SOCS decomposition to determine the horizontal and vertical edge fragments that correspond to objects within the...
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US20090199150 |
Step-Walk Relaxation Method for Global Optimization of Masks
A set of candidate global optima is identified, one of which is a global solution for making a mask for printing a lithographic pattern. A solution space is formed from dominant joint eigenvectors...
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US20090193385 |
Method of checking and correcting mask pattern
The present invention provides a method of checking and correcting a mask pattern. The method includes inputting a mask pattern, wherein the mask pattern includes at least a segment; inputting a...
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US20090187877 |
MULTI-PASS, CONSTRAINED PHASE ASSIGNMENT FOR ALTERNATING PHASE-SHIFT LITHOGRAPHY
Generating two-tone phase shift photomasks that satisfy lithography and photomask constraints is accomplished using an iterative algorithm which successively identifies violations of the...
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US20090187876 |
STEINER TREE BASED APPROACH FOR POLYGON FRACTURING
Roughly described, a method for mask data preparation is described, for use with a preliminary mask layout that includes a starting polygon, the vertices of the starting polygon including I-points...
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US20090181314 |
Reverse Dummy Insertion Algorithm
A method of inserting dummy patterns includes providing a window area comprising a main pattern. The main pattern includes first patterns of a first type of features, and second patterns of a...
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US20090163011 |
MASK LAYOUT AND METHOD FOR FORMING VERTICAL CHANNEL TRANSISTOR IN SEMICONDUCTOR DEVICE USING THE SAME
A method for forming a vertical channel transistor in a semiconductor memory device includes: forming a plurality of pillars over a substrate so that the plurality of pillars are arranged in a...
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US20090162758 |
PHOTOMASK HAVING CODE PATTERN FORMED BY CODING DATA CONVERSION PROCESS INFORMATION, PHOTOMASK FORMATION METHOD, AND SEMICONDUCTOR DEVICE FABRICATION METHOD
Design data of a wafer pattern to be formed on a semiconductor wafer is converted into mask data corresponding to a mask pattern to be formed on a photomask for use in the formation of the wafer...
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US20090160027 |
Methods of Manufacturing Semiconductor Devices and Optical Proximity Correction
Methods of manufacturing semiconductor devices and methods of optical proximity correction methods are disclosed. In one embodiment, a method of manufacturing a semiconductor device includes...
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US20090155990 |
MANUFACTURING METHOD OF A SEMICONDUCTOR DEVICE AND METHOD FOR CREATING A LAYOUT THEREOF
A method for manufacturing a semiconductor device of one embodiment of the present invention includes: forming an insulation layer to be processed over a substrate; forming a first sacrificial...
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US20090150849 |
Methods for Measuring Mean-to-Target (MTT) Based on Pattern Area Measurements and Methods of Correcting Photomasks Using the Same
Methods of measuring a mean-to-target (MTT) based on pattern area measurements are provided including providing a design pattern. A plurality of design pattern measurements are measured for...
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US20090148779 |
Sub-wavelength diffractive elements to reduce corner rounding
The present invention discloses a mask including: a first region near a corner of a feature, the first region including a first element, the first element being transparent to a light, the first...
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US20090144692 |
METHOD AND APPARATUS FOR MONITORING OPTICAL PROXIMITY CORRECTION PERFORMANCE
A method includes specifying a plurality of optical proximity correction metrology sites on a wafer. Metrology data is collected from at least a subset of the metrology sites. Data values are...
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US20090144691 |
Enhanced Process Yield Using a Hot-Spot Library
The invention provides apparatus and methods for processing substrates using a hot-spot library.
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US20090137102 |
METHOD FOR MAKING QUANTUM DOTS
A method for forming at least one quantum dot at least one predetermined location on a substrate is disclosed. In one aspect, the method comprises providing a layer of semiconductor material on an...
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US20090128788 |
SYSTEM AND METHOD FOR MAKING PHOTOMASKS
The present application is directed a method for determining the position of photomask patterns in a mask making process. The method comprises providing one or more mask rules defining the minimum...
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US20090125867 |
Handling Of Flat Data For Phase Processing Including Growing Shapes Within Bins To Identify Clusters
Definition of a phase shifting layout from an original layout can be time consuming. If the original layout is divided into useful groups, i.e. clusters that can be independently processed, then...
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US20090125866 |
METHOD FOR PERFORMING PATTERN DECOMPOSITION FOR A FULL CHIP DESIGN
A method for decomposing a target pattern containing features to be printed on a wafer into multiple patterns. The method includes the steps of segmenting the target pattern into a plurality of...
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US20090125863 |
TREATMENT OF TRIM PHOTOMASK DATA FOR ALTERNATING PHASE SHIFT LITHOGRAPHY
In accordance with the invention, there is a method of designing a lithography mask. The method can comprise generating initial phase photomask data and initial trim photomask data from a first set...
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US20090123058 |
MASK PATTERN DIMENSIONAL INSPECTION APPARATUS AND METHOD
A sidewall shape correction function is determined in advance which represents the relationship of the difference between contour positions of two or more items of pattern contour position data of...
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US20090119634 |
Method and System for Implementing Controlled Breaks Between Features Using Sub-Resolution Assist Features
Disclosed is a method, system, and computer program product for implementing controlled breaks using sub-resolution assist features. Sub-resolution bridging features are added to implement...
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US20090113376 |
Apparatus for OPC Automation and Method for Fabricating Semiconductor Device Using the Same
An OPC automation apparatus and manufacturing method of a semiconductor device using the same, being capable of improving the fabrication yield of a semiconductor device by establishing a system...
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US20090113362 |
METHOD FOR DESIGNING A MASK FOR AN INTEGRATED CIRCUIT HAVING SEPARATE TESTING OF DESIGN RULES FOR DIFFERENT REGIONS OF A MASK PLANE
The invention relates to a method for designing integrated circuits, in particular a description and verification of design rules, wherein in one and the same process layer different design rules (...
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US20090100399 |
DESIGN STRUCTURE FOR PARTITIONED DUMMY FILL SHAPES FOR REDUCED MASK BIAS WITH ALTERNATING PHASE SHIFT MASKS
A design structure, method, and system for partitioned dummy fill shapes for reduced mask bias with alternating phase shift masks, or with other two-mask lithographic processes employing a trim...
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US20090089736 |
FACILITATING PROCESS MODEL ACCURACY BY MODELING MASK CORNER ROUNDING EFFECTS
An embodiment provides systems and techniques for determining an improved process model which models mask corner rounding (MCR) effects. During operation, the system may receive a mask layout and...
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US20090089727 |
METHOD FOR DIMENSION CONVERSION DIFFERENCE PREDICTION, METHOD FOR MANUFACTURING PHOTOMASK, METHOD FOR MANUFACTURING ELECTRONIC COMPONENT, AND PROGRAM FOR DIMENSION CONVERSION DIFFERENCE PREDICTION
A method for dimension conversion difference prediction includes: determining an opening angle at a conversion difference prediction point on basis of a design pattern data; and predicting a...
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US20090079005 |
Integrated Circuits and Methods of Design and Manufacture Thereof
Integrated circuits and methods of manufacture and design thereof are disclosed. For example, a method of manufacturing includes using a first mask to pattern a gate material forming a plurality of...
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US20090077524 |
METHOD OF MANUFACTURING PHOTOMASK
A technique for quantitatively expressing a manufacturing difficulty level of a photomask and for efficiently manufacturing the photomask is provided. A mask manufacturing difficulty level...
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