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US20060090099 |
SEU-tolerant QDI circuits
The invention provides circuits that are tolerant to soft errors, such as a single event upset (SEU). The circuits may have a chain of permitted state changes. Redundant elements, including...
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US20110047412 |
PARALLEL PROGRAMMING ERROR CONSTRUCTS
A system receives a program, allocates the program to a first software unit of execution (UE) and a second software UE, executes a first portion of the program with the first and second software...
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US20110214012 |
SECURED COPROCESSOR COMPRISING AN EVENT DETECTION CIRCUIT
A coprocessor includes a calculation unit for executing at least one command, and a securization device. The securization device includes an error detection circuit for monitoring the execution of...
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US20090313500 |
CONTAINMENT AND RECOVERY OF SOFTWARE EXCEPTIONS IN INTERACTING, REPLICATED-STATE-MACHINE-BASED FAULT-TOLERANT COMPONENTS
A method, system and article of manufacture are disclosed for error recovery in a replicated state machine. A batch of inputs is input to the machine, and the machine uses a multitude of components...
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US20120124417 |
DISPLAY APPARATUS AND METHOD FOR UPDATING MICOM CODE THEREOF
A display apparatus and a method for updating a micom code thereof are provided. According to the display apparatus, if an error occurs while a CPU is updating a micom code, a micom may drive the...
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US20060230309 |
System for remote fault management in a wireless network
This invention relates generally to network management in large telecommunications networks. A system and method capable of providing signal consolidation, replication, and correlation at a fault...
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US20080010512 |
Format Converter with Smart Multitap
Systems and methods for signal conversion with smart multitap are disclosed. Embodiments of the systems can be scalable to model different signal topologies, transmission frequencies, bandwidths,...
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US20090094481 |
Enhancing Reliability of a Many-Core Processor
In one embodiment, the present invention includes a method for identifying available cores of a many-core processor, allocating a first subset of the cores to an enabled state and a second subset...
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US20050050385 |
Server crash recovery reboot auto activation method and system
A server crash recovery reboot auto activation method and system is proposed, which is designed for use with a network server to allow the network server to automatically undergo a reboot procedure...
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US20110010581 |
CONVERGENT MEDIATION SYSTEM WITH DYNAMIC RESOURCE ALLOCATION
An object is to create a convergent mediation system (10) and method that meet the technical requirements of low latency time and high throughput, without compromising the interoperability and ease...
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US20090138757 |
FAILURE RECOVERY METHOD IN CLUSTER SYSTEM
There is provided a method executed in a cluster system comprising a first computer and at least one second computer that stores the data transmitted from the first computer. The method comprising...
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US20070294574 |
Dual computer for system backup and being fault-tolerant
The present invention is to provide a computer for backup and being fault-tolerant comprising a CPU connected to an I/O port, a dual-port memory, a memory address decoder, a bus tri-state buffer,...
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US20050273653 |
Single fault tolerance in an architecture with redundant systems
An electronic module is provided. The electronic module includes a first system and a second, redundant system. The first and second redundant systems include at least three processors having...
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US20100011242 |
Failover method and system for a computer system having clustering configuration
A failover method for a computer system having a clustering configuration, in which among a plurality of computers having the clustering configuration, any one of computers, when detecting a...
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US20060184822 |
Auxiliary mechanism to manage instruction restart and restart coming in a lookahead processor
A management system that controls a restart interface in a data processing system. The management system switches control of the interface from a distributed network managed by the caches to the...
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US20090240980 |
INFORMATION PROCESSING DEVICE AND FAILURE CONCEALING METHOD THEREFOR
An information processing device comprises a plurality of processing units on which OSs and execution environments operate, and shared peripheral devices shared by the plurality of processing...
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US20080270827 |
RECOVERING DIAGNOSTIC DATA AFTER OUT-OF-BAND DATA CAPTURE FAILURE
Embodiments of the present invention address deficiencies of the art in respect to out-of-band management of system fault handling and provide a novel and non-obvious method, system and computer...
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US20050246578 |
Method and system of exchanging information between processors
A method and system of exchanging information between processors. At least some of the illustrative embodiments may be a method comprising exchanging information between a plurality of processors...
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US20060020852 |
Method and system of servicing asynchronous interrupts in multiple processors executing a user program
A method and system of servicing asynchronous interrupts in multiple processors executing a user program. Some of the exemplary embodiments may be a method comprising executing a user program on a...
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US20060259815 |
Systems and methods for ensuring high availability
A highly-available computer system is provided. The system includes at least two computer subsystems, each including memory, a local storage device and an embedded operating system. The system also...
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US20080215913 |
Information Processing System and Information Processing Method
An anomaly detector detects anomaly of a first device. A second device reset part, in case that anomaly has been detected by the anomaly detector, resets a second device. A first device reset part,...
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US20060080574 |
Redundant data storage reconfiguration
In one embodiment, a method of reconfiguring a redundant data storage system is provided. A plurality of data segments are redundantly stored by a first group of storage devices, at least a quorum...
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US20060107109 |
Communication processing apparatus and method and program for diagnosing the same
The present invention makes it possible to detect abnormality in an error detecting function early while minimizing adverse effects on transfer performance. The present invention provides a method...
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US20050283660 |
Mechanism to handle events in a machine with isolated execution
A platform and method for secure handling of events in an isolated execution environment. A processor executing in isolated execution “IsoX” mode may leak data when an event occurs as a result of ...
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US20070043971 |
Error identifying apparatus
An apparatus, including a plurality of units, each has at least one function which is executed by a software; an error detecting section which detects an error of the apparatus; a selector section...
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US20070168711 |
Computer-clustering system failback control method and system
A computer-clustering system failback control method and system is proposed, which is designed for use with a computer-clustering system, such as a server-clustering system, for providing the...
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US20090259883 |
ROBUST SYNCHRONIZATION OF DIAGNOSTIC INFORMATION AMONG POWERTRAIN CONTROL MODULES
An automotive system has a primary control module, such as an engine control module (ECM) configured for connection to a malfunction indicator lamp (MIL), and a secondary control module, such as a...
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US20100049268 |
MASTER/SLAVE PROCESSOR CONFIGURATION WITH FAULT RECOVERY
A fault-tolerant processor device including a master processor and a plurality of operationally coupled slave processors. The master processor sends a command to each of the slave processors to...
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US20090044048 |
Method and device for generating a signal in a computer system having a plurality of components
A method and device for generating a signal in a computer system having a plurality of components, at least two execution units being provided as two components, and a switchover means being...
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US20090240979 |
DETERMINING A SET OF PROCESSOR CORES TO BOOT
Techniques that determine a strict subset of multiple processor cores from a set of multiple functional processor cores integrated within a single integrated circuit package. The determined strict...
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US20080258253 |
Integrated Microprocessor System for Safety-Critical Regulations
Disclosed is an integrated circuit arrangement for safety-critical applications, such as for regulating and controlling tasks in an electronic brake system for motor vehicles. The arrangement...
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US20050066229 |
Processor sharing between in-range devices
A system and method for processor sharing between in-range devices. Various aspects of the present invention may comprise establishing a wireless communication link between a first system and a...
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US20070022318 |
Method and system for environmentally adaptive fault tolerant computing
A method and system for adapting fault tolerant computing. The method includes the steps of measuring an environmental condition representative of an environment. An on-board processing system's...
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US20050268163 |
Microprocessor comprising signature means for detecting an attack by error injection
A method for monitoring the execution of a sequence of instruction codes in an integrated circuit comprising a central processing unit provided for executing such instruction codes. Current...
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US20090006891 |
Apparatus, System, and Method for Hard Disk Drive Redundancy
An apparatus, system, and method are disclosed for hard disk drive redundancy. A demarcation module demarks a parity data block in each set of a specified number of data blocks on a hard disk...
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US20050193243 |
METHOD FOR MANAGING A CIRCUIT SYSTEM DURING MODE-SWITCHING
A method for switching modes of a circuit system. The circuit system includes at least a first memory device, a second memory device, and a microprocessor. The method includes utilizing the second...
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US20050223275 |
Performance data access
Performance data access is described. In an embodiment, events are processed with non-synchronized processor elements of a logical processor in a redundant processor system. Performance data...
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US20080040630 |
Time-Value Curves to Provide Dynamic QoS for Time Sensitive File Transfers
A method and apparatus has been shown and described which allows Quality of Service to be controlled at a temporal granularity. Time-value curves, generated for each task, ensure that mission...
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US20050283658 |
Method, apparatus and program storage device for providing failover for high availability in an N-way shared-nothing cluster system
A method, apparatus and program storage device for providing failover for continuous or near-continuous availability in an N-way logical shared-nothing cluster system is disclosed. Cluster...
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US20090259884 |
COST-REDUCED REDUNDANT SERVICE PROCESSOR CONFIGURATION
A redundant service processor configuration is provided. A first processor in a first node operates elements in the first node. A first control line connects the first processor to a first...
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US20090300414 |
METHOD AND COMPUTER SYSTEM FOR MAKING A COMPUTER HAVE HIGH AVAILABILITY
A method and a computer system for making a computer achieve high availability. The method includes running a host virtual machine on a host virtual machine container; running a servant virtual...
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US20100042871 |
System with Configurable Functional Units and Method
A method and a system is provided for the processing of data or signals with a number of functional units which are each adapted to apply one or several functions to the data or signals, and which...
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US20070033434 |
Fault-tolerant processing path change management
Change management of data processing paths by tentatively trying proposed alternative data processing path(s) without first giving up the existing processing path. If the alternative data...
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US20100332012 |
ARRANGEMENT FOR IDENTIFYING UNCONTROLLED EVENTS AT THE PROCESS MODULE LEVEL AND METHODS THEREOF
A process-level troubleshooting architecture (PLTA) configured to facilitate substrate processing in a plasma processing system is provided. The architecture includes a process module controller....
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US20070074073 |
Detection system and method
In a process for recording a data onto an optical storage medium which includes a fault correction mechanism, a detection system is preferably coupled to an optical data recorder comprising a data...
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US20060129880 |
Method and system for injecting faults into a software application
A method for testing a software application (225), for example, written in the Java language is proposed. For this purpose, a factory object (230c) can be configured to operate in a production mode...
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US20060282702 |
Task management apparatus for control apparatus, input/output control apparatus, information control apparatus, task management method, input/output controlling method, and information controlling method
Processed results are received when processors make compatible computations on data of a common object. A computation command signal is generated and fed to the processors in response to a start...
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US20060117219 |
Control device
Arbitrary data is read out from a main storage device, based on a permanent fault detection address that is used to detect a permanent fault on an address line. A bit error in the permanent fault...
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US20100332201 |
METHODS AND APPARATUS FOR PREDICTIVE PREVENTIVE MAINTENANCE OF PROCESSING CHAMBERS
A method for assessing health status of a processing chamber is provided. The method includes executing a recipe. The method also includes receiving processing data from a set of sensors during...
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US20100174895 |
RAPID-BOOT COMPUTING DEVICE WITH DUAL OPERATING SYSTEMS
A computing device is booted in a manner that enables a software application to begin execution with minimal delay. When the device is powered up, a first processor begins booting under control of...
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