Matches 1 - 50 out of 127 1 2 3 >


Match Document Document Title
US20120124348 BRANCH PREDICTOR ACCURACY BY FORWARDING TABLE UPDATES TO PENDING BRANCH PREDICTIONS  
A method and apparatus are provided for increasing the accuracy of a branch predictor. A branch prediction table provides a first instance of a branch prediction value associated with an...
US20140075167 BRANCH HISTORY CACHE AND METHOD  
A branch history table cache is a write cache that stores values of branch history counters written to a branch history table. An update to a branch history table counter is reflected in both the...
US20130332716 BRANCH TARGET BUFFER PRELOAD TABLE  
Embodiments relate to using a branch target buffer preload table. An aspect includes receiving a search request to locate branch prediction information associated with a branch instruction....
US20120124349 POWER EFFICIENT PATTERN HISTORY TABLE FETCH IN BRANCH PREDICTOR  
A method and apparatus for branch prediction is disclosed. A pattern history table (PHT) is accessed based on at least one global history value to obtain a prediction value. The prediction value...
US20150199199 COMBINED BRANCH TARGET AND PREDICATE PREDICTION  
Embodiments provide methods, apparatus, systems, and computer readable media associated with predicting predicates and branch targets during execution of programs using combined branch target and...
US20140082339 GLOBAL WEAK PATTERN HISTORY TABLE FILTERING  
Embodiments relate to global weak pattern history table (PHT) filtering. An aspect includes receiving a search address associated with a branch prediction, and receiving a prediction strength...
US20130332715 GLOBAL WEAK PATTERN HISTORY TABLE FILTERING  
Embodiments relate to global weak pattern history table (PHT) filtering. An aspect includes receiving a search address associated with a branch prediction, and receiving a prediction strength...
US20140229720 BRANCH PREDICTION WITH POWER USAGE PREDICTION AND CONTROL  
A method and circuit arrangement maintain power usage prediction information for one or more functional units in branch prediction logic for a processing unit such that the power consumption of a...
US20100306515 Predictors with Adaptive Prediction Threshold  
An adaptive prediction threshold scheme for dynamically adjusting prediction thresholds of entries in a Pattern History Table (PHT) by observing global tendencies of the branch or branches that...
US20150212822 FRACTIONAL USE OF PREDICTION HISTORY STORAGE FOR OPERATING SYSTEM ROUTINES  
A microprocessor includes a predicting unit having storage for holding a prediction history of characteristics of instructions previously executed by the microprocessor. The predicting unit...
US20140229721 DYNAMIC BRANCH HINTS USING BRANCHES-TO-NOWHERE CONDITIONAL BRANCH  
A processor includes an execution pipeline having one or more execution units to execution the instructions and a branch prediction unit coupled to the execution units. The branch prediction unit...
US20140075166 Swapping Branch Direction History(ies) in Response to a Branch Prediction Table Swap Instruction(s), and Related Systems and Methods  
Swapping branch direction history(ies) in response to a branch prediction table swap instruction(s), and related systems and methods are disclosed. In one embodiment, a branch history management...
US20110320793 OPERATING SYSTEM AWARE BRANCH PREDICTOR USING A DYNAMICALLY RECONFIGURABLE BRANCH HISTORY TABLE  
A processor resource manager assigns a branch history resource to a first execution mode. The branch history resource is utilized for predicting a branch direction of a branch instruction. Next,...
US20110225401 PREFETCHING BRANCH PREDICTION MECHANISMS  
A method comprising receiving a branch instruction, decoding a branch address and the branch instruction, executing a branch action associated with the branch address, determining whether a branch...
US20140052972 META PREDICTOR RESTORATION UPON DETECTING MISPREDICTION  
Methods and apparatus for restoring a meta predictor system upon detecting a branch or binary misprediction, are disclosed. An example apparatus may include a base misprediction history register...
US20130036297 META PREDICTOR RESTORATION UPON DETECTING MISPREDICTION  
Methods and apparatus for restoring a meta predictor system upon detecting a branch or binary misprediction, are disclosed. An example apparatus may include a base misprediction history register...
US20110016292 OUT-OF-ORDER EXECUTION IN-ORDER RETIRE MICROPROCESSOR WITH BRANCH INFORMATION TABLE TO ENJOY REDUCED REORDER BUFFER SIZE  
An out-of-order execution in-order retire microprocessor includes a branch information table comprising N entries. Each of the N entries stores information associated with a branch instruction....
US20060026469 Branch prediction device, control method thereof and information processing device  
The present invention is a branch prediction device comprising a branch history storage device for storing branch history information in order to predict branch behavior, an error detection...
US20140156978 Detecting and Filtering Biased Branches in Global Branch History  
A processor includes an instruction pipeline for executing instructions including a branching instruction, a counter for counting times that the branching instruction is taken, a register for...
US20100169627 System and method for repairing a speculative global history record  
A system and method are provided for updating a speculative global history prediction record in a microprocessor system using pipelined instruction processing. The method accepts microprocessor...
US20120005463 BRANCH TRACE HISTORY COMPRESSION  
The disclosure provides a method, data processing system, and computer program product for managing a branch trace environment. In response to a branch being taken for a first branch instruction...
US20130283023 Bimodal Compare Predictor Encoded In Each Compare Instruction  
Systems and methods for branch prediction, including predicting evaluation of a producer instruction such as a compare instruction, by encoding a prediction field in the producer instruction, and...
US20070260862 Providing storage in a memory hierarchy for prediction information  
In one embodiment, the present invention includes an apparatus having a prediction unit to predict a direction to be taken at a branch and a memory coupled to the prediction unit to store...
US20110055529 EFFICIENT BRANCH TARGET ADDRESS CACHE ENTRY REPLACEMENT  
A microprocessor includes a branch target address cache (BTAC), each entry thereof configured to store branch prediction information for at most N branch instructions. An execution unit executes a...
US20120166776 METHOD, SYSTEM, AND COMPUTER PROGRAM FOR ANALYZING PROGRAM  
Upon start of a program, a plurality of flags, each corresponding to an instruction of the program, are initialized to a disabled state and an initial state of a BHT is stored. Upon execution of a...
US20090210686 METHOD AND SYSTEM FOR PURGING PATTERN HISTORY TABLES AS A FUNCTION OF GLOBAL ACCURACY IN A STATE MACHINE-BASED FILTERED GSHARE BRANCH PREDICTOR  
A method, system and computer product for purging pattern history tables as a function of global accuracy in a state machine-based filter gshare branch predictor. An exemplary embodiment includes...
US20140075168 INSTRUCTION SEQUENCE BUFFER TO STORE BRANCHES HAVING RELIABLY PREDICTABLE INSTRUCTION SEQUENCES  
A method for outputting reliably predictable instruction sequences. The method includes tracking repetitive hits to determine a set of frequently hit instruction sequences for a microprocessor,...
US20110320792 STATE MACHINE-BASED FILTERING OF PATTERN HISTORY TABLES BASED ON DISTINGUISHABLE PATTERN DETECTION  
Machine-based filtering of a pattern history table includes identifying a matching previous occurrence of a current branch instruction in an address history vector (AHV), the AHV storing...
US20090172371 FEEDBACK MECHANISM FOR DYNAMIC PREDICATION OF INDIRECT JUMPS  
Systems and methods are provided to detect instances where dynamic predication of indirect jumps (DIP) is considered to be ineffective utilizing data collected on the recent effectiveness of...
US20090037709 BRANCH PREDICTION DEVICE, HYBRID BRANCH PREDICTION DEVICE, PROCESSOR, BRANCH PREDICTION METHOD, AND BRANCH PREDICTION CONTROL PROGRAM  
A branch prediction device capable of preventing degradation of branch prediction accuracy and a delay in processing speed is provided. The branch prediction device includes a branch prediction...
US20140089647 Branch Predictor for Wide Issue, Arbitrarily Aligned Fetch  
In an embodiment, a processor may be configured to fetch N instruction bytes from an instruction cache (a “fetch group”), even if the fetch group crosses a cache line boundary. A branch predictor...
US20120072708 HISTORY BASED PIPELINED BRANCH PREDICTION  
Systems and methods for history based pipelined branch prediction. In one embodiment, access to prediction information to predict a plurality of branches within an instruction block is initiated...
US20090164766 BRANCH HISTORY WITH POLYMORPHIC INDIRECT BRANCH INFORMATION  
A system and method for efficient improvement of branch prediction in a microprocessor with negligible impact on die-area, power consumption, and clock cycle period. It is determined if a program...
US20130311760 Multi Level Indirect Predictor using Confidence Counter and Program Counter Address Filter Scheme  
The disclosure relates to predicting simple and polymorphic branch instructions. An embodiment of the disclosure detects that a program instruction is a branch instruction, determines whether a...
US20110320791 Method and Apparatus to Limit Millicode Routine End Branch Prediction  
A computing system method, program and hardware for correlation of millicode predictions with specific millicode routines receives architected millicode and stores the millicode in internal...
US20130151823 NEXT FETCH PREDICTOR TRAINING WITH HYSTERESIS  
A system and method for efficient branch prediction. A processor includes two branch predictors. A first branch predictor generates branch prediction data, such as a branch direction and a branch...
US20140380027 ELAPSED CYCLE TIMER IN LAST BRANCH RECORDS  
A processing device implementing an elapsed cycle timer in last branch records (LBRs) is disclosed. A processing device of the disclosure includes a last branch record (LBR) counter to iterate...
US20100306516 INFORMATION PROCESSING APPARATUS AND BRANCH PREDICTION METHOD  
An information processor includes a first recording unit which stores first information indicating correspondence between an instruction address and a branch destination address of a most recent...
US20070162728 Information processing apparatus, replacing method, and computer-readable recording medium on which a replacing program is recorded  
The present invention relates to an information processing apparatus predicting a branch destination of a branch instruction using a branch history register to realize effective replacement by...
US20050278513 Systems and methods of dynamic branch prediction in a microprocessor  
A hybrid branch prediction scheme for a multi-stage pipelined microprocessor that combines features of static and dynamic branch prediction to reduce complexity and enhance performance over...
US20050283593 Loop end prediction  
A branch prediction mechanism within a pipelined processing apparatus uses a history value HV which records preceding branch outcomes in either a first mode or a second mode. In the first mode...
US20080320288 BRANCH PREDICTION APPARATUS OF COMPUTER  
One aspect of the embodiments utilizes a branch instruction predicting unit includes a history memory to store a branch address as history information, a selecting unit to select a storing place...
US20080215866 BRANCH PREDICTION APPARATUS, SYSTEMS, AND METHODS  
An apparatus and a system, as well as a method and article, may operate to predict a branch within a first operating context, such as a user context, using a first strategy; and to predict a...
US20090276611 Ram Block Branch History Table in a Global History Branch Prediction System  
Provided is a means for accessing multiple entries from a branch history table (BHT) in a single clock cycle, in the context of pipelined instruction processing. In a first clock cycle, a...
US20110289300 Indirect Branch Target Predictor that Prevents Speculation if Mispredict Is Expected  
In one embodiment, a processor implements an indirect branch target predictor to predict target addresses of indirect branch instructions. The indirect branch target predictor may store target...
US20150052338 ARITHMETIC PROCESSING DEVICE AND CONTROL METHOD OF ARITHMETIC PROCESSING DEVICE  
An arithmetic processing device includes: first prediction units which output branch prediction information of a fetched conditional branch instruction based on past branch history information of...
US20060095747 Branch prediction mechanism including a branch prediction memory and a branch prediction cache  
A data processing system 2 incorporating an instruction pipeline 14 and a prefetch unit 16 is provided with a branch prediction mechanism using both a branch prediction memory 20 storing 1-bit...
US20080301420 Branch prediction control device having return address stack and method of branch prediction  
A branch prediction control device, in an information processing unit which performs a pipeline process, generates a branch prediction address used for verification of an instruction being...
US20100306514 Correlating Instruction Sequences with CPU Performance Events to Improve Software Performance  
A system and method are disclosed for correlating instruction sequences. A plurality of instructions is processed to parse a first sequence of instructions comprising a first area of interest. A...
US20070005945 Branch prediction apparatus, its method and processor  
A branch prediction apparatus reads out a branch history table 15 by an index calculated by the output of a branch history register 14 containing a plurality of the latest branch result of a...

Matches 1 - 50 out of 127 1 2 3 >