AcclaimIP-ad

Match Document Document Title
US20100153637 Arbitration for memory device with commands  
A plurality of masters arbitrate for access to a shared memory device, such as a SDRAM (synchronous dynamic random access memory), amongst themselves using software and arbitration interfaces. The...
US20060236039 METHOD AND APPARATUS FOR SYNCHRONIZING SHARED DATA BETWEEN COMPONENTS IN A GROUP  
A method and system for use by a cache-less component contained in a group of two or more components each having access to shared data stored in a shared segment of memory connected to the...
US20150100741 TRANSACTIONAL MEMORY MANAGEMENT TECHNIQUES  
Techniques for improved transactional memory management are described. In one embodiment, for example, an apparatus may comprise a processor element, an execution component for execution by the...
US20150089162 DISTRIBUTED MEMORY OPERATIONS  
A technology for implementing a method for distributed memory operations. A method of the disclosure includes obtaining distributed channel information for an algorithm to be executed by a...
US20140240326 Method, Apparatus, System For Representing, Specifying And Using Deadlines  
In an embodiment, a shared memory fabric is configured to receive memory requests from multiple agents, where at least some of the requests have an associated order identifier and a deadline value...
US20140208042 PROVIDING HARDWARE SUPPORT FOR SHARED VIRTUAL MEMORY BETWEEN LOCAL AND REMOTE PHYSICAL MEMORY  
In one embodiment, the present invention includes a memory management unit (MMU) having entries to store virtual address to physical address translations, where each entry includes a location...
US20140164716 OVERRIDE SYSTEM AND METHOD FOR MEMORY ACCESS MANAGEMENT  
A memory management system and method are described. In one embodiment, a memory management system includes a memory management unit for virtualizing context memory storage and independently...
US20140156952 INFORMATION PROCESSING APPARATUS, INFORMATION PROCESSING METHOD, AND COMPUTER READABLE MEDIUM  
According to one embodiment, an information processing apparatus with mode switching function, includes a first management module which is capable of accessing a predetermined area of a memory,...
US20140049548 MEMORY SHARING VIA A UNIFIED MEMORY ARCHITECTURE  
A method and system for sharing memory between a central processing unit (CPU) and a graphics processing unit (GPU) of a computing device are disclosed herein. The method includes allocating a...
US20130262784 Memory Heaps in a Memory Model for a Unified Computing System  
A method and system for allocating memory to a memory operation executed by a processor in a computer arrangement having a first processor configured for unified operation with a second processor....
US20120151153 Programmable Controller  
A controller is provided which comprises one or more processors, a control store, a first interface control unit for interfacing a local core and a second interface control unit for interfacing...
US20120079200 UNIFIED STREAMING MULTIPROCESSOR MEMORY  
One embodiment of the present invention sets forth a technique for providing a unified memory for access by execution threads in a processing system. Several logically separate memories are...
US20120039404 SYSTEM AND METHOD FOR SELECTIVELY PERFORMING SINGLE-ENDED AND DIFFERENTIAL SIGNALING  
In a communication system, data is selectively transmitted using single-ended or differential signaling. The data is transmitted in relation to a plurality of clock signals having different...
US20110066814 CONTROL SOFTWARE FOR DISTRIBUTED CONTROL, AND ELECTRONIC CONTROL DEVICE  
The control software which can improve the development efficiency of a control system using a plurality of processing units by absorbing the difference due to the data exchange through a shared...
US20100287424 Method of writing an operating systems (OS) image to a semiconductor device and the semiconductor device  
Example embodiments are directed to a method of writing an Operating System (OS) image to a semiconductor device having a data storage device, an Application Specific Integrated Circuit (ASIC),...
US20100281225 DATA PROCESSING APPARATUS OF BASIC INPUT/OUTPUT SYSTEM  
A data processing apparatus of a basic input/output system (BIOS) is provided. The data processing apparatus includes a BIOS unit, a share memory and a control unit. The BIOS unit writes command...
US20100275208 Reduction Of Memory Latencies Using Fine Grained Parallelism And Fifo Data Structures  
Software rendering and fine grained parallelism are utilized to reduce/ovoid memory latency in a multi-processor (MP) system. According to one embodiment, the management of the transfer of data...
US20100257313 SEMICONDUCTOR DEVICE  
A semiconductor device has operation modes selectable through the control by a second microcomputer (113). In a first mode, an operation of a memory controller (105) responding to a memory card...
US20100250864 Method And Apparatus For Compressing And Decompressing Data  
One embodiment of the invention provides a method and apparatus for decompressing a compressed data set using a processing device having a plurality of processing units and a shared memory. The...
US20100246275 METHODS AND APPARATUS RELATED TO A SHARED MEMORY BUFFER FOR VARIABLE-SIZED CELLS  
In one embodiment, an apparatus includes a shared memory buffer including a lead memory bank and a write multiplexing module configured to send a leading segment from a set of segments to the lead...
US20100242051 ADMINISTRATION MODULE, PRODUCER AND CONSUMER PROCESSOR, ARRANGEMENT THEREOF AND METHOD FOR INTER-PROCESSOR COMMUNICATION VIA A SHARED MEMORY  
Administration module, producer and consumer processor, arrangement thereof and method for inter-processor communication via a shared memory, wherein the module includes: a device for storing and...
US20100235589 MEMORY ACCESS CONTROL IN A MULTIPROCESSOR SYSTEM  
Access to a memory area by a first processor that executes a first processor program and a second processor that executes a second processor program is granted to one of the first processor and...
US20100235587 Staged Software Transactional Memory  
A new form of software transactional memory based on maps for which data goes through three stages. Updates to shared memory are first redirected to a transaction-private map which associates each...
US20100228925 PROCESSING SYSTEM WITH INTERSPERSED PROCESSORS USING SHARED MEMORY OF COMMUNICATION ELEMENTS  
A processing system comprising processors and the dynamically configurable communication elements coupled together in an interspersed arrangement. The processors each comprise at least one...
US20100228923 Memory system having multiple processors  
A memory system includes multiple processors. The memory system includes first and second processors, a storage device and a controller. The storage device includes one or more banks which are...
US20100228920 PARALLEL PROCESSING PROCESSOR SYSTEM  
A parallel processing processor system includes multiple processor elements, a main memory, and a shared memory, whose latency with the processors is less than the latency between the main memory...
US20100218197 INFORMATION PROCESSING APPARATUS, METHOD, AND PROGRAM  
An information processing apparatus is provided and includes: a first operating system incapable of adding or deleting an application; a second operating system capable of adding and deleting an...
US20100211748 Memory System With Point-to-Point Request Interconnect  
A memory system includes a memory controller with a plurality N of memory-controller blocks, each of which conveys independent transaction requests over external request ports. The request ports...
US20100211747 PROCESSOR WITH RECONFIGURABLE ARCHITECTURE  
Disclosed is configuration memory access technology in a processor with a reconfigurable architecture. The processor with the reconfigurable architecture includes an array of processing elements...
US20100205381 System and Method for Managing Memory in a Multiprocessor Computing Environment  
A method for managing a memory communicatively coupled to a plurality of processors may include analyzing a data structure associated with a processor to determine if one or more portions of...
US20100199051 CACHE COHERENCY IN A SHARED-MEMORY MULTIPROCESSOR SYSTEM  
A method of making cache memories of a plurality of processors coherent with a shared memory includes one of the processors determining whether an external memory operation is needed for data that...
US20100192221 System and Method for Automated Data Retrieval Based on Data Placed in Clipboard Memory  
A data retrieval system and method of the invention provide automatic retrieval of information based on data placed into, for example, a Windows™ clipboard. A user highlights and cuts (or pastes)...
US20100191921 REGION COHERENCE ARRAY FOR A MULT-PROCESSOR SYSTEM HAVING SUBREGIONS AND SUBREGION PREFETCHING  
A Region Coherence Array (RCA) having subregions and subregion prefetching for shared-memory multiprocessor systems having a single-level, or a multi-level interconnect hierarchy architecture.
US20100191872 CONTROLLER  
A controller includes an inputting/outputting portion, which receives data from a field device and outputs operated data to the field device, a flash memory including a file system, and a file...
US20100185822 MULTI-READER MULTI-WRITER CIRCULAR BUFFER MEMORY  
A system for managing a circular buffer memory includes a number of data writers, a number of data readers, a circular buffer memory; and logic configured to form a number of counters, form a...
US20100180085 HANDLING OF MEMORY ACCESS REQUESTS TO SHARED MEMORY IN A DATA PROCESSING APPARATUS  
A data processing apparatus and method are provided for handling memory access requests to shared memory. The data processing apparatus has a plurality of processing units, at least one of which...
US20100174872 Media Memory System  
A method and apparatus for matching parent processor address translations to media processors' address translations and providing concurrent memory access to a plurality of media processors...
US20100161912 Memory space management and mapping for memory area network  
A mechanism for simultaneous multiple host access to shared centralized memory space via a virtualization protocol utilizing a network transport. The invention combines local memory interfacing...
US20100161911 METHOD AND APPARATUS FOR MPI PROGRAM OPTIMIZATION  
Machine readable media, methods, apparatus and system for MPI program optimization. In some embodiments, shared data may be retrieved from a message passing interface (MPI) program, wherein the...
US20100161909 Systems and Methods for Quota Management in a Memory Appliance  
Various embodiments of the present invention provide systems and methods for using providing memory access across multiple virtual machines. For example, various embodiments of the present...
US20100161908 Efficient Memory Allocation Across Multiple Accessing Systems  
Various embodiments of the present invention provide systems and methods for reducing memory usage across multiple virtual machines. For example, various embodiments of the present invention...
US20100153618 SHARED MEMORY ACCESS TECHNIQUES  
Memory access techniques, in accordance with embodiments of the present technology, redirect memory access requests received from a baseband processor to shared memory coupled to an application...
US20100131720 MANAGEMENT OF OWNERSHIP CONTROL AND DATA MOVEMENT IN SHARED-MEMORY SYSTEMS  
A method to exchange data in a shared memory system includes the use of a buffer in communication with a producer processor and a consumer processor. The cache data is temporarily stored in the...
US20100122041 MEMORY CONTROL APPARATUS, PROGRAM, AND METHOD  
A memory control apparatus which controls access to a shared memory for each transaction. The apparatus includes a management unit that stores versions of data stored in the shared memory, a log...
US20100122039 Memory Systems and Accessing Methods  
Memory systems and accessing methods are disclosed. In one embodiment, a method of accessing a memory device includes accessing a first end of the memory device regarding a first data type, and...
US20080147993 Information Processing Unit, System and Method, and Processor  
The invention is provided to improve the information processing efficiency of a multiprocessor system. An information processing apparatus 1000 comprises a main processor 200 for exercising...
US20070233991 METHOD AND APPARATUS FOR DISTRIBUTING MEMORY IN A DATA PROCESSING SYSTEM  
Methods and systems are provided for tuning memory allocated among a plurality of applications in a data processing system. In one implementation, the method includes generating memory benefit...
US20060069879 Methods and apparatus for providing a compressed network in a multi-processing system  
The present invention provides methods and apparatus for transferring and storing data among processors and memory in a multiprocessor system. The data is compressed locally before it is sent to a...
US20050120185 Methods and apparatus for efficient multi-tasking  
A system includes a shared memory; a memory interface unit coupled to the shared memory and operable to retrieve data from the shared memory at requested addresses, and to write data to the shared...
US20170161300 SHARED DATA STORAGE LEVERAGING DISPERSED STORAGE DEVICES  
A storage system provides shared storage by utilizing dispersed storage devices while optimizing both the placement of data across the dispersed storage devices and the method for accessing the...