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US20110191547 COMPUTER SYSTEM AND LOAD EQUALIZATION CONTROL METHOD FOR THE SAME  
A computer system having a plurality of controllers for data input/output control is provided, wherein even if a control authority of a processor is transferred to another processor and the...
US20110185129 SECONDARY JAVA HEAPS IN SHARED MEMORY  
A computing system includes a first virtual machine associated with a memory region readable by the first virtual machine, and a first private memory region. A data object is created by the first...
US20110167226 SHARED MEMORY ARCHITECTURE  
Disclosed herein is an apparatus which may comprise a plurality of nodes. In one example embodiment, each of the plurality of nodes may include one or more central processing units (CPUs), a...
US20110167225 MULTIPLE-MEMORY APPLICATION-SPECIFIC DIGITAL SIGNAL PROCESSOR  
An integrated circuit device is provided comprising a circuit board and one or more digital signal processors implemented thereon. The digital signal processor comprises a data unit comprising a...
US20110153957 SHARING VIRTUAL MEMORY-BASED MULTI-VERSION DATA BETWEEN THE HETEROGENOUS PROCESSORS OF A COMPUTER PLATFORM  
A computer system may comprise a computer platform and input-output devices. The computer platform may include a plurality of heterogeneous processors comprising a central processing unit (CPU)...
US20110145609 POWER AWARE MEMORY ALLOCATION  
A computer system may place memory objects in specific memory physical regions based on energy consumption and performance or other policies. The system may have multiple memory regions at least...
US20110145514 METHOD AND APPARATUS FOR INTER-PROCESSOR COMMUNICATION IN MOBILE TERMINAL  
A method for inter-processor communication in a mobile terminal is disclosed. The method of inter-processor communication for a mobile terminal having a first processor, a second processor, and a...
US20110145491 METHOD FOR CONTROLLING ACCESS TO REGIONS OF A MEMORY FROM A PLURALITY OF PROCESSES AND A COMMUNICATION MODULE HAVING A MESSAGE MEMORY FOR IMPLEMENTING THE METHOD  
A method for controlling access to regions of a memory from a plurality of processes. In order to allow a plurality of processes to access the most recent data packets stored in the memory without...
US20110145358 SHARED JAVA JAR FILES  
Techniques are disclosed for sharing programmatic modules among isolated virtual machines. A master JVM process loads data from a programmatic module, storing certain elements of that data into...
US20110138157 CONVOLUTION COMPUTATION FOR MANY-CORE PROCESSOR ARCHITECTURES  
A convolution of the kernel over a layout in a multi-core processor system includes identifying a sector, called a dynamic band, of the layout including a plurality of evaluation points. Layout...
US20110119452 Hybrid Transactional Memory System (HybridTM) and Method  
A computer processing system having memory and processing facilities for processing data with a computer program is a Hybrid Transactional Memory multiprocessor system with modules 1 . . . n...
US20110099284 Efficient Multiple Filter Packet Statistics Generation  
Incoming data streams are managed by receiving a data stream on at least one network interface card (NIC) and performing operations on the data stream using a first process running several first...
US20110093662 MEMORY HAVING INTERNAL PROCESSORS AND DATA COMMUNICATION METHODS IN MEMORY  
Memory having internal processors, and methods of data communication within such a memory are provided. In one embodiment, an internal processor may concurrently access one or more banks on a...
US20110078351 INFORMATION PROCESSOR SYSTEM  
In an information processor system including a memory device (MEMO), a memory control device (SL0) capable of controlling an operation of the memory device, and a plurality of bus masters (MS0 to...
US20110066813 Method And System For Local Data Sharing  
Embodiments for a local data share (LDS) unit are described herein. Embodiments include a co-operative set of threads to load data into shared memory so that the threads can have repeated memory...
US20110061059 INFORMATION PROCESSING PROGRAM AND INFORMATION PROCESSING APPARATUS  
In an information processing apparatus stores, save data shared among first-third applications is stored in a memory for saved data by bringing it into correspondence with the first-third...
US20110055434 METHODS AND SYSTEMS FOR OPERATING A COMPUTER VIA A LOW POWER ADJUNCT PROCESSOR  
A computing device includes a low power auxiliary processor, such as a processor on a wireless card or sub-system, which is able to takeover processing in place of the computing device's central...
US20110035544 MULTI-PATH ACCESSIBLE SEMICONDUCTOR MEMORY DEVICE HAVING MAILBOX AREAS AND MAILBOX ACCESS CONTROL METHOD THEREOF  
A multipath accessible semiconductor memory device having a mailbox area and a mailbox access control method thereof are provided. The semiconductor memory device includes N number of ports, at...
US20110010507 HOST MEMORY INTERFACE FOR A PARALLEL PROCESSOR  
A memory interface for a parallel processor which has an array of processing elements and can receive a memory address and supply the memory address to a memory connected to the processing...
US20110004732 DMA in Distributed Shared Memory System  
An example embodiment of the present invention provides processes relating to direct memory access (DMA) for nodes in a distributed shared memory system with virtual storage. The processes in the...
US20100333096 Transactional Locking with Read-Write Locks in Transactional Memory Systems  
A system and method for transactional memory using read-write locks is disclosed. Each of a plurality of shared memory areas is associated with a respective read-write lock, which includes a...
US20100332769 Updating Shared Variables Atomically  
When a thread begins an atomic transaction, the thread reads one or more variables from one or more source addresses. The read portion of the transaction is constrained to a predetermined amount...
US20100325368 SHARED MEMORY HAVING MULTIPLE ACCESS CONFIGURATIONS  
An apparatus includes a first processor that accesses memory according to a first clock frequency, a second processor that accesses memory according to a second clock frequency, and a memory...
US20100318748 DATA RECORDER  
A data recorder includes a first memory element including read/write capability, a second memory element including non-volatile memory and a controller for realizing memory management functions....
US20100312972 METHOD, APPARATUS AND SYSTEM FOR ENABLING PROCESSOR TO ACCESS SHARED DATA  
A method, an apparatus, and a system for enabling a processor to access shared data are provided to overcome low efficiency of a storage system. The method includes that the processor sends a...
US20100306480 Shared Memory  
The present invention relates to a shared memory (20) made on a chip based on semiconductors. The shared memory comprises: an integer number m, greater than one, of data buses (24);m address and...
US20100306479 PROVIDING SHARED MEMORY IN A DISTRIBUTED COMPUTING SYSTEM  
A distributed computing system includes a plurality of processors and shared memory service entities executable on the processors. Each of the shared memory service entities is associated with a...