Matches 1 - 50 out of 58 1 2 >


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US20120254496 METHOD, SYSTEM AND COMPUTER PROGRAM PRODUCT FOR STORING A DECISION TREE  
At least first nodes and second nodes of a decision tree are stored within a memory of an information handling system. The first nodes include a first parent node and first remaining nodes that...
US20100293143 INITIALIZATION OF DATABASE FOR SYNCHRONIZATION  
Aspects of the subject matter described herein relate to initializing a database to be used for synchronization. In aspects, a peer in a synchronization topology creates a consistent copy of its...
US20050210012 Method for managing website group  
A method for managing a website group is provided. The website group includes a main website and at least one sub-website. The method includes steps of (a) providing a database, (b) configuring a...
US20080140783 FORMATTED MESSAGE PROCESSING UTILIZING A MESSAGE MAP  
A MIME or XML formatted message is stored and a map is processed in place of a message. The map is a compact representation of the message. The map is indicative of the content and structure of...
US20050080982 Virtual host bus adapter and method  
A virtualized storage adapter architecture and method is provided wherein lower level details of the storage adapter architecture are isolated from an operating system and its applications that...
US20070127279 MEMORY SYSTEM COMPRISING SEMICONDUCTOR MEMORY HAVING PLURAL DIFFERENT OPERATION MODES  
A memory system includes a nonvolatile semiconductor memory and a controller. The controller controls the nonvolatile semiconductor memory. The controller selects whether to use the nonvolatile...
US20090106523 TRANSLATION LOOK-ASIDE BUFFER WITH VARIABLE PAGE SIZES  
Multiple pipelined Translation Look-aside Buffer (TLB) units are configured to compare a translation address with associated TLB entries. The TLB units operated in serial order comparing the...
US20080250188 Memory Controller, Nonvolatile Storage, Nonvolatile Storage System, and Memory Control Method  
A physical area management table (105) and a pointer table (106) are stored in a nonvolatile auxiliary storage memory (107). When a logical-physical conversion table (108) is updated (restored) in...
US20050132149 Spatial-to-temporal data translation and scheduling and control  
An organization of at least one content of at least one spatial data storage system is determined. A schedule of content transmission in response to the organization of the at least one content of...
US20070162680 Virtual location aware content using presence information data formation with location object (PIDF-LO)  
The format of the Presence Information Data Format—Location Object (PIDF-LO) as defined by the Internet Engineering Task Force (IETF) is extended or modified to accommodate, within the standard...
US20050044302 Non-standard dual in-line memory modules with more than two ranks of memory per module and multiple serial-presence-detect devices to simulate multiple modules  
A memory module includes a printed circuit board and a plurality of memory devices arranged in a plurality of ranks on the printed circuit board. The plurality of ranks includes a first subset...
US20050050257 Nested locks to avoid mutex parking  
A native mutex lock of an operating system is embedded within an application-controlled spinlock. Each of these locks are applied to the same resource, in such a manner that, in select...
US20050210178 Intelligent memory device with variable size task architecture  
A variable task size architecture is disclosed. A system partition is included that is dedicated to system use. The system partition contains a number of specifiers that describe the number of...
US20050177671 Intelligent memory device clock distribution architecture  
A computing system that includes one or more processing elements, a memory connected to a host processor and a multitask controller, where the multitask controller includes a scheduler unit, a...
US20100064127 METHOD FOR UPDATING BASIC INPUT/OUTPUT SYSTEM AND METHOD FOR REPAIRING THEREOF  
The invention relates to a method for updating a basic input/output system (BIOS) and method for repairing the BIOS. A part of a program code of the BIOS is stored in a backup memory block in...
US20050076172 Architecture for static frames in a stack machine for an embedded device  
A method for representing the Stack Frame of a Stack Machine such as the Java Virtual Machine and associated software algorithms that significantly improves the performance of the Stack Machine...
US20050262286 Intelligent memory device multilevel ASCII interpreter  
System and method for interpreting ASCII code fetched from a code space of a task partition that is part of memory shared by a host processor and a multitask controller (MTC). The MTC includes a...
US20080082622 Communication in a cluster system  
Methods, systems and computer program products to communicate between System On Chip (SOC) units in a cluster configuration are provided herein. A local SOC unit that includes a local controller...
US20050160215 Flow through asynchronous elastic FIFO apparatus and method for implementing multi-engine parsing and authentication  
A flow through asynchronous elastic first-in, first-out (FIFO) apparatus and method are provided for implementing multi-engine parsing and authentication. A FIFO random access memory (RAM) has a...
US20060224415 Pharmacy system data interface system and method  
A method for receiving prescription data from a pharmacy is provided. The method includes emulating a device, such as using a pseudo TTY feature of a Unix operating system or a pseudo device of a...
US20060236019 Libraries and data structures of materials removed by debulking catheters  
Material removed by a debulking catheter from a body lumen can be preserved. Materials can be collected from many different patients and/or from multiple procedures on individual patients. Data...
US20090182927 Direct Memory Move of Multiple Buffers Between Logical Partitions  
A method, apparatus and program product are provided for moving data from a source memory zone to a target memory zone of a computer. A source host operating system invokes a synchronous multiple...
US20080301285 Methods, apparatus and systems for analyzing data carried by a plurality of data tributaries, wherein the analysis is based on a mapping of the data tributaries to one or more tributary sets  
In one embodiment, data carried by a plurality of data tributaries is received. As the data is received, a stored mapping of data tributaries to one or more tributary sets is accessed, and common...
US20090006712 DATA ORDERING IN A MULTI-NODE SYSTEM  
Methods and apparatuses for data ordering in a multi-node system that supports non-snoop memory transactions.
US20050235094 Information processor capable of using past processing space  
An information processor uses the past processing space to shorten the time spent for starting up programs, thereby increasing convenience for the user. A memory unit provides memory space that...
US20050120385 State-based memory unloading  
A system is described for managing memory, the system including, among other things, a memory with logic and a processor configured with the logic to receive an indication of an application state...
US20050102465 Managing a cache with pinned data  
In a Constant Access Time Bounded cache, reserving a first number of unallocated lines in the cache for pinned data, the first number being less than the number of lines in the cache; and if data...
US20050138263 Method and apparatus to retain system control when a buffer overflow attack occurs  
A function call is executed during execution of a program. In response, a return address of the call is saved in a first stack and in a second stack, allocated by the operating system. After the...
US20050289284 High speed memory modules  
Apparatus and method for producing memory modules having a plurality of branches connected to a memory bus, each branch containing at least one dynamic random access memory (DRAM) device or...
US20060248260 Circuit system  
A circuit system includes a means for controlling a first and a second memory unit by means of a differential control signal. The differential control signal includes a first control signal and a...
US20050198449 Determination of memory configuration  
A system is disclosed that comprises a processor, a memory subsystem coupled to the processor, a display coupled to the processor, and logic accessible to the processor that determines the...
US20060123183 System and method for viewing digital visual content on a device  
A system and method for viewing material displayed on an electronic device. When a user desires to view a document, only a portion of which is viewable on a display at a given moment, the portion...
US20050080981 Structure and method for managing workshares in a parallel region  
A data processing system is adapted to execute at least one workshare construct in a parallel region. The data processing system uses at least one thread for executing a corresponding subsection...
US20050027921 Information processing apparatus capable of prefetching instructions  
A prefetch address calculation unit detects a branch instruction and a data access instruction to be reliably executed from a series of instruction included in an entry that is stored in a buffer...
US20050055490 Collision handling apparatus and method  
The present invention relates to mechanisms for handling and detecting collisions between threads (5, 6, 7) that execute computer program instructions out of program order. According to an...
US20080055328 MAPPING METHOD AND VIDEO SYSTEM FOR MAPPING PIXEL DATA INCLUDED IN THE SAME PIXEL GROUP TO THE SAME BANK OF MEMORY  
Provided are a mapping method and a video system for mapping pixel data included in the same pixel group to the same bank of a memory, A method for mapping the position of pixel data of a picture...
US20050091440 Memory system and memory module  
To increase data transfer rate of a memory system in which a plurality of memory modules are stacked using mezzanine connectors, stacked blind vias and buried vias for connecting only specific...
US20090106479 MANAGING MEMORY SYSTEMS CONTAINING COMPONENTS WITH ASYMMETRIC CHARACTERISTICS  
A memory controller (MC) is associated with a remapping table to enable access to content in a memory system that includes asymmetric memory. The MC receives a request for a memory read or an...
US20050066109 Method and apparatus for designing a computer system  
In one embodiment, a method for designing a computer system comprises selecting an amount of internal memory for the computer system and providing the amount of internal memory to a non-linear...
US20100005217 MULTI-MODE MEMORY DEVICE AND METHOD  
Memory device systems, systems and methods are disclosed, such as those involving a plurality of stacked memory device dice and a logic die connected to each other through a plurality of...
US20050120160 System and method for managing virtual servers  
A management capability is provided for a virtual computing platform. In one example, this platform allows interconnected physical resources such as processors, memory, network interfaces and...
US20050289287 Method and apparatus for interfacing between test system and embedded memory on test mode setting operation  
A method of entering memory module mounted on a memory system or a plurality of memories mounted on the memory module into a test mode, and a first register and a second register for performing...
US20060294289 Method and apparatus for obscuring data on removable storage devices  
A method and apparatus for obscuring data held on a storage device associated with a storage system controller are provided. Data is obscured by swapping bit values according to a scrambling key,...
US20090164696 PHYSICAL BLOCK ADDRESSING OF ELECTRONIC MEMORY DEVICES  
Systems and/or methods that facilitate accessing data to/from a memory are presented. An electronic memory component can operate with reduced data access times by eliminating/reducing the use of...
US20070124530 Portable electronic device and control method of portable electronic device  
An IC card has a memory storing record files having management information and record data. When receiving a record-based command which specifies a record file stored in the memory, the IC card...
US20100125694 MEMORY DEVICE AND MANAGEMENT METHOD OF MEMORY DEVICE  
A memory device and a method for managing the memory device is provided. The memory device includes a flash memory including a plurality of pages, a non-volatile RAM storing a first mapping table...
US20050044301 Method and apparatus for providing virtual computing services  
A level of abstraction is created between a set of physical processors and a set of virtual multiprocessors to form a virtualized data center. This virtualized data center comprises a set of...
US20080098152 METHOD AND APPARATUS FOR CONFIGURING A MEMORY DEVICE  
Embodiments of the invention generally provide a memory device and a method for providing the memory device. In one embodiment, the method includes providing one or more layers including a memory...
US20150178197 Addressing Auto address Assignment and Auto-Routing in NAND Memory Network  
A topology for memory circuits of a non-volatile memory system reduces capacitive loading. For a given channel, a single memory chip can be connected to the controller, but is in turn connected to...
US20120137043 SECURITY CONFIGURATION FOR MEMORY ACCESS CONTROL  
A system for controlling access to resources in an apparatus when the apparatus is not active. Emerging technologies may allow information to be accessed in an apparatus memory without the...

Matches 1 - 50 out of 58 1 2 >