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US20110225225 |
METHOD, PROGRAM, AND SYSTEM FOR SOLVING ORDINARY DIFFERENTIAL EQUATION
Each ordinary differential equation of simultaneous ordinary differential equations is solved with an embedded Runge-Kutta method. A difference Δ between an N-th order approximation and an (N+1)th ...
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US20130086136 |
ADDING ENTROPY FOR IMPROVED RANDOM NUMBER GENERATION IN A COMPUTER SYSTEM
A parallel computer system adds entropy to improve the quality of random number generation by using parity errors as a source of entropy because parity errors are influenced by external forces such...
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US20100306296 |
ADDING ENTROPY FOR IMPROVED RANDOM NUMBER GENERATION IN A COMPUTER SYSTEM
A parallel computer system adds entropy to improve the quality of random number generation by using parity errors as a source of entropy because parity errors are influenced by external forces such...
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US20120041997 |
FUSED MULTIPLY-ADD ROUNDING AND UNFUSED MULTIPLY-ADD ROUNDING IN A SINGLE MULTIPLY-ADD MODULE
A computer processor including a single fused-unfused floating point multiply-add (FMA) module computes the result of the operation A*B+C for floating point numbers for fused multiply-add rounding...
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US20130117341 |
DECIMAL ELEMENTARY FUNCTIONS COMPUTATION
A method for executing a decimal elementary function (DEF) computation from multiple decimal floating-point operands, including: extracting mantissae and exponents from the operands; generating...
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US20110150213 |
WHITE-BOX IMPLEMENTATION
A system for enabling a device to compute an outcome of an exponentiation Cx having a base C and/or an exponent x, the system comprising means for establishing a plurality of values λi; means for ...
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US20120226731 |
LOW DEPTH COMBINATIONAL FINITE FIELD MULTIPLIER
A method for generating a design of a multiplier is disclosed. The method generally includes steps (A) to (C). Step (A) may generate a first circuit comprising a plurality of polynomial results of...
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US20110055552 |
PRIVATE, ACCOUNTABLE, AND PERSONALIZED INFORMATION DELIVERY IN A NETWORKED SYSTEM
A client receives a notification of a user interaction with an information item and creates a record describing this interaction. The client encrypts the record using an encryption key associated...
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US20120059866 |
METHOD AND APPARATUS FOR PERFORMING FLOATING-POINT DIVISION
A method and apparatus provides for performing floating-point division using input check/output correction floating-point division logic and a floating-point division fix-up instruction (e.g., an...
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US20110238461 |
COMPUTER PROGRAM PRODUCT AND METHOD FOR SALES FORECASTING AND ADJUSTING A SALES FORECAST
A computer program product and method for sales forecasting and adjusting a sales forecast for an enterprise in a configurable region having one or more clusters of stores. The method includes...
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US20120290867 |
MATRIX COMPUTATION FRAMEWORK
Described herein are technologies pertaining to matrix computation. A computer-executable algorithm that is configured to execute perform a sequence of computations over a matrix tile is received...
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US20080046491 |
CONFIGURABLE UNIT CONVERSION SYSTEMS AND METHODS THEREOF
A unit conversion system configuration method includes the following steps. The unit conversion system includes a unit converter converting a unit to another unit utilizing a repository of unit...
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US20080172433 |
METHOD FOR MODELING A STRUCTURE OF A SPIDER WEB USING COMPUTER PROGRAMMING
The methods for modeling a structure of a spider web using computer programming are disclosed. First method of modeling elliptical spider webs using computer programming includes inputting...
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US20110004646 |
APPARATUS FOR STREAMLINED IMPLEMENTATION OF INTERPOLATION IN MULTIPLE DIMENSIONS
A system for efficiently implementing a multi-dimensional interpolation in a way which is predicated on dynamic interpolation-input makeup, the method comprising: processing, said interpolation's...
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US20130024489 |
METHOD FOR FAST CALCULATION OF THE BEGINNING OF PSEUDO RANDOM SEQUENCES FOR LONG TERM EVOLUTION
An apparatus including a first circuit and a second circuit. The first circuit may be configured to generate pseudo-random sequences in response to a first m-sequence and a second m-sequence, where...
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US20110065079 |
METHOD USING EXERCISE TO RANDOMLY IDENTIFY CHAPTERS IN THE BIBLE FOR STUDY
A method for randomly identifying a chapter in the Bible from the number of repetitions of a physiological action that occurs during exercise. A physiological measuring device is attached to one or...
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US20110258190 |
Spectral Neighborhood Blocking for Entity Resolution
A processing device of an information processing system is operative to obtain a plurality of records, documents, web pages or other data objects, and to construct a binary tree using a bipartition...
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US20120185522 |
Generating a Number based on Mask and Range Constraints
Generating a number based on mask and range constraints. For example, a method of generating a pseudo random number satisfying a range constraint and a mask constraint may include determining a...
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US20130073598 |
Entropy source with magneto-resistive element for random number generator
An entropy source and a random number (RN) generator are disclosed. In one aspect, a low-energy entropy source includes a magneto-resistive (MR) element and a sensing circuit. The MR element is...
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US20110046927 |
FAST ITERATIVE METHOD FOR PROCESSING HAMILTON-JACOBI EQUATIONS
A system and method are provided for a parallel processing of the Hamilton-Jacobi equation. A numerical method is provided to solve the Hamilton-Jacobi equation that can be used with various...
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US20100299379 |
Non-Negative Matrix Factorization as a Feature Selection Tool for Maximum Margin Classifiers
Non-negative matrix factorization, NMF, is combined with identification of a maximum margin classifier by minimizing a cost function that contains a generative component and the discriminative...
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US20110185000 |
Method for carry estimation of reduced-width multipliers
A low-error reduced-width multiplier is provided by the present invention. The multiplier can dynamically compensate the truncation error. The compensation value is derived by the dependencies...
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US20080225939 |
MULTIFUNCTIONAL VIDEO ENCODING CIRCUIT SYSTEM
The present invention discloses a multifunctional video encoding circuit system capable of performing six types of operations: addition, subtraction, multiplication, multiply-accumulation,...
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US20110145310 |
METHOD FOR UPDATING AN ENCODER BY FILTER INTERPOLATION
A method for updating the processing capacity of an encoder or decoder to use a modulated transform having a size greater than a predetermined initial size is provided, particularly, where the...
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US20110238720 |
SOLVING LINEAR MATRICES IN AN INTEGRATED CIRCUIT DEVICE
Circuitry for solving linear matrix equations involving a resultant matrix, an unknown matrix and a product matrix that is a product of the resultant matrix and the unknown matrix includes matrix...
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US20120143934 |
MECHANISM FOR CARRYLESS MULTIPLICATION THAT EMPLOYS BOOTH ENCODING
An apparatus having operand registers, an opcode dectector, a carryless preformat unit, a compressor, a left shifter, and exclusive-OR logic. The operand registers receive operands for a carryless...
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US20130117343 |
Unified Forward and Inverse Transform Architecture
Multiple transform sizes improve video coding efficiency, but also increase the implementation complexity. Furthermore, both forward and inverse transforms need to be supported in various consumer...
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US20080126457 |
Computer System for Storing Infinite, Infinitesimal, and Finite Quantities and Executing Arithmetical Operations with Them
In this invention we describe a new type of computer—infinity computer—that is able to operate with infinite, infinitesimal, and finite numbers in such a way that it becomes possible to execute the...
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US20110238718 |
LOOK UP TABLE STRUCTURE SUPPORTING QUATERNARY ADDERS
A lookup table structure having multiple lookup tables is configured to include a quaternary adder. In particular examples, an adaptive logic module (ALM) including a fracturable lookup table (LUT)...
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US20110314073 |
METHODS FOR EFFICIENT STATE TRANSITION MATRIX BASED LFSR COMPUTATIONS
A method for efficient state transition matrix based LFSR computations are disclosed. A polynomial associated with a linear feedback shift register is defined. This polynomial is used to generate a...
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US20120239720 |
EFFICIENT AND RELIABLE COMPUTATION OF RESULTS FOR MATHEMATICAL FUNCTIONS
For efficient computation of results for mathematical functions, a method receives a mathematical function call. The call includes a plurality of arguments for which a range of computable results...
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US20110066833 |
CHURCH-TURING THESIS: THE TURING IMMORTALITY PROBLEM SOLVED WITH A DYNAMIC REGISTER MACHINE
A new computing machine and new methods of executing and solving heretofore unknown computational problems are presented here. The computing system demonstrated here can be implemented with a...
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US20120221614 |
Processor Pipeline which Implements Fused and Unfused Multiply-Add Instructions
Implementing an unfused multiply-add instruction within a fused multiply-add pipeline. The system may include an aligner having an input for receiving an addition term, a multiplier tree having two...
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US20110231460 |
APPARATUS AND METHOD FOR FLOATING-POINT FUSED MULTIPLY ADD
A fused multiply add (FMA) unit includes an alignment counter configured to calculate an alignment shift count, an aligner configured to align an addend input based on the alignment shift count and...
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US20070244960 |
Configurable IC's with large carry chains
Some embodiments provide a configurable IC that includes several configurable logic circuits, where the logic circuits include several sets of associated configurable logic circuits. For each...
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US20120143936 |
RADIX-8 FIXED-POINT FFT LOGIC CIRCUIT CHARACTERIZED BY PRESERVATION OF SQUARE ROOT-i OPERATION
A system and method to reduce roundoff error of Fast Fourier transform (FFT) operation. Data which comes out as an irrational number (a square root) out of twiddle factors on a complex plane,...
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US20120078986 |
Trading & Investment Calculator
The specification discloses a handheld computing device or portable electronic calculator that comprises a software application adapted to provide instructions to perform math operations to...
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US20060173944 |
Exponential function generator
An exponential function generator for generating an exponential generator to realize a linear region of about 60 dB required for the an ultra wide band system (UWB). Since the exponential function...
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US20110225223 |
GENERATING UNIQUE RANDOM NUMBERS FOR MULTIPLE INSTANTIATIONS
In a first embodiment of the present invention, a method for generating a random number for an instance of a hardware description language definition is provided, the method comprising: generating...
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US20110200188 |
Method of performing cipher block chaining using elliptic polynomial cryptography
The method of performing cipher block chaining using elliptic polynomial cryptography allows for the encryption of messages through elliptic polynomial cryptography and, particularly, with the...
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US20130007084 |
FLOATING-POINT ADDER
Floating point adder circuitry 16, 18, 20 is provided with far-path circuitry 18 and near-path circuitry 20. The far-path circuitry utilises a count of trailing zeros TZ and a difference in the...
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US20070220075 |
Race track betting calculator
A portable electronic device, e.g., a calculator, with the basic functions of addition, subtraction, multiplication and division with a dedicated program for a racing sport is disclosed herein. The...
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US20120041906 |
Supervised Nonnegative Matrix Factorization
Supervised kernel nonnegative matrix factorization generates a descriptive part-based representation of data, based on the concept of kernel nonnegative matrix factorization (kernel NMF) aided by...
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US20110320514 |
DECIMAL ADDER WITH END AROUND CARRY
Binary code decimal (BCD) arithmetic add/subtract operations on two BCD numbers independent of which BCD number is of a greater magnitude include, responsive to the BCD arithmetic add/subtract...
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US20120089655 |
System and Method of Dynamic Precision Operations
In an embodiment, a method performs computer operations using a first fractional precision and a second fractional precision. A computer program has a source variable, a destination variable, and...
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US20080043416 |
Method and apparatus for hands free wearable computer
A hands free wearable computer is provided. The hands free wearable computer includes an adjustable display tray, a split hands free two-hand foldable integrated input device that can be carried by...
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US20110216852 |
Architectures and methods for code combiners
Various embodiments are directed to systems and methods for combining a plurality of codes. The plurality of codes may be binary codes having possible logical values of −1 and +1 and may comprise a...
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US20080222062 |
SUPERVISED RANK AGGREGATION BASED ON RANKINGS
A method and system for rank aggregation of entities based on supervised learning is provided. A rank aggregation system provides an order-based aggregation of rankings of entities by learning...
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US20130013262 |
METHOD OF PERFORMING SYNTHETIC INSTRUMENT BASED NOISE ANALYSIS USING PROPORTIONAL BANDWIDTH SPECTRUM ANALYSIS TECHNIQUES
A system and method for filtering an input signal with at least a first and a second octave portions is presented. A proportional bandwidth filter system includes a bandwidth reducing filter, a...
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US20120054623 |
DYNAMIC REBASING OF PERSISTED TIME INFORMATION
Dynamic time rebasing may be provided. After receiving a request to view a calendar item, a base time associated with the calendar item may be retrieved. A local bias associated with the request to...
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