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US20140214910 
Implementing Modified QR Decomposition in Hardware
System and method for computing QR matrix decomposition and inverse matrix R−1. A circuit is configured to implement a QR decomposition of a matrix A into two matrices Q and R using a Modified G...


US20140207839 
Spatial Arithmetic Method of Integer Factorization
A computer system represents numbers as threedimensional relations, which may be represented as collections of points in threedimensional space. The threedimensional representations may use...


US20140082039 
Interleaved Method for Parallel Implementation of the Fast Fourier Transform
The present invention generally relates to a method for computing a Fast Fourier Transform (FFT). In one embodiment, the present invention relates to an interleaved method for computing a Fast...


US20120278374 
Decimal FloatingPoint Quantum Exception Detection
A system and method for detecting decimal floating point data processing exceptions. A processor accepts at least one decimal floating point operand and performs a decimal floating point operation...


US20100299381 
Algorithm for the Adaptive Infinite Impulse Response Filter
A new method to adjust the parameters of an adaptive Infinite Impulse Response (IIR) filter is suggested. The method adjusts the set of parameters of the pole polynomial of the filter. The...


US20140067896 
Universe has an End
The “Big Bung!” was not at the beginning of Universe!


US20120084335 
METHOD AND APPARATUS OF PROCESSING FLOATING POINT NUMBER
A method and apparatus of processing floating point number(s) is provided. The method which processes a plurality of first floating point numbers each having a mantissa and an exponent includes:...


US20140075410 
METHODS AND SYSTEMS FOR DETERMINING A FORMULA
In a method to help a user determine a formula, (e.g., a fact, rule, or principle expressed in scientific, mathematical, technical, etc. symbols), a user may input an indication of the formula in...


US20110125466 
ComputerImplemented Systems And Methods For Determining SteadyState Confidence Intervals
Computerimplemented systems and methods for estimating confidence intervals for output generated from a computer simulation program that simulates a physical stochastic process. A plurality of...


US20120179734 
METHOD AND APPARATUS FOR DISCRETE COSINE TRANSFORM/INVERSE DISCRETE COSINE TRANSFORM
Discrete cosine transform/inverse discrete cosine transform method and device are provided. The discrete cosine transform/inverse discrete cosine transform method includes: generating a table index...


US20130046805 
Precision Measurement of Waveforms Using Deconvolution and Windowing
The invention consists of new ways of constructing a Measuring Matrices (MMs) including time deconvolution of Digital Fourier Transforms DFTs. Also, windowing functions specifically designed to...


US20130066933 
METHOD AND APPARATUS FOR DERIVING COMPOSITE TIE METRIC FOR EDGE BETWEEN NODES OF A TELECOMMUNICATION CALL GRAPH
A method for deriving a composite tie metric for an edge between nodes of a telecommunication call graph includes receiving descriptive data with original values for descriptive attributes...


US20110295921 
Hybrid Greatest Common Divisor Calculator for Polynomials
A hybrid greatest common divisor (GCD) calculator analyzes characteristics of polynomials and selects a particular GCD algorithm from multiple available GCD algorithms based on a combination of...


US20110160902 
METHOD AND APPARATUS FOR PRODUCING CUSTOMIZED FOOD BLENDS FOR ANIMALS
A method and apparatus for producing customized food blends for animals includes a food assembler that is in electrical connection with one or more computer systems that provide instructions and...


US20110191400 
L1 Projections with Box Constraints
Similarities between simplex projection with upper bounds and L1 projection are explored. Criteria for apriori determination of sequence in which various constraints become active are derived, and...


US20130173683 
Range Check Based Lookup Tables
Mechanisms for utilizing a reduced lookup table circuit to perform an operation in a data processing device are provided. A first input value is input for selecting a subset of values from the...


US20130173681 
Range Check Based Lookup Tables
Mechanisms for utilizing a reduced lookup table circuit to perform an operation in a data processing device are provided. A first input value is input for selecting a subset of values from the...


US20120047193 
LOCUS SMOOTHING METHOD
The present invention discloses a locus smoothing method, comprising: generating multiple locus points by movement of an object; obtaining corresponding coordinates of the locus points; calculating...


US20110029589 
LOW POWER FIR FILTER IN MULTIMAC ARCHITECTURE
Embodiments of the invention are directed to system and method that enable relatively low power dissipation by scheduling operations of multiply accumulators chain of two or more multiply...


US20120290632 
METHOD OF GENERATING RANDOM NUMBERS II
A method of obtaining uniform and independent random numbers is given 1. by taking two distinct odd primes p1,p2 that give mutually coprime integers, an odd q1=(p1−1)/2 and an even q2=(p2−1)/2, to ...


US20120331023 
INTERACTIVE EXHIBITS
Disclosed in one example is a method for providing an interactive exhibit to a user. The method may include creating plotting instructions for an interactive exhibit based on an exhibit description...


US20120237025 
DEVICE AND METHOD FOR DETERMINING AN INVERSE OF A VALUE RELATED TO A MODULUS
A device for determining an inverse of an initial value related to a modulus, comprising a unit configured to process an iterative algorithm in a plurality of iterations, wherein an iteration...


US20050278407 
Addressing type of asynchronous divider
The present invention relates to an addressing type of asynchronous divider that uses addressing system, which enables an external circuit to receive a divisor and a dividend. Through the process...


US20110289131 
MACHINE DIVISION
Techniques are generally described that include methods, devices, systems and/or apparatus for dividing a numerator by a denominator. Some example methods may include selecting a first numerical...


US20130151576 
APPARATUS AND METHOD FOR ROUNDING A FLOATINGPOINT VALUE TO AN INTEGRAL FLOATINGPOINT VALUE
Processing circuitry is provided to perform an operation FRINT for rounding a floatingpoint value to an integral floatingpoint value. Control circuitry controls the processing circuitry to...


US20100023575 
PREDICTOR
A Predictor is described which is based on a modified RLS (recursive least squares) algorithm. The modifications prevent divergence and accuracy problems when fixed point implementation is used.


US20140122549 
Intermediate Steps Display for a Calculator
This patent is for a device that displays the steps involved in a calculation as well as the answer of the calculation. By doing this you preserve the main benefits of the calculator (speed and...


US20130262550 
MATRIX CALCULATION DEVICE, MATRIX CALCULATION METHOD, AND STORAGE MEDIUM HAVING MATRIX CALCULATION PROGRAM STORED THEREON
A matrix calculation device includes a first partition position display unit configured to distinguishably display a partition position of the one matrix partitioned by the matrix partitioning...


US20110099217 
Method and System for Determining a Quotient Value
A method for determining a quotient value from a dividend value and a divisor value in a digital processing circuit is provided. The method includes computing a reciprocal value of the divisor...


US20060089956 
Classification unit and methods thereof
A classification unit is to process an odd number of inputs in a single instruction cycle by comparing all distinct pairs of inputs and selecting one of the inputs based on the comparisons.


US20140192977 
MUTIPLICATION METHOD AND MODULAR MULTIPLIER USING REDUNDANT FORM RECODING
A multiplication method and a modular multiplier are provided. The multiplication method includes transforming a redundantform multiplier by adding a recoding constant to the multiplier,...


US20120323982 
METHOD AND STRUCTURE FOR PROVABLY FAIR RANDOM NUMBER GENERATOR
A random number generator includes a fairness checker and correction module that ensures that a complete random sequence within a predetermined period of time will be output by the random number...


US20110047199 
CORRELATION APPARATUS AND METHOD FOR ACQUIRING ROBUST SYNCHRONIZATION
Provided is a correlation apparatus and method for acquiring a robust synchronization. The correlation method may include: calculating a received symbol phase difference with respect to a received...


US20110289128 
Method of performing discrete cosine transform
The present invention provides method and apparatus of a fast DCT implementation. DCT calculation is combined with quantization scales by a procedure of preprocessing. During DCT coefficient...


US20140181171 
METHOD AND SYSTEM FOR FAST TENSORVECTOR MULTIPLICATION
A method and a system for fast tensorvector multiplication provide factoring an original tensor into a kernel and a commutator, multiplying the kernel obtained by the factoring of the original...


US20130054666 
METHOD FOR PREDICTING THE DURATION OF A FUTURE TIME INTERVAL
A method for predicting a value for a length of a future time interval in which a physical variable changes is described, in which at least one measured value for the length of a past time interval...


US20120036175 
DETERMINING POPULATION BOUNDARIES USING RADIAL DENSITY HISTOGRAMS
Apparatuses and methods for determining population boundaries are described. In one embodiment, population boundaries are determined using radial density histograms.


US20110078224 
Nonlinear Dimensionality Reduction of Spectrograms
Embodiments of the invention disclose a system and a method for reducing a dimensionality of a spectrogram matrix. The method constructs an intermediate time basis matrix and an intermediate...


US20110295920 
ComputerImplemented Symbolic Polynomial Factorization
An input polynomial, in symbolic form, is received, classified, preprocessed, and factored. The input polynomial is classified as a constant, a univariate polynomial, or a multivariate polynomial....


US20090290800 
CortexLike Learning Machine for Temporal and Hierarchical Pattern Recognition
A cortexlike learning machine, called a probabilistic associative memory (PAM), is disclosed for recognizing spatial and temporal patterns. A PAM is usually a multilayer or recurrent network of...


US20120066279 
Techniques for Use with Automated Circuit Design and Simulations
An apparatus having two or more parallel carry chain structures, each of the carry chain structures comprising a series of logical structures, where at least one of the logical structures within...


US20140040335 
METHOD OF ENTROPY DISTRIBUTION ON A PARALLEL COMPUTER
Method, system, and computer program product for performing an operation, the operation including, responsive to receiving a file system request at a file system, retrieving a first entropy pool...


US20070244955 
METHOD FOR LOCATING A SERVO MOTOR CONTROLLER
The method of locating a servo motor controller's position of the present invention utilizes accrual calculation method to ensure the positions of motor controller at each station of the production...


US20140059105 
ACCURACY CONFIGURABLE ADDERS AND METHODS
A preferred method of accuracy configuration with an approximate adder receives two input operands and generates a first approximate adder output with a plurality of subadders having a first...


US20110202585 
GENERATING PARTIAL SUMS
A method for generating partial sums from at least four multipledigit sequences in a computing device includes partitioning the multipledigit sequences into at least a first set of multipledigit...


US20110225225 
METHOD, PROGRAM, AND SYSTEM FOR SOLVING ORDINARY DIFFERENTIAL EQUATION
Each ordinary differential equation of simultaneous ordinary differential equations is solved with an embedded RungeKutta method. A difference Δ between an Nth order approximation and an (N+1)th ...


US20140101220 
COMPOSITE FINITE FIELD MULTIPLIER
A composite finite field multiplier is disclosed. The multiplier includes a controller, an input port, an output port, a GF((2n)2) multiplier, a GF(2n) standard basis multiplier, and a GF(2n)...


US20130179664 
DIVISION UNIT WITH MULTIPLE DIVIDE ENGINES
Techniques are disclosed relating to integrated circuits that include hardware support for divide and/or square root operations. In one embodiment, an integrated circuit is disclosed that includes...


US20130086136 
ADDING ENTROPY FOR IMPROVED RANDOM NUMBER GENERATION IN A COMPUTER SYSTEM
A parallel computer system adds entropy to improve the quality of random number generation by using parity errors as a source of entropy because parity errors are influenced by external forces such...


US20100306296 
ADDING ENTROPY FOR IMPROVED RANDOM NUMBER GENERATION IN A COMPUTER SYSTEM
A parallel computer system adds entropy to improve the quality of random number generation by using parity errors as a source of entropy because parity errors are influenced by external forces such...
