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US20120259908 FAST CARRY LOOKAHEAD CIRCUITS  
A fast lookahead carry adder includes adder logic and lookahead carry-path logic coupled to the adder logic. The carry path logic has a main carry path, a carry entrance path and a carry exit...
US20080109508 SYSTEM HAVING A CARRY LOOK-AHEAD (CLA) ADDER  
In a system having stored operands in various locations, addition is performed without having to store the operands in preparation for an add operation. Bitwise propagate and generate terms are...
US20050091299 Carry look-ahead adder having a reduced area  
The present invention relates to a carry look-ahead adder. The carry look-ahead adder is configured in 4-bit units in general. Each 4-bt carry look-ahead adder is combined with a carry look-ahead...
US20090187617 Carry look-ahead circuit and carry look-ahead method  
A carry look-ahead circuit generates a generate output for generating a carry, from a plurality of inverted generate inputs and a plurality of inverted propagate inputs to peer bits of a first...
US20090138537 Address generating circuit and semiconductor memory device  
An address generating circuit includes a first carry look-ahead circuit for performing an operation using an inputted first carry and a first address and outputting a first output address and a...
US20090112963 METHOD TO PERFORM A SUBTRACTION OF TWO OPERANDS IN A BINARY ARITHMETIC UNIT PLUS ARITHMETIC UNIT TO PERFORM SUCH A METHOD  
A method, circuit apparatus, and a design structure on which the circuit resides, is provided to perform a subtraction of two operands in a binary arithmetic unit by subdividing two operands into...
US20080228847 N Bit Adder and Corresponding Adding Method  
An n bit adder includes first computing circuit with 2n inputs for receiving n values of bits of first and second binary numbers and an additional input for receiving an input carry digit. The...
US20140006470 Carry Look-Ahead Adder with Generate Bits and Propagate Bits Used for Column Sums  
A carry look-ahead adder includes an input stage to produce generate bits and propagate bits from input signals. An output stage produces output sums exclusively from the generate bits, the...
US20160371058 MIXED-RADIX CARRY-LOOKAHEAD ADDER ARCHITECTURE  
Embodiments described herein are directed to mixed-radix carry-lookahead adders and methods performed thereby. The mixed-radix carry-lookahead adder includes an multiple carry-lookahead stages,...
US20160239268 ADDING APPARATUS USING TIME INFORMATION AND A METHOD THEREOF  
An adding apparatus according to an example of the present invention comprises: a time adder for outputting a time addition signal using time information of the first input signal and time...

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