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US20070198623 
FAST FOURIER TRANSFORMATION APPARATUS, OFDM COMMUNICATION APPARATUS AND SUBCARRIER ASSIGNMENT METHOD FOR OFDM COMMUNICATION
Output terminal 340 extracts specific subcarrier data assigned by a base station from at least one of a plurality of butterfly operation sections provided in output terminal 340. The butterfly... 

US20100121797 
STANDOFF DETECTION FOR NITRIC ACID
In one embodiment, a method is disclosed that includes obtaining at least one measurement in a spectral domain of a sample and computing one or more measurements of the salient features in the... 

US20090112959 
Singlecycle FFT butterfly calculator
In accordance with exemplary embodiments, a Fast Fourier Transform (FFT) architecture includes elements that perform a radix2 FFT butterfly in one processor clock cycle at steady state. Some... 

US20090013021 
VARIABLE LENGTH FFT SYSTEM AND METHOD
The present invention discloses a variable length fast Fourier transform (FFT) system and a method for performing the FFT system in a global navigation satellite system (GNSS) signal acquisition... 

US20100325132 
QUERYING COMPRESSED TIMESERIES SIGNALS
A system described herein includes a receiver component that receives a query that pertains to a raw timeseries signal. A query executor component selectively executes the query over at least one... 

US20120263212 
ADDITION/SUBTRACTION HARDWARE OPERATOR, PROCESSOR AND TELECOMMUNICATION TERMINAL INCLUDING AN OPERATOR OF THIS TYPE
An addition/subtraction hardware operator includes a plurality of addition/subtraction hardware modules and a plurality of transmission links between these modules, on one hand, and between inputs... 

US20090135928 
DEVICE, APPARATUS, AND METHOD FOR LOWPOWER FAST FOURIER TRANSFORM
A device, apparatus and method for performing a Fast Fourier Transform (FFT). The Fast Fourier Transform (FFT) processing device includes a coefficient generator, a memory, and an accumulator. The... 

US20090055459 
FREQUENCYDOMAIN EQUALIZER
A digital signal processing structure includes a processing unit configured to perform a fast Fourier transformation of length N on signal samples of word length WL, wherein the processing unit is... 

US20080288568 
Low power Fast Hadamard transform
Fast Hadamard transforms (FHT) are implemented using a pipelined architecture having an input stage, a processing stage, and an output stage, the FHT having a single internal loop back between the... 

US20090307293 
METHOD FOR DETERMINING AN OPTIMUM SAMPLING FREQUENCY, AND A POWER ANALYZER PERFORMING THE METHOD
A method for determining an optimum sampling frequency to be performed by a power analyzer includes the following computerimplemented steps: sampling a time domain signal to obtain a sampling... 

US20120016923 
Circuit and method for implementing FFT/IFFT transform
A circuit and a method for implementing Fast Fourier Transform (FFT)/Inverse Fast Fourier Transform (IFFT) are provided. The method includes: determining the number m of iterations, depth dl of... 

US20090245092 
APPARATUS, PROCESSES, AND ARTICLES OF MANUFACTURE FOR FAST FOURIER TRANSFORMATION AND BEACON SEARCHING
In embodiments, a wireless receiver employs a hardwarebased Fast Fourier Transform (FFT) engine controlled by firmware. The FFT engine executes tasks stored in a task list. Each task is... 

US20070033244 
Fast fourier transform (FFT) architecture in a multimode wireless processing system
A system and method Fast Fourier Transform (FFT) method in a multimode wireless processing system. The method can include loading an input vector into an input buffer, initializing a second... 

US20050015420 
Recoded radix2 pipeline FFT processor
A singlepath delay feedback pipelined fast Fourier transform processor comprising at least one set of triplet FFT stage means: a first FFT stage means comprising a radix2 butterfly, a feedback... 

US20090248774 
REUSE ENGINE WITH TASK LIST FOR FAST FOURIER TRANSFORM AND METHOD OF USING THE SAME
An improved processing engine for performing Fourier transforms includes an instruction processor configured to process sequential instruction software commands and a Fourier transform engine... 

US20050198092 
Fast fourier transform circuit having partitioned memory for minimal latency during inplace computation
An FFT circuit is implemented using a radix4 butterfly element and a partitioned memory for storage of a prescribed number of data values. The radix4 butterfly element is configured for... 

US20090248775 
APPARATUS AND METHOD FOR AREA AND SPEED EFFICIENT FAST FOURIER TRANSFORM (FFT) PROCESSORING WITH RUNTIME AND STATIC PROGRAMMABILITY OF NUMBER OF POINTS
An apparatus and method for area and speed efficient fast Fourier transform (FFT) processing comprising mapping a onedimensional DFT to a multidimensional representation; reindexing the... 

US20100153479 
APPARATUS FOR SETTING UP START POINT OF FAST FOURIER TRANSFORM AND METHOD THEREOF
Disclosed are a fast Fourier transform (FFT) start point setting apparatus, and a method thereof. An FFT start point according to a synchronization acquisition result is moved to a CP direction by... 

US20090259706 
Method for establishing a simulating signal suitable for estimating a complex exponential signal
A method for establishing a simulating signal suitable for estimating a complex exponential signal includes the following computerimplemented steps: sampling a time domain signal of a physical... 

US20080307026 
Memory Address Generating Method and Twiddle Factor Generator Using the Same
The present invention relates to a memory address generating method and a twiddle factor generator using the memory address generating method in a fast Fourier transform (FFT) system. In the... 

US20060224652 
Instruction set processor enhancement for computing a fast fourier transform
This invention describes a method of computing a fast Fourier transform (FFT) using enhanced processor computational capabilities for more efficient and flexible implementation of an electronic... 

US20100088356 
FAST COMPUTATION OF GENERAL FOURIER TRANSFORMS ON GRAPHICS PROCESSING UNITS
Described is a technology for use with general discrete Fourier transforms (DFTs) performed on a graphics processing unit (GPU). The technology is implemented in a general library accessed through... 

US20100011044 
Device and method for determining and applying signal weights
The solution X0 to an initial system of equations with a Toeplitz coefficient matrix T0 can be efficiently determined from an approximate solution X to a system of equations with a coefficient... 

US20080320069 
VARIABLE LENGTH FFT APPARATUS AND METHOD THEREOF
The invention discloses a variable length FFT apparatus and a method thereof. The FFT apparatus includes a splitradix based FFT unit and a multiplexing unit. The splitradix based FFT unit has a... 

US20090202007 
Frequency dependent phase rotation prior to mapping in an OFDM transmitter
An input bit stream is phase rotated by reversing bit pairs and inverting bits. The manipulated bit stream is mapped to a symbol and the mapped symbol is converted to the time domain such that an... 

US20090116595 
SYSTEM AND METHODS FOR DETERMINING MASKING SIGNALS FOR APPLYING EMPIRICAL MODE DECOMPOSITION (EMD) AND FOR DEMODULATING INTRINSIC MODE FUNCTIONS OBTAINED FROM APPLICATION OF EMD
A computerimplemented method of signal processing is provided. The method includes generating one or more masking signals based upon a computed Fourier transform of a received signal. The method... 

US20070239815 
PIPELINE FFT ARCHITECTURE AND METHOD
Techniques for performing Fast Fourier Transforms (FFT) are described. In some aspects, calculating the Fast Fourier Transform is achieved with an apparatus having a memory (610), a Fast Fourier... 

US20080147764 
Motion estimation in image processing systems
A motion estimator 50 for image processing finds a motion vector from a search area in a reference picture to a source macroblock in a source picture by finding a maximum of a 2dimensional... 

US20090254598 
Folding of Input Data Values to a Transform Function
A method of processing a set of input data values comprises the steps of providing said input data values serially to circuitry comprising a number of memory elements; and performing in said... 

US20090106341 
Dynamically Reconfigurable Shared Baseband Engine
A reconfigurable processing block for use in a communications system capable of supporting multiple communication formats. The reconfigurable processing block comprises a plurality of modular... 

US20100094920 
DEVICE AND METHOD FOR EXECUTING FOURIER TRANSFORM
A Fourier transform device generates a first sequence according to an input sequence based on a stored lookup table, and generates an output sequence by performing a butterfly operation on the... 

US20110225224 
Efficient Complex Multiplication and Fast Fourier Transform (FFT) Implementation on the ManArray Architecture
Efficient computation of complex multiplication results and very efficient fast Fourier transforms (FFTs) are provided. A parallel array VLIW digital signal processor is employed along with... 

US20150058388 
FRACTIONAL SCALING DIGITAL FILTERS AND THE GENERATION OF STANDARDIZED NOISE AND SYNTHETIC DATA SERIES
Generation of standardized noise signals that provide mathematically correct noise with no errors and no loss of data, and can generate the noise of specific environments based on the transfer... 

US20080155003 
Pipelinebased reconfigurable mixedradix FFT processor
The present invention discloses a fast Fourier transform (FFT) processor based on multiplepath delay commutator architecture. A pipelined architecture is used and is divided into 4 stages with 8... 

US20140365547 
MIXEDRADIX PIPELINED FFT PROCESSOR AND FFT PROCESSING METHOD USING THE SAME
Disclosed herein are a mixedradix pipelined Fast Fourier Transform (FFT) processor and an FFT processing method using the same. The mixedradix pipelined Fast Fourier Transform (FFT) processor... 

US20050177608 
Fast Fourier transform processor and method using halfsized memory
In a fast Fourier transform processor and a fast Fourier transform method using halfsized memories, a butterfly computational element is utilized and one write operation and one read operation... 

US20050278404 
Method and apparatus for single iteration fast Fourier transform
The present invention is singleiteration Fourier transform processor. A Fourier transform processor performs Fourier transform of N input data into N output data with a radixr butterfly. The... 

US20060195502 
Group delay compensation using IFFT filters
A method, computer program, and apparatus for compensating for group delay. The method comprises the steps of generating a raw step response of a system, differentiating the raw step response to... 

US20080222228 
BANK OF CASCADABLE DIGITAL FILTERS, AND RECEPTION CIRCUIT INCLUDING SUCH A BANK OF CASCADED FILTERS
The present invention relates to a bank of digital filters that can be cascade connected. It also relates to a reception circuit comprising such a bank of cascaded filters. With the digital filter... 

US20090327787 
Power monitoring device
A power monitoring device is disclosed. In at least one embodiment, the power monitoring device includes a power parameter measurement unit for calculating the measurement results of basic power... 

US20050256917 
Address generators integrated with parallel FFT for mapping arrays in bit reversed order
Reducing the amount of required memory and instruction cycles when implementing Fast Fourier Transforms (FFTs) on a computer system is described. The invention optimizes FFT software using... 

US20100011043 
FAST FOURIER TRANSFORM ARCHITECTURE
A last fourier transform architecture has parallel data processing paths. Input data is applied to the parallel data processing paths in a repeating sequence, and processed in those paths. Data... 

US20140181168 
METHOD AND APPARATUS FOR REDUCED MEMORY FOOTPRINT FAST FOURIER TRANSFORMS
Generally, this disclosure describes a method and apparatus for reduced memory footprint fast Fourier transforms (FFTs). An apparatus may include intermediate factor circuitry configured to... 

US20100017452 
MEMORYBASED FFT/IFFT PROCESSOR AND DESIGN METHOD FOR GENERAL SIZED MEMORYBASED FFT PROCESSOR
For a large size FFT computation, this invention decomposes it into several smaller sizes FFT by decomposition equation and then transform the original index from one dimension into... 

US20060155795 
Method and apparatus for hardware implementation of high performance fast fourier transform architecture
An high performance Fast Fourier Transform implementation in hardware is achieved through placement of a number of Butterfly/Dragonfly or “FLY” cells that run concurrently during a transformation... 

US20060010189 
METHOD OF CALCULATING FFT
The method makes input data of length L correspond to a sequence of data having length M, calculates an exponent N such that a radix to the power of the exponent N is equal to the length M,... 

US20110270901 
Method and System for Bit Stacked Fast Fourier Transform
An FFT algorithm that splits a large bit width waveform into two parts, making it possible to conduct the FFT with much lower logic resource consumption is disclosed. The waveform is split into... 

US20090077148 
Methods and Apparatus for Perturbing an Evolving Data Stream for Time Series Compressibility and Privacy
Techniques for perturbing an evolving data stream are provided. The evolving data stream is received. An online linear transformation is applied to received values of the evolving data stream... 

US20130046806 
FAST FOURIER TRANSFORM CIRCUIT
Disclosed is a fast Fourier transform circuit capable of highspeed reading and writing of data processed in the individual stages of a fast Fourier transform calculation without segmenting... 

US20060167964 
Methods and systems for a multichannel fast fourier transform (FFT)
In at least some embodiments, a method is provided. The method includes receiving samples from a first input channel and a second input channel. The method further includes controlling commutators... 