Matches 1 - 50 out of 96 1 2 >


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US20150052092 METHODS AND SYSTEMS OF BRAIN-LIKE COMPUTING VIRTUALIZATION  
The invention discloses the technology of brain-like computing virtualization. Brain-like computing means the computing technology to mimic human brain and generate human intelligence...
US20120036099 METHODS AND SYSTEMS FOR REWARD-MODULATED SPIKE-TIMING-DEPENDENT-PLASTICITY  
Certain embodiments of the present disclosure support techniques for simplified hardware implementation of the reward-modulated spike-timing-dependent plasticity (STDP) learning rule in networks...
US20130159231 MULTI-MODAL NEURAL NETWORK FOR UNIVERSAL, ONLINE LEARNING  
In one embodiment, the present invention provides a neural network comprising multiple modalities. Each modality comprises multiple neurons. The neural network further comprises an interconnection...
US20130073493 UNSUPERVISED, SUPERVISED, AND REINFORCED LEARNING VIA SPIKING COMPUTATION  
The present invention relates to unsupervised, supervised and reinforced learning via spiking computation. The neural network comprises a plurality of neural modules. Each neural module comprises...
US20120323833 Organizing Neural Networks  
Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for organizing trained and untrained neural networks. In one aspect, a neural network device...
US20130046716 METHOD AND APPARATUS FOR NEURAL TEMPORAL CODING, LEARNING AND RECOGNITION  
Certain aspects of the present disclosure support a technique for neural temporal coding, learning and recognition. A method of neural coding of large or long spatial-temporal patterns is also...
US20130013544 MIDDLEWARE DEVICE FOR THREE-TIER UBIQUITOUS CITY SYSTEM  
Disclosed is a ubiquitous city (u-city) exclusive middleware to provide services to a u-city. A middleware device performs a role corresponding to a brain of a human being by aggregating u-city...
US20130159232 REGULATING ACTIVATION THRESHOLD LEVELS IN A SIMULATED NEURAL CIRCUIT  
A simulated neural element includes a cell body and one or more simulated branches. Simulated branches are configured to receive input signals and to activate when a combination of the signals...
US20090228415 MULTILAYER TRAINING IN A PHYSICAL NEURAL NETWORK FORMED UTILIZING NANOTECHNOLOGY  
A method for and system for training a connection network located between neuron layers within a multi-layer physical neural network. A multi-layer physical neural network can be formed having a...
US20140032465 SYNAPTIC, DENDRITIC, SOMATIC, AND AXONAL PLASTICITY IN A NETWORK OF NEURAL CORES USING A PLASTIC MULTI-STAGE CROSSBAR SWITCHING  
Embodiments of the invention provide a neural network comprising multiple functional neural core circuits, and a dynamically reconfigurable switch interconnect between the functional neural core...
US20150206048 CONFIGURING SPARSE NEURONAL NETWORKS  
A method for selecting a reduced number of model neurons in a neural network includes generating a first sparse set of non-zero decoding vectors. Each of the decoding vector is associated with a...
US20140067740 COMPUTER-IMPLEMENTED SIMULATED INTELLIGENCE CAPABILITIES BY NEUROANATOMICALLY-BASED SYSTEM ARCHITECTURE  
Computer-implemented systems for simulated intelligence information processing comprising: a digital processing device comprising an operating system configured to perform executable instructions...
US20130073500 High level neuromorphic network description apparatus and methods  
Apparatus and methods for high-level neuromorphic network description (HLND) framework that may be configured to enable users to define neuromorphic network architectures using a unified and...
US20130073495 ELEMENTARY NETWORK DESCRIPTION FOR NEUROMORPHIC SYSTEMS  
A simple format is disclosed and referred to as Elementary Network Description (END). The format can fully describe a large-scale neuronal model and embodiments of software or hardware engines to...
US20130073497 NEUROMORPHIC EVENT-DRIVEN NEURAL COMPUTING ARCHITECTURE IN A SCALABLE NEURAL NETWORK  
An event-driven neural network includes a plurality of interconnected core circuits is provided. Each core circuit includes an electronic synapse array has multiple digital synapses...
US20130073494 EVENT-DRIVEN UNIVERSAL NEURAL NETWORK CIRCUIT  
The present invention provides an event-driven universal neural network circuit. The circuit comprises a plurality of neural modules. Each neural module comprises multiple digital neurons such...
US20100299296 ELECTRONIC LEARNING SYNAPSE WITH SPIKE-TIMING DEPENDENT PLASTICITY USING UNIPOLAR MEMORY-SWITCHING ELEMENTS  
According to embodiments of the invention, a system, method and computer program product producing spike-dependent plasticity in an artificial synapse. In an embodiment, a method includes:...
US20150112910 HARDWARE ENHANCEMENTS TO RADIAL BASIS FUNCTION WITH RESTRICTED COULOMB ENERGY LEARNING AND/OR K-NEAREST NEIGHBOR BASED NEURAL NETWORK CLASSIFIERS  
This disclosure describes embodiments for a hardware based neural network integrated circuit classifier incorporating natively implemented Radial Basis functions, Restricted Coulomb Energy...
US20150058268 HIERARCHICAL SCALABLE NEUROMORPHIC SYNAPTRONIC SYSTEM FOR SYNAPTIC AND STRUCTURAL PLASTICITY  
In one embodiment, the present invention provides a neural network circuit comprising multiple symmetric core circuits. Each symmetric core circuit comprises a first core module and a second core...
US20140207719 STRUCTURAL PLASTICITY IN SPIKING NEURAL NETWORKS WITH SYMMETRIC DUAL OF AN ELECTRONIC NEURON  
A neural system comprises multiple neurons interconnected via synapse devices. Each neuron integrates input signals arriving on its dendrite, generates a spike in response to the integrated input...
US20080256009 System for temporal prediction  
Described is a system for temporal prediction. The system includes an extraction module, a mapping module, and a prediction module. The extraction module is configured to receive X(1), . . . X(n)...
US20080065575 EVOLUTIONARY NEURAL NETWORK AND METHOD OF GENERATING AN EVOLUTIONARY NEURAL NETWORK  
An evolutionary neural network and a method of generating such a neural network is disclosed. The evolutionary neural network comprises an input set consisting of at least one input neuron, said...
US20120016829 Memristive Adaptive Resonance Networks  
A method for implementing an artificial neural network includes connecting a plurality of receiving neurons to a plurality of transmitting neurons through memristive synapses (705). Each...
US20130297542 SENSORY INPUT PROCESSING APPARATUS IN A SPIKING NEURAL NETWORK  
Apparatus and methods for feedback in a spiking neural network. In one approach, spiking neurons receive sensory stimulus and context signal that correspond to the same context. When the stimulus...
US20120317063 SYNAPSE FOR FUNCTION CELL OF SPIKE TIMING DEPENDENT PLASTICITY (STDP), FUNCTION CELL OF STDP, AND NEUROMORPHIC CIRCUIT USING FUNCTION CELL OF STDP  
A synapse for a spike timing dependent (STDP) function cell includes a memory device having a variable resistance, such as a memristor, and a transistor connected to the memory device. A channel...
US20140344201 PROVIDING TRANSPOSABLE ACCESS TO A SYNAPSE ARRAY USING COLUMN AGGREGATION  
Embodiments of the invention relate to providing transposable access to a synapse array using column aggregation. One embodiment comprises a neural network including a plurality of electronic...
US20120084241 PRODUCING SPIKE-TIMING DEPENDENT PLASTICITY IN A NEUROMORPHIC NETWORK UTILIZING PHASE CHANGE SYNAPTIC DEVICES  
Embodiments of the invention relate to a neuromorphic network for producing spike-timing dependent plasticity. The neuromorphic network includes a plurality of electronic neurons and an...
US20150074028 PROCESSING DEVICE AND COMPUTATION DEVICE  
According to one embodiment, a processing device is configured to process input data formed of a plurality of input digital values. The processing device has a plurality of computation layers...
US20130073498 ELEMENTARY NETWORK DESCRIPTION FOR EFFICIENT LINK BETWEEN NEURONAL MODELS AND NEUROMORPHIC SYSTEMS  
A simple format is disclosed and referred to as Elementary Network Description (END). The format can fully describe a large-scale neuronal model and embodiments of software or hardware engines to...
US20130311413 Electronic charge sharing CMOS-memristor neural circuit  
CMOS-memristor circuit is constructed to behave as a trainable artificial synapse for neuromorphic hardware systems. The invention relies on the memristance of a memristor at the input side of the...
US20100076916 Autonomous Learning Dynamic Artificial Neural Computing Device and Brain Inspired System  
A hierarchical information processing system is disclosed having a plurality of artificial neurons, comprised of binary logic gates, and interconnected through a second plurality of dynamic...
US20140214738 NEURISTOR-BASED RESERVOIR COMPUTING DEVICES  
A neuristor-based reservoir computing device includes support circuitry formed in a complimentary metal oxide semiconductor (CMOS) layer, input nodes connected to the support circuitry and output...
US20140180988 HARDWARE ARCHITECTURE FOR SIMULATING A NEURAL NETWORK OF NEURONS  
Embodiments of the invention relate to a neural network system for simulating neurons of a neural model. One embodiment comprises a memory device that maintains neuronal states for multiple...
US20130031040 HIERARCHICAL ROUTING FOR TWO-WAY INFORMATION FLOW AND STRUCTURAL PLASTICITY IN NEURAL NETWORKS  
Hierarchical routing for two-way information flow and structural plasticity in a neural network is provided. In one embodiment the network includes multiple core modules, wherein each core module...
US20140067742 HYBRID INTERCONNECT STRATEGY FOR LARGE-SCALE NEURAL NETWORK SYSTEMS  
A plurality of chips arranged in a certain layout so as to face free space, and one or more optical elements are included. In the case where signal traffic for electrical communication with a...
US20140067741 HYBRID INTERCONNECT STRATEGY FOR LARGE-SCALE NEURAL NETWORK SYSTEMS  
A plurality of chips arranged in a certain layout so as to face free space, and one or more optical elements are included. In the case where signal traffic for electrical communication with a...
US20130212052 TENSOR DEEP STACKED NEURAL NETWORK  
A tensor deep stacked neural (T-DSN) network for obtaining predictions for discriminative modeling problems. The T-DSN network and method use bilinear modeling with a tensor representation to map...
US20110302119 SELF-ORGANIZING CIRCUITS  
A self-organizing electronic system and method that organizes and repairs itself. A number circuit of modules can be embedded in a fabric. Each circuit module can calculate some function of its...
US20140122402 NETWORK OF ARTIFICIAL NEURONS BASED ON COMPLEMENTARY MEMRISTIVE DEVICES  
A neural network comprises a plurality of artificial neurons and a plurality of artificial synapses each input neuron being connected to each output neuron by way of an artificial synapse, the...
US20110145181 100GBPS SECURITY AND SEARCH ARCHITECTURE USING PROGRAMMABLE INTELLIGENT SEARCH MEMORY (PRISM) THAT COMPRISES ONE OR MORE BIT INTERVAL COUNTERS  
Memory architecture provides capabilities for high performance content search. The architecture creates an innovative memory that can be programmed with content search rules which are used by the...
US20120166374 ARCHITECTURE, SYSTEM AND METHOD FOR ARTIFICIAL NEURAL NETWORK IMPLEMENTATION  
Systems and methods for a scalable artificial neural network, wherein the architecture includes: an input layer; at least one hidden layer; an output layer; and a parallelization subsystem...
US20120323832 NEURAL MODELING AND BRAIN-BASED DEVICES USING SPECIAL PURPOSE PROCESSOR  
A special purpose processor (SPP) can use a Field Programmable Gate Array (FPGA) or similar programmable device to model a large number of neural elements. The FPGAs can have multiple cores doing...
US20120084240 PHASE CHANGE MEMORY SYNAPTRONIC CIRCUIT FOR SPIKING COMPUTATION, ASSOCIATION AND RECALL  
Embodiments of the invention are directed to producing spike-timing dependent plasticity using electronic neurons for computation, and pattern matching tasks such as association and recall. In...
US20130073484 ELEMENTARY NETWORK DESCRIPTION FOR EFFICIENT MEMORY MANAGEMENT IN NEUROMORPHIC SYSTEMS  
A simple format is disclosed and referred to as Elementary Network Description (END). The format can fully describe a large-scale neuronal model and embodiments of software or hardware engines to...
US20140317035 APPARATUS AND METHODS FOR EVENT-BASED COMMUNICATION IN A SPIKING NEURON NETWORKS  
Apparatus and methods for event based communication in a spiking neuron network. The network may comprise units communicating by spikes via synapses. The spikes may communicate a payload data. The...
US20140289179 ANALOG MULTIPLIER USING A MEMRISTIVE DEVICE AND METHOD FOR IMPLEMENING HEBBIAN LEARNING RULES USING MEMRISOR ARRAYS  
A device, comprising: an array of cells, wherein the cells are arranged in columns and rows; wherein each cell comprises a memristive device; an interfacing circuit that is coupled to each cell of...
US20090192958 PARALLEL PROCESSING DEVICE AND PARALLEL PROCESSING METHOD  
A parallel processing device that computes a hierarchical neural network, the parallel processing device includes: a plurality of units that are identified by characteristic unit numbers that are...
US20120284217 AREA EFFICIENT NEUROMORPHIC SYSTEM  
A neuromorphic system includes a plurality of synapse blocks electrically connected to a plurality of neuron circuit blocks. The plurality of synapse blocks includes a plurality of neuromorphic...
US20120117012 Spike-timing computer modeling of working memory  
Working memory (WM) is part of the brain's memory system that provides temporary storage and manipulation of information necessary for cognition. Although WM has limited capacity at any given...
US20110213743 APPARATUS FOR REALIZING THREE-DIMENSIONAL NEURAL NETWORK  
An apparatus for realizing a three-dimensional (3D) neural network includes a culture substrate (21) having a 3D structure and a plurality of microelectrodes (22) disposed on the culture substrate...

Matches 1 - 50 out of 96 1 2 >