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US20120313153 SYSTEM AND METHOD OF PLATING CONDUCTIVE GATE CONTACTS ON METAL GATES FOR SELF-ALIGNED CONTACT INTERCONNECTIONS  
According to one embodiment of the invention, the gate contact is formed by a selective deposition on the gate electrode. One acceptable technique for the selective deposition is by plating....
US20100317191 COPPER INTERCONNECTION FOR FLAT PANEL DISPLAY MANUFACTURING  
A method of depositing a copper interconnection layer on a substrate for use in a flat panel display interconnection system, comprising the steps of: a) coating said substrate with a photoresist...
US20090298286 Method of making electronic entities  
Many electronic entities such as integrated circuits and discrete power devices have contact pads formed from successively deposited layers of nickel and a second metal such as gold. The resulting...
US20130122704 ELECTROLESS PLATING APPARATUS AND ELECTROLESS PLATING METHOD  
There is provided an electroless plating apparatus which, despite using a high-productivity batch processing method, can reduce the amount of a liquid chemical brought out of a processing tank,...
US20130119382 Plating Process and Structure  
A system and method for plating a contact is provided. An embodiment comprises forming protective layers over a contact and a test pad, and then selectively removing the protective layer over the...
US20050148174 Contact-connection of nanotubes  
Process for contact-connection of carbon nanotubes as part of their integration in an electric circuit, wherein the nanotubes, after they have been applied to metallic interconnects of the...
US20070087556 Method and mesh reference structures for implementing Z-axis cross-talk reduction through copper sputtering onto mesh reference planes  
A method and mesh reference applications are provided for implementing Z-axis cross-talk reduction. A mesh reference plane including a grid of mesh traces is formed with the mesh traces having...
US20090253262 ELECTROLESS PLATING SYSTEM  
An electroless plating system includes a plating solution, and controlling reducing agents in the plating solution for deposition over outlier features smaller than about five hundred nanometers...
US20110059611 ELECTROLESS DEPOSITION OF BARRIER LAYERS  
The invention relates to a solution for the deposition of barrier layers on metal surfaces, which comprises compounds of the elements nickel and molybdenum, at least one first reducing agent...
US20110316145 NANO/MICRO-STRUCTURE AND FABRICATION METHOD THEREOF  
A nano/micro-structure and a fabrication method thereof are provided. The method combines electroless plating and metal-assist etching to fabricate nano/micro-structure on a silicon substrate.
US20080182105 Production of Core/Shell Semiconductor Nanocrystals In Aqueous Solutions  
The present invention relates to a method of forming a core/shell nanocrystal of semiconductor material. Typically the core may comprise CdTe and the shell may be CdS. The shell is synthesised on...
US20130078808 ELECTROLESS DEPOSITION SOLUTIONS AND PROCESS CONTROL  
One embodiment of the present invention is a method of electroless deposition of cap layers for fabricating an integrated circuit. The method includes controlling the composition of an electroless...
US20070193354 Capacitive micro-machined ultrasonic transducer for element transducer apertures  
A capacitive micro-machined ultrasonic transducer (CMUT) array includes an improved elementary aperture for imaging operations. The transducer can be of a linear, curved linear, annular, matrix or...
US20140054788 METHOD FOR FABRICATING NANOGAP ELECTRODES, NANOGAP ELECTRODES ARRAY, AND NANODEVICE WITH THE SAME  
A substrate 1 having metal layers 2A and 2B arranged to form a gap is dipped in an electroless plating solution mixed an electrolyte solution including metal ions with a reducing agent and a...
US20090017624 Nodule Defect Reduction in Electroless Plating  
An electroless plating method and the apparatus for performing the same are provided. The method includes providing a plating solution; contacting a front surface of the wafer with the plating...
US20060270219 Reducing stress in coatings produced by physical vapour deposition technical field  
Coatings are deposited using arc-based deposition methods using a large negative bias on the substrate, of −1,500 V or more negative, which is varied during deposition, resulting in reduced stress...
US20100055422 Electroless Deposition of Platinum on Copper  
Embodiments of the current invention describe a method of plating platinum selectively on a copper film using a self-initiated electroless process. In particular, platinum films are plated onto...
US20070037389 METHOD FOR ELECTROLESS PLATING METAL CAP BARRIER ON COPPER  
A process for electroless plating a metal cap barrier on a substrate is disclosed. Copper metallization is formed on the substrate such that the substrate has an exposed top surface of a copper...
US20110059610 Method of using an electroless plating for depositing a metal seed layer for the subsequent plated backside metal film  
A method of backside metal process for semiconductor electronic devices, particularly of using an electroless plating for depositing a metal seed layer for the plated backside metal film. The...
US20110115035 General strength and sensitivity enhancement method for micromachined device  
This invention disclosed a method to strengthen structure and enhance sensitivity for CMOS-MEMS micro-machined devices which include micro-motion sensor, micro-actuator and RF switch. The steps of...
US20140141609 Process for Electroless Deposition of Gold and Gold Alloys on Silicon  
A plating bath for electroless deposition of gold and gold alloy layers on such silicon-based substrates, includes Na(AuCl4) and/or other gold (III) chloride salts as a gold ion source. The bath...
US20130084699 Selective Metal Deposition Over Dielectric Layers  
Selective deposition of metal over dielectric layers in a manner that minimizes of eliminates keyhole formation is provided. According to one embodiment, a dielectric target layer is formed over a...
US20120220126 Selective Metal Deposition Over Dielectric Layers  
Selective deposition of metal over dielectric layers in a manner that minimizes of eliminates keyhole formation is provided. According to one embodiment, a dielectric target layer is formed over a...
US20130071967 Method for Making a Nickel Film for Use as an Electrode of an N-P Diode or Solar Cell  
Disclosed is a method for making a nickel film for use as an electrode of an n-p diode or solar cell. A light source is used to irradiate an n-type surface of the n-p diode or solar cell, thus...
US20100140804 Dual metal interconnects for improved gap-fill, reliability, and reduced capacitance  
Embodiments of apparatus and methods for forming dual metal interconnects are described herein. Other embodiments may be described and claimed.
US20060189131 Composition and process for element displacement metal passivation  
A composition and process suitable for the passivation of metal lines, layers or surfaces, particularly for the passivation of copper in the fabrication of integrated circuit devices on wafer...
US20060178007 Method of forming copper wiring layer  
A method of forming a copper wiring layer, which includes forming a pattern of copper seed layer on a substrate, and forming a copper wiring pattern on the pattern of copper seed layer by means of...
US20070148970 Method of fabricating circuitry without conductive circle  
A method of fabricating circuitry without conductive circles has steps of providing a plate with multiple apertures defined therein, the plate and inner walls of the apertures are coated with a...
US20080224313 Method for forming a seed layer for damascene copper wiring, and semiconductor wafer with damascene copper wiring formed using the method  
A method for forming a seed layer for damascene copper wiring is provided. The method comprises the step of forming a seed layer, during damascene copper wiring formation, using an electroless...
US20050164499 Electroless plating method and apparatus  
In a method of electroless plating, catalytically active nuclei are formed on a diffusion inhibiting layer (such as a barrier layer), the catalytically active nuclei being catalytically active on...
US20080254621 Wafer Electroless Plating System and Associated Methods  
A dry-in/dry-out system is disclosed for wafer electroless plating. The system includes an upper zone for wafer ingress/egress and drying operations. Proximity heads are provided in the upper zone...
US20130217227 METHOD OF METAL DEPOSITION  
A method of forming a metal layer on an electrically insulating substrate comprises depositing a photocatalyst layer onto the substrate and depositing a mask layer comprising voids on the...
US20110207320 Noble Metal Activation Layer  
Processes for minimizing contact resistance when using nickel silicide (NiSi) and other similar contact materials are described. These processes include optimizing silicide surface cleaning,...
US20070184652 Method for preparing a metal feature surface prior to electroless metal deposition  
The present invention provides a method for manufacturing an interconnect and an integrated circuit. The method for manufacturing the interconnect, in one embodiment, includes forming a first...
US20130323926 COMPOSITE MATERIAL, METHOD OF PRODUCING THE SAME, AND APPARATUS FOR PRODUCING THE SAME  
Proposed are a composite material having a high adhesiveness, wherein non-penetrating pores that are formed in a silicone surface layer are filled up with a metal or the like without leaving any...
US20140087560 METHOD OF DEPOSITING METALLIC LAYERS BASED ON NICKEL OR COBALT ON A SEMICONDUCTING SOLID SUBSTRATE; KIT FOR APPLICATION OF SAID METHOD  
The present invention relates to a kit intended for the deposition of nickel or cobalt in the cavities of a semiconductor substrate intended to form through-silicon vias (TSV) for making...
US20100025852 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME  
To suppress deterioration in reliability of wiring and to reduce effective dielectric constant of wiring. In a semiconductor device, copper-containing wirings are covered by barrier insulating...
US20100144144 ELECTROLESS PLATING BATH COMPOSITION AND METHOD OF USE  
An electroless plating composition comprising succinic acid, potassium carbonate, a source of cobalt metal ions, a reducing agent, and water is provided. An optional buffering agent may also be...
US20050095854 Methods for depositing high yield and low defect density conductive films in damascene structures  
A process of electrodepositing a substantially flat conductive layer on a workpiece surface is provided. In the process, various transition current densities are determined experimentally by...
US20050181538 Semiconductor device for wire-bonding and flip-chip bonding package and manufacturing method thereof  
A manufacturing method of a semiconductor device for a wire-bonding and flip-chip bonding package mainly comprises the following steps. First, a chip having a plurality of bonding pads and a...
US20110039410 Apparatus and Method for Substrate Electroless Plating  
A substrate is secured on a chuck that maintains a top surface of the substrate in a substantially level orientation. The chuck is positioned within a cavity of a vessel such that a body portion...
US20050282384 Method for forming protective film and electroless plating bath  
The present invention provides a method for forming a protective film selectively on metal interconnects, such as copper interconnects, of a substrate having an embedded interconnect structure,...
US20050003590 Method for defining a source and a drain and a gap inbetween  
A method for creating a source and a drain of a thin film transistor is disclosed. The method comprises the step (106) of forming a mask of a monolayer on a substrate. The mask will be used for...
US20150140816 PRE-TREATMENT METHOD FOR PLATING AND STORAGE MEDIUM  
Catalytic metal nanoparticles can be attached on a base. A pre-treatment method for plating includes a catalytic particle-containing film forming process of forming a catalytic particle-containing...
US20120045897 Wafer Electroless Plating System and Associated Methods  
A dry-in/dry-out system is disclosed for wafer electroless plating. The system includes an upper zone for wafer ingress/egress and drying operations. Proximity heads are provided in the upper zone...
US20050029662 Semiconductor production method  
It is an object of the present invention to provide a semiconductor device production method in which an electroconductive capping (metal) layer is formed on a copper interconnect surface, wherein...
US20120258595 Formation of a Masking Layer on a Dielectric Region to Facilitate Formation of a Capping Layer on Electrically Conductive Regions Separated by the Dielectric Region  
A masking layer is formed on a dielectric region of an electronic device so that, during subsequent formation of a capping layer on electrically conductive regions the masking layer inhibits...
US20070224809 Method of forming wiring  
Resist films 19 for liftoff are formed on an insulating layer 12 corresponding to a wiring formation region A so as to expose the insulating layer 12 corresponding to formation positions of first...
US20130034959 ELECTROLESS PLATING APPARATUS AND METHOD  
An electroless plating apparatus and method designed specifically for plating at least one semiconductor wafer are disclosed. The apparatus comprises a container, a wafer holder, an electrolyte...
US20090124081 Techniques to Improve Characteristics of Processed Semiconductor Substrates  
Techniques to improve characteristics of processed semiconductor substrates are described, including cleaning a substrate using a preclean process, the substrate comprising a dielectric region and...

Matches 1 - 50 out of 91 1 2 >