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US20130256893 BONDING PAD STRUCTURE WITH DENSE VIA ARRAY  
A bonding pad structure includes a substrate and a first conductive island formed in a first dielectric layer and disposed over the substrate. A first via array having a plurality of vias is...
US20120299187 Aluminum Bond Pad With Trench Thinning for Fine Pitch Ultra-Thick Aluminum Products  
Embodiments of an aluminum pad thinning in bond pad for fine pitch ultra-thick aluminum pad structures are provided herein. Embodiments include a conductive structure formed on a substrate. A...
US20130330921 Plating Process and Structure  
A system and method for plating a contact connected to a test pad is provided. An embodiment comprises inserting a blocking material into vias between the contact and the test pad. In another...
US20130072011 METHOD OF REPAIRING PROBE PADS  
A method that includes forming a first level of active circuitry on a substrate, forming a first probe pad electrically connected to the first level of active circuitry where the first probe pad...
US20110156032 METHOD OF REPAIRING PROBE PADS  
A method that includes forming a first level of active circuitry on a substrate, forming a first probe pad electrically connected to the first level of active circuitry where the first probe pad...
US20150194396 BOND PAD HAVING A TRENCH AND METHOD FOR FORMING  
A conductive structure is formed in a last metal layer of an integrated circuit. Passivation material is patterned over a portion of the conductive structure. A first trench is patterned around a...
US20150228587 Concentric Bump Design for the Alignment in Die Stacking  
An integrated circuit structure includes an alignment bump and an active electrical connector. The alignment bump includes a first non-solder metallic bump. The first non-solder metallic bump...
US20140353828 SUBSTRATE BONDING WITH DIFFUSION BARRIER STRUCTURES  
A metallic dopant element having a greater oxygen-affinity than copper is introduced into, and/or over, surface portions of copper-based metal pads and/or surfaces of a dielectric material layer...
US20130078765 On-Chip Heat Spreader  
A three dimensional (3D) stacked chip structure with chips having on-chip heat spreader and method of forming are described. A 3D stacked chip structure comprises a first die having a first...
US20090200647 SHIELDED INTEGRATED CIRCUIT PAD STRUCTURE  
An integrated circuit pad structure includes a ground strip (206) positioned below a pad (101). In one example a conductive element (102) is coupled to the pad (101), and at least two tiled...
US20130075907 Interconnection Between Integrated Circuit and Package  
In order to achieve finer bump interconnect pitch for integrated circuit packaging, while relieving pressure-induced delamination of upper layer dielectric films, the under bump metallurgy of the...
US20100072632 BOND PAD STRUCTURE HAVING DUMMY PLUGS AND/OR PATTERNS FORMED THEREAROUND  
A semiconductor structure is provided. In one embodiment, a bond pad is formed above one or more underlying layers of a substrate. A plurality of dummy plugs are spaced around the bond pad, the...
US20130267087 LAYOUT AND PAD FLOOR PLAN OF POWER TRANSISTOR FOR GOOD PERFORMANCE OF SPU AND STOG  
A power transistor for use in an audio application is laid out to minimize hot spots. Hot spots are created by non-uniform power dissipation or overly concentrated current densities. The source...
US20060006533 Motherboard structure for preventing short circuit  
A motherboard for preventing short circuit includes an IC device and a PCB. The IC device has a plurality of tin balls, and the PCB has matching pads with the tin balls of the IC device. The tin...
US20120142183 ALUMINUM ENHANCED PALLADIUM CMP PROCESS  
A process of forming an integrated circuit using a palladium CMP operation in which 25 to 125 ppm aluminum is added to the CMP slurry, allowing a palladium removal rate of at least 80 nanometers...
US20100052174 COPPER PAD FOR COPPER WIRE BONDING  
An integrated circuit package comprising an integrated circuit that includes transistors coupled to copper interconnect structures. The integrated circuit package also comprises copper pads...
US20110204515 IC DIE INCLUDING RDL CAPTURE PADS WITH NOTCH HAVING BONDING CONNECTORS OR ITS UBM PAD OVER THE NOTCH  
An IC die includes active circuitry and I/O nodes tied together in first net and at least a second net. A first die pad and a second die pad adjacent thereto are coupled to the first and second...
US20140048941 Contact Pads with Sidewall Spacers and Method of Making Contact Pads with Sidewall Spacers  
A chip contact pad and a method of making a chip contact pad are disclosed. An embodiment of the present invention includes forming a plurality of contact pads over a workpiece, each contact pad...
US20050104207 Corrosion-resistant bond pad and integrated device  
The invention provides an integrated device with corrosion-resistant capped bond pads. The capped bond pads include at least one aluminum bond pad on a semiconductor substrate. A layer of...
US20140252608 Method and Apparatus for Packaging Pad Structure  
Methods and apparatus are disclosed for manufacturing metal contacts under ground-up contact pads within a device. A device may comprise a bottom metal layer with a bottom metal contact, a top...
US20150235979 UNIVERSAL SOLDER JOINTS FOR 3D PACKAGING  
Electronic devices including solder bumps embedded in a pre-applied coating of underfill material and/or solder resist are fabricated, thereby improving chip-package interaction reliability....
US20110006434 UNDER LAND ROUTING  
An electronic component comprising an integrated device and a plurality of packaging layers in which routing between locations on the device and lands on the surface of the component is provided...
US20110097892 Sprocket Opening Alignment Process and Apparatus for Multilayer Solder Decal  
A process for aligning at least two layers in an abutting relationship with each other comprises forming a plurality of sprocket openings in each of the layers for receiving a sprocket of...
US20150001740 SOLUTION TO DEAL WITH DIE WARPAGE DURING 3D DIE-TO-DIE STACKING  
A method including forming a contact pad array on an integrated circuit substrate, the contact pad array including a first plurality of contact pads and a second plurality of contact pads, wherein...
US20140084482 MICRO DEVICE STABILIZATION POST  
A method and structure for stabilizing an array of micro devices is disclosed. The array of micro devices is formed on an array of stabilization posts formed from a thermoset material. Each micro...
US20050077626 Forming of the last metallization level of an integrated circuit  
An integrated circuit including one or several metallization levels, metal conductive strips and metal contact pads being formed on the last metallization level, the last level being covered with...
US20050042852 Method for applying solder mask onto pad spacings of a printed circuit board  
A method for applying the solder mask onto solder pad spacings of a printed circuit board, mainly referring to the use of an ink-jet printer for printing the solder mask at the dense solder pad...
US20070010083 Method of realizing direct bonding between metal wires and copper pads by means of thermosonic wire bonding using shielding gas spraying device  
Discloses is a method of realizing direct bonding between metal wires and copper pads by means of thermosonic wire bonding using a shielding gas spraying device, where a shielding gas is provided...
US20140061933 WIRE BOND SPLASH CONTAINMENT  
A splash containment structure for semiconductor structures and associated methods of manufacture are provided. A method includes: forming wire bond pads in an integrated circuit chip and forming...
US20110018140 ELECTRIC VIA COMPRISING LATERAL OUTGROWTHS  
A via connecting the front surface of a substrate to its rear surface, this substrate including a porous region extending from at least a portion of the periphery of the via, the via including...
US20130288473 Electrical Connection Structure  
A structure comprises a top metal connector formed underneath a bond pad. The bond pad is enclosed by a first passivation layer and a second passivation layer. A polymer layer is further formed on...
US20130134563 Electrical Connection Structure  
A structure comprises a top metal connector formed underneath a bond pad. The bond pad is enclosed by a first passivation layer and a second passivation layer. A polymer layer is further formed on...
US20110210415 FREESTANDING CARBON NANOTUBE NETWORKS BASED TEMPERATURE SENSOR  
The present invention introduces a small-size temperature sensor, which exploits a random or oriented network of un-functionalized, single or multi-walled, carbon nanotubes to monitor a wide range...
US20120139113 UNDERCUT-REPAIR OF BARRIER LAYER METALLURGY FOR SOLDER BUMPS AND METHODS THEREOF  
A method of making a semiconductor structure includes patterning a barrier layer metallurgy (BLM) which forms an undercut beneath a solder material, and forming a repair material in the undercut...
US20110092064 Preventing UBM Oxidation in Bump Formation Processes  
A method of forming an integrated circuit structure includes forming a copper-containing seed layer on a wafer, and performing a descum step on an exposed surface of the copper-containing seed...
US20060099790 Method of implanting at least one solder bump on a printed circuit board  
A method of implanting at least one solder bump on a surface of a printed circuit board (PCB) on which at least one soldering pad is exposed since the solder bump intended to be formed thereon is...
US20140203428 CHIP STACK WITH ELECTRICALLY INSULATING WALLS  
A chip stack is provided and includes two or more chips, a solder joint operably disposed between adjacent ones of the two or more chips, the solder joint occupying about 25-30% or more of an area...
US20070298602 Method for Applying Solder to Redistribution Lines  
In a method of making an electronic component, an electrically conductive redistribution line is formed on a surface of a semiconductor chip. The redistribution line includes a solder pad. A...
US20060258153 Barrier assembly for an exposure apparatus  
A barrier assembly (58) for sealing an assembly gap (274) between a first assembly (266) and a second assembly (268) includes a first barrier (270) that seals the assembly gap (274) and a second...
US20080020561 BALL CAPTURING APPARATUS, SOLDER BALL DISPOSING APPARATUS, BALL CAPTURING METHOD, AND SOLDER BALL DISPOSING METHOD  
The present invention relates to a ball capturing apparatus and method of capturing one ball from plural balls having the same size, and to a solder ball disposing apparatus and method of...
US20140035150 METAL CORED SOLDER DECAL STRUCTURE AND PROCESS  
A method and system of producing metal cored solder structures on a substrate which includes: providing a decal having a plurality of apertures, the apertures being tapered from a top surface to a...
US20070222086 On-die bond wires system and method for enhancing routability of a redistribution layer  
An integrated circuit includes a first die and a second die positioned in a package. The first die has a redistribution layer formed on the die and including a plurality of relocated bond pads....
US20140349475 MOISTURE BARRIER FOR A WIRE BOND  
An electronic device comprising a bond pad on a substrate and a wire bonded to the bond pad. The device further comprises an intermetallic compound interface located between the bond pad and the...
US20120223432 MOISTURE BARRIER FOR A WIRE BOND  
An electronic device comprising a bond pad on a substrate and a wire bonded to the bond pad. The device further comprises an intermetallic compound interface located between the bond pad and the...
US20120135546 ALIGNMENT INSPECTION  
The present disclosure relates to the field of microelectronic substrate fabrication and, more particularly, to alignment inspection for vias formed in the microelectronic substrates. The...
US20080197511 Bonding pad structure, electronic device having a bonding pad structure and methods of fabricating the same  
An electronic device having a bonding pad structure and a method of fabricating the same is provided. The electronic device may include a first bonding pads formed on the substrate. A second...
US20130175689 BONDING PAD AND METHOD OF MAKING SAME  
The description relates to a bonding pad for a semiconductor device deposited. The first region comprising aluminum deposited at a high temperature having a large grain size. The second region...
US20080185735 Dynamic pad size to reduce solder fatigue  
A semiconductor device is provided which comprises a substrate (501) having a plurality of bond pads (503) disposed thereon. Each bond pad has a major axis and a minor axis in a direction parallel...
US20130001777 COPPER WIRE RECEIVING PAD  
On embodiment is directed to a welding pad capable of receiving a ball-shaped copper wire at its end, including a first copper pad coated with a protection layer and topped with a second pad...
US20140374911 DEVICE HAVING REDUCED PAD PEELING DURING TENSILE STRESS TESTING AND A METHOD OF FORMING THEREOF  
The present disclosure relates to a method for forming a semiconductor device. The method includes forming a first aluminum pad layer on a metal layer, forming an adhesion layer on the first...