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US20090321812 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THEREOF  
The present invention provides a semiconductor device including a semiconductor substrate provided with a trench section; a tunnel insulating film covering an inner surface of the trench section; a...
US20090325372 Method of manufacturing semiconductor device and substrate processing apparatus  
A manufacturing method of a semiconductor device of the present invention includes the step of forming an insulating film on a substrate, and the step of forming a high dielectric constant...
US20090321805 INSULATOR MATERIAL OVER BURIED CONDUCTIVE LINE  
One embodiment relates to an integrated circuit that includes a conductive line that is arranged in a groove in a semiconductor body. An insulating material is disposed over the conductive line....
US20090325373 SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME  
The semiconductor memory device according to the present invention includes a charge storage layer 26 formed over a semiconductor substrate 10 and including a plurality of particles 16 as...
US20090325371 Methods of Forming Integrated Circuit Devices Having Stacked Gate Electrodes  
A method of forming a gate electrode of a semiconductor device is provided, the method including: forming a plurality of stacked structures each comprising a tunnel dielectric layer, a first...
US20090315124 WORK FUNCTION ENGINEERING FOR EDRAM MOSFETS  
Embedded DRAM MOSFETs including an array NFET having a gate stack comprising a high-K dielectric layer upon which is deposited a first metal oxide layer (CD 1 ) then a conductive layer (TiN), and...
US20090315100 METHOD OF MANUFACTURING SEMICONDUCTUR DEVICE  
Disclosed is a method of manufacturing a semiconductor device. The method includes forming an oxide-nitride-oxide (ONO) layer over a semiconductor substrate, and forming a recess over the...
US20090315093 ATOMIC LAYER DEPOSITION OF METAL CARBIDE FILMS USING ALUMINUM HYDROCARBON COMPOUNDS  
Methods of forming metal carbide films are provided. In some embodiments, a substrate is exposed to alternating pulses of a transition metal species and an aluminum hydrocarbon compound, such as...
US20090311857 METHOD TO FORM ULTRA HIGH QUALITY SILICON-CONTAINING COMPOUND LAYERS  
Multiple sequential processes are conducted in a reaction chamber to form ultra high quality silicon-containing compound layers, including silicon nitride layers. In a preferred embodiment, a...
US20090307635 METAL HIGH DIELECTRIC CONSTANT TRANSISTOR WITH REVERSE-T GATE  
A transistor is provided. The transistor includes a silicon layer including a source region and a drain region. A gate stack is disposed on the silicon layer between the source region and the drain...
US20090302369 METHOD AND APPARATUS FOR FLATBAND VOLTAGE TUNING OF HIGH-K FIELD EFFECT TRANSISTORS  
In one embodiment, the invention is a method and apparatus for flatband voltage tuning of high-k field effect transistors. One embodiment of a field effect transistor includes a substrate, a high-k...
US20090303787 NONVOLATILE MEMORIES WITH TUNNEL DIELECTRIC WITH CHLORINE  
In a nonvolatile memory cell with charge trapping dielectric ( 150 ), the tunnel dielectric ( 140 ) includes chlorine adjacent to the charge trapping dielectric but no chlorine (or less chlorine)...
US20090302370 METHOD AND APPARATUS FOR FLATBAND VOLTAGE TUNING OF HIGH-K FIELD EFFECT TRANSISTORS  
In one embodiment, the invention is a method and apparatus for flatband voltage tuning of high-k field effect transistors. One embodiment of a field effect transistor includes a substrate, a high-k...
US20090298274 METHOD OF FABRICATING SEMICONDUCTOR DEVICE  
A method of fabricating a semiconductor device includes forming core material patterns comprising first films separated from each other above a substrate, modifying surfaces of the core material...
US20090294877 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF  
In a semiconductor device, a gate insulating film is formed on a semiconductor substrate, and a gate electrode is formed on the gate insulating film. Thick regions of the gate insulating film which...
US20090294834 NONVOLATILE MEMORY DEVICE, METHOD OF MANUFACTURING THE NONVOLATILE MEMORY DEVICE, AND METHOD OF MANUFACTURING FLAT PANEL DISPLAY DEVICE PROVIDED WITH THE NONVOLATILE MEMORY DEVICE  
Provided are a nonvolatile memory device, a method of manufacturing the nonvolatile memory device, and a method of manufacturing a flat panel display device provided therein with the nonvolatile...
US20090298275 Metal High-K Transistor Having Silicon Sidewall For Reduced Parasitic Capacitance, And Process To Fabricate Same  
A method is disclosed to reduce parasitic capacitance in a metal high dielectric constant (MHK) transistor. The method includes forming a MHK gate stack upon a substrate, the MHK gate stack having...
US20090294924 HAFNIUM LANTHANIDE OXYNITRIDE FILMS  
Electronic apparatus and methods of forming the electronic apparatus include a hafnium lanthanide oxynitride film on a substrate for use in a variety of electronic systems. The hafnium lanthanide...
US20090289296 Semiconductor Device and Method of Fabricating the same  
A semiconductor device and a method of fabricating the same. In accordance with a method of fabricating a semiconductor device according to an aspect of the invention, a tunnel dielectric layer, a...
US20090289293 SEMICONDUCTOR DEVICE HAVING TRI-GATE STRUCTURE AND MANUFACTURING METHOD THEREOF  
A semiconductor device of an example of the invention comprises a memory cell and a select gate transistor provided for the memory cell. A gate electrode of the select gate transistor has a...
US20090289297 CHARGE TRAP-TYPE NON-VOLATILE MEMORY DEVICE AND METHOD OF FABRICATING THE SAME  
A charge trap-type non-volatile memory device, and related method, includes forming over a substrate a tunnel insulating layer, a charge trapping layer, a dielectric layer, and a conductive layer...
US20090289251 NONVOLATILE MEMORY DEVICE AND METHOD FOR MANUFACTURING SAME  
A nonvolatile memory device includes a plurality of component memory layers stacked on one another. Each of the plurality of component memory layers includes a first wiring, a second wiring...
US20090291553 Threshold Adjustment for High-K Gate Dielectric CMOS  
A CMOS structure is disclosed in which a first type FET has an extremely thin oxide liner. This thin liner is capable of preventing oxygen from reaching the high-k dielectric gate insulator of the...
US20090283821 NONVOLATILE MEMORY AND MANUFACTURING METHOD THEREOF  
Isolation trenches are formed in the main surface of a semiconductor substrate, and isolation regions. are embedded in these trenches. First insulating films, charge storage layers, a second...
US20090283819 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING SAME  
A nonvolatile semiconductor memory device includes: a substrate; a plurality of dielectric films and electrode films which are alternately stacked on the substrate and have a through hole...
US20090283818 Flash Memory Device and Method of Fabricating the Same  
A flash memory device includes an isolation layer formed on an isolation region of a semiconductor substrate, a tunnel insulating layer formed on an active region of the semiconductor substrate, a...
US20090283822 NON-VOLATILE MEMORY STRUCTURE AND METHOD FOR PREPARING THE SAME  
A non-volatile memory structure includes a substrate having two doped regions, a charge-trapping structure positioned substantially between the two doped regions, and a conductive structure...
US20090278195 SEMICONDUCTOR MEMORY DEVICE PROVIDED WITH STACKED LAYER GATE INCLUDING CHARGE ACCUMULATION LAYER AND CONTROL GATE, AND MANUFACTURING METHOD THEREOF  
A semiconductor memory device includes a memory cell transistor and a first MOS transistor. The memory cell transistor includes a first insulating film, a second insulating film, a control gate...
US20090280611 NON-VOLATILE MEMORY SEMICONDUCTOR DEVICE HAVING AN OXIDE-NITRIDE-OXIDE (ONO) TOP DIELECTRIC LAYER  
A non-volatile memory (NVM) cell includes a silicon substrate having a main surface, a source region in a portion of the silicon substrate, a drain region in a portion of the silicon substrate, and...
US20090273021 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME  
A semiconductor device includes a semiconductor substrate, a tunnel insulating film on the semiconductor substrate, a charge storage layer on the tunnel insulating film, a block insulating film on...
US20090273018 NONVOLATILE MEMORY DEVICE WITH MULTIPLE BLOCKING LAYERS AND METHOD OF FABRICATING THE SAME  
A nonvolatile memory device with a blocking layer controlling the transfer of electric charges in a charge storage layer includes the blocking layer having a first blocking layer in contact with...
US20090267138 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME  
A charge trap type non-volatile memory device has memory cells formed on a silicon substrate at a predetermined interval via an element isolation trench along a first direction in which word lines...
US20090269919 SPLIT GATE TYPE NON-VOLATILE MEMORY DEVICE  
Embodiments relate to a gate structure of a split gate-type non-volatile memory device and a method of manufacturing the same. In embodiments, the split gate-type non-volatile memory device may...
US20090267162 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE  
A method of manufacturing a semiconductor device comprises: forming a gate insulator on a substrate, the gate insulator including a high-dielectric film in whole or part; forming a first metal film...
US20090269918 METHODS FOR FABRICATING MEMORY CELLS HAVING FIN STRUCTURES WITH SMOOT SIDEWALLS AND ROUNDED TOP CORNERS AND EDGES  
Methods for fabricating a semiconductor FIN structure with smooth sidewalls and rounded top corners and edges is disclosed. A method includes forming a plurality of semiconductor FIN structures. A...
US20090269916 METHODS FOR FABRICATING MEMORY CELLS HAVING FIN STRUCTURES WITH SEMICIRCULAR TOP SURFACES AND ROUNDED TOP CORNERS AND EDGES  
Methods for fabricating a FIN structure with a semicircular top surface and rounded top surface corners and edges are disclosed. As a part of a disclosed method, a FIN structure is formed in a...
US20090269911 NON-VOLATILE MEMORY AND METHOD OF MANUFACTURING THE SAME  
A non-volatile memory in which a leak current from an electric charge accumulating layer to an active layer is reduced and a method of manufacturing the non-volatile memory are provided. In a...
US20090261402 METHOD AND STRUCTURE FOR A SEMICONDUCTOR CHARGE STORAGE DEVICE  
A semiconductor charge storage device includes a semiconductor substrate having a surface region. The semiconductor substrate is characterized by a first conductivity type. A charge trapping...
US20090263961 HARDWARE SET FOR GROWTH OF HIGH K & CAPPING MATERIAL FILMS  
The present invention generally includes a method and an apparatus for depositing both a high k layer and a capping layer within the same processing chamber by coupling gas precursors, liquid...
US20090261403 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME  
A semiconductor device includes a memory cell transistor including a first lower insulating film provided on a semiconductor substrate, a first intermediate insulating film provided on the first...
US20090258479 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD THEREOF  
A nonvolatile semiconductor memory device is provided in such a manner that a semiconductor layer is formed over a substrate, a charge accumulating layer is formed over the semiconductor layer with...
US20090253244 Nonvolatile Memory Devices Having Gate Structures Doped by Nitrogen and Methods of Fabricating the Same  
Nonvolatile memory devices are provided including an integrated circuit substrate and a charge storage pattern on the integrated circuit substrate. The charge storage pattern has a sidewall and a...
US20090250760 METHODS OF FORMING HIGH-K/METAL GATES FOR NFETS AND PFETS  
Methods of forming high-k/metal gates for an NFET and PFET and a related structure are disclosed. One method includes recessing a PFET region; forming a first high-k dielectric layer and a first...
US20090250782 SUBGROUNDRULE SPACE FOR IMPROVED METAL HIGH-K DEVICE  
The present invention provides a semiconducting device including a substrate including at least one semiconducting region and isolation regions; a gate structure atop the substrate having a gate...
US20090243000 METHOD, STRUCTURE AND DESIGN STRUCTURE FOR CUSTOMIZING HISTORY EFFECTS OF SOI CIRCUITS  
A design structure is embodied in a machine readable medium for designing, manufacturing, or testing a design. The design structure includes a high-leakage dielectric formed over an active region...
US20090243031 STRUCTURE AND METHOD TO CONTROL OXIDATION IN HIGH-K GATE STRUCTURES  
In one embodiment, the present invention provides a method of fabricating a semiconducting device that includes providing a substrate including at least one semiconducting region and at least one...
US20090242985 METHOD, STRUCTURE AND DESIGN STRUCTURE FOR CUSTOMIZING HISTORY EFFECTS OF SOI CIRCUITS  
A design structure is embodied in a machine readable medium for designing, manufacturing, or testing a design. The design structure includes a high-leakage dielectric formed between a gate...
US20090242999 METHOD FOR ENCAPSULATING A HIGH-K GATE STACK BY FORMING A LINER AT TWO DIFFERENT PROCESS TEMPERATURES  
Encapsulation of a gate stack comprising a high-k dielectric material may be accomplished on the basis of a silicon nitride material that is deposited in a sequence of two deposition processes, in...
US20090242962 Plasma oxidation of a memory layer to form a blocking layer in non-volatile charge trap memory devices  
A blocking layer of a non-volatile charge trap memory device is formed by oxidizing a portion of a charge trapping layer of the memory device. In one embodiment, the blocking layer is grown by a...
US20090237990 SONOS DEVICE WITH INSULATING STORAGE LAYER AND P-N JUNCTION ISOLATION  
The present invention provides a semiconductor device and a method for manufacturing thereof. The semiconductor device includes bit lines disposed in a semiconductor substrate, a first ONO disposed...
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