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US20140159169 RECESSING AND CAPPING OF GATE STRUCTURES WITH VARYING METAL COMPOSITIONS  
A approach for recessing and capping metal gate structures is disclosed. Embodiments include: forming a dummy gate electrode on a substrate; forming a hard mask over the dummy gate electrode;...
US20140113442 DUAL GATE PROCESS  
The control of gate widths is improved for system-on-a-chip (SoC) devices which require multiple gate dielectric “gate” thicknesses, e.g., for analog and digital processing on the same chip. A...
US20150001605 Gate Constructions Of Recessed Access Devices And Methods Of Forming Gate Constructions Of Recessed Access Devices  
A method of forming a gate construction of a recessed access device includes forming a pair of sidewall spacers laterally over opposing sidewalls of a gate dielectric and elevationally over first...
US20120009772 Gate Constructions Of Recessed Access Devices And Methods Of Forming Gate Constructions Of Recessed Access Devices  
A method of forming a gate construction of a recessed access device includes forming a pair of sidewall spacers laterally over opposing sidewalls of a gate dielectric and elevationally over first...
US20140061925 LOW RESISTIVITY GATE CONDUCTOR  
Embodiments of the invention provide an approach for bottom-up growth of a low resistivity gate conductor. Specifically, a low resistivity metal (e.g., aluminum or cobalt) is selectively grown...
US20110070708 Method for making trench MOSFET with shallow trench structures  
A method for making trench MOSFET with shallow trench structures with thick trench bottom is disclosed. The improved method resolves the problem of deterioration of breakdown voltage resulted by...
US20110073909 REPLACEMENT SPACER FOR TUNNEL FETS  
A semiconductor fabrication method includes depositing a dummy gate layer onto a substrate, patterning the dummy gate layer, depositing a hardmask layer over the dummy gate layer, patterning the...
US20120286352 TRENCH MOS STRUCTURE AND METHOD FOR MAKING THE SAME  
A trench MOS structure is provided. The trench MOS structure includes a substrate, an epitaxial layer, a trench, a gate isolation, a trench gate, a guard ring and a reinforcement structure within...
US20110147831 METHOD FOR REPLACEMENT METAL GATE FILL  
An exemplary embodiment of a method for forming a gate for a planar-type or a finFET-type transistor comprises forming a gate trench that includes an interior surface. A first work-function metal...
US20130059435 Method of Manufacturing Dummy Gates in Gate Last Process  
The present invention provides a method of manufacturing a dummy gate in a gate last process, which comprises the steps of forming a dummy gate material layer and a hard mask material layer...
US20140154877 METHODS FOR FABRICATING INTEGRATED CIRCUITS HAVING LOW RESISTANCE METAL GATE STRUCTURES  
Methods for fabricating integrated circuits having low resistance metal gate structures are provided. One method includes forming a metal gate stack in a FET trench formed in a FET region. The...
US20110097885 Mosfet using gate work function engineering for switching applications  
This invention discloses a new MOSFET device. The MOSFET device has an improved operation characteristic achieved by manufacturing a MOSFET with a higher gate work function by implementing a...
US20150228491 TRANSISTOR HAVING TUNGSTEN-BASED BURIED GATE STRUCTURE, METHOD FOR FABRICATING THE SAME  
A method for fabricating a transistor that includes forming a trench in a substrate, forming a gate dielectric layer on a surface of the trench, forming a first fluorine-free tungsten layer as an...
US20120146135 METHOD AND A STRUCTURE FOR ENHANCING ELECTRICAL INSULATION AND DYNAMIC PERFORMANCE OF MIS STRUCTURES COMPRISING VERTICAL FIELD PLATES  
In an MIS structure a field plate electrode is incorporated below a buried gate electrode by using an insulating oxide layer, which is formed concurrently with the gate dielectric layer. In order...
US20130234244 Dummy Structure for Multiple Gate Dielectric Interface and Methods  
Dummy structures between a high voltage (HV) region and a low voltage (LV) region of a substrate are disclosed, along with methods of forming the dummy structures. An embodiment is a structure...
US20110147851 Method For Depositing Gate Metal For CMOS Devices  
A semiconductor device comprises a substrate, a channel region, and a gate formed in association with the channel region. In one exemplary embodiment, the gate comprises a first material that is...
US20120094475 METHOD FOR FABRICATING A METAL GATE ELECTRODE  
An exemplary method for fabricating a metal gate electrode includes providing a substrate having thereon a dielectric layer and a trench in the dielectric layer; depositing a work-function metal...
US20120181630 REPLACEMENT GATE WITH REDUCED GATE LEAKAGE CURRENT  
Replacement gate work function material stacks are provided, which provides a work function about the energy level of the conduction band of silicon. After removal of a disposable gate stack, a...
US20110217832 METHOD OF FILLING A DEEP TRENCH IN A SUBSTRATE  
Methods of filling deep trenches in substrates are described. A method includes providing a substrate with a deep trench formed therein. The method also includes forming a dielectric layer...
US20110057259 METHOD FOR FORMING A THICK BOTTOM OXIDE (TBO) IN A TRENCH MOSFET  
A method for forming a thick bottom oxide in the bottom of a trench used in a vertical MOSFET. Initially, an n-type substrate has an n-type epitaxial layer grown thereon. A top portion of the...
US20130049103 REPLACEMENT GATE COMPATIBLE eDRAM TRANSISTOR WITH RECESSED CHANNEL  
An eDRAM is fabricated including high performance logic transistor technology and ultra low leakage DRAM transistor technology. Embodiments include forming a recessed channel in a substrate,...
US20140256124 IN-SITU METAL GATE RECESS PROCESS FOR SELF-ALIGNED CONTACT APPLICATION  
A method of producing a metal gate structure. The method includes forming a gate structure above a semiconductor substrate and performing one or more chemical metal planarization (CMP) processes...
US20140179093 GATE STRUCTURE FORMATION PROCESSES  
Gate structures and methods of fabricating gate structures of semiconductor devices are provided. One method includes, for instance: providing a sacrificial layer over a substrate; patterning the...
US20110084332 TRENCH TERMINATION STRUCTURE  
A trench MOS device includes a base semiconductor substrate, an epitaxial layer grown on the base semiconductor substrate, a first trench in the epitaxial layer, and a stepped trench comprising a...
US20150041878 METHOD FOR FORMING A FLOATING GATE IN A RECESS OF A SHALLOW TRENCH ISOLATION (STI) REGION  
A method includes forming a shallow trench isolation (STI) region in a substrate, the STI region comprising an etch stop layer; etching the STI region by a first etch to the etch stop layer to...
US20140004693 METHODS FOR FABRICATING INTEGRATED CIRCUITS HAVING IMPROVED METAL GATE STRUCTURES  
Methods for fabricating integrated circuits are provided. One method includes forming first and second FET trenches in an interlayer dielectric material on a semiconductor substrate. The first FET...
US20070004116 Trenched MOSFET termination with tungsten plug structures  
A metal oxide semiconductor field effect transistor (MOSFET) device includes a termination area. The termination area has a trenched gate runner electrically connected to a trenched gate of said...
US20130320952 MONOLITHICALLY INTEGRATED HEMT AND CURRENT PROTECTION DEVICE  
A transistor device includes a high electron mobility field effect transistor (HEMT) and a protection device. The HEMT has a source, a drain and a gate. The HEMT switches on and conducts current...
US20120256276 Metal Gate and Fabricating Method Thereof  
A method of manufacturing a metal gate is provided. The method includes providing a substrate. Then, a gate dielectric layer is formed on the substrate. A multi-layered stack structure having a...
US20100124818 FABRICATING HIGH-K/METAL GATE DEVICES IN A GATE LAST PROCESS  
The present disclosure provides a method that includes forming first and second gate structures over first and second regions, respectively, removing a first dummy gate and first dummy dielectric...
US20120052641 Methods of Manufacturing MOS Transistors  
Methods of manufacturing a MOS transistor are provided. The methods may include forming first and second trenches. The methods may further include forming first metal patterns within portions of...
US20120052668 SPLIT WORD LINE FABRICATION PROCESS  
A method for forming a buried split word line structure is provided. The method comprises the following steps. At first, a substrate having a trench therein is provided. Two liners are formed to a...
US20120299185 Slit Recess Channel Gate and Method of Forming the Same  
A slit recess channel gate is further provided. The slit recess channel gate includes a substrate, a gate dielectric layer, a first conductive layer and a second conductive layer. The substrate...
US20100151669 FORMING ABRUPT SOURCE DRAIN METAL GATE TRANSISTORS  
A gate structure may be utilized as a mask to form source and drain regions. Then the gate structure may be removed to form a gap and spacers may be formed in the gap to define a trench. In the...
US20110003459 METHOD FOR FABRICATING BURIED GATE USING PRE LANDING PLUGS  
A method for fabricating a semiconductor device is provided, the method includes forming a plug conductive layer over an entire surface of a substrate, etching the plug conductive layer to form...
US20110151655 METAL GATE FILL AND METHOD OF MAKING  
The present disclosure provides various methods of fabricating a semiconductor device. A method of fabricating a semiconductor device includes providing a semiconductor substrate and forming a...
US20110049618 FABRICATION OF TRENCH DMOS DEVICE HAVING THICK BOTTOM SHIELDING OXIDE  
Semiconductor device fabrication method and devices are disclosed. A device may be fabricated by forming in a semiconductor layer; filling the trench with an insulating material; removing selected...
US20090263952 SEMICONDUCTOR DEVICE FABRICATION USING SPACERS  
A process for fabrication of a semiconductor device that includes forming a first trench in a semiconductor body, forming spaced spacers in the first trench, and forming a narrower second trench...
US20130320412 ISOLATED INSULATING GATE STRUCTURE  
Systems and methods are presented for forming a gate structure comprising an insulative portion, whereby the insulative portion is utilized to electrically isolate an electrically conductive...
US20060030138 Layout method for semiconductor integrated circuit device  
Provided is a layout method for a semiconductor integrated circuit device in which area pads and peripheral wiring patterns thereof can be automatically laid out. At least one of a plurality of...
US20080128799 SEMICONDUCTOR DEVICE WITH BULB TYPE RECESS GATE AND METHOD FOR FABRICATING THE SAME  
A method for fabricating a semiconductor device includes etching a substrate to form a first recess having a micro trench, etching the substrate disposed under the first recess to form a second...
US20080142873 INTEGRATED CIRCUIT SYSTEM WITH METAL AND SEMI-CONDUCTING GATE  
A method for forming an integrated circuit system is provided including forming a semi-conducting layer over a substrate, forming a spacer stack having a gap filler adjacent to the semi-conducting...
US20140148000 PROCESS FOR MANUFACTURING A POWER DEVICE WITH A TRENCH-GATE STRUCTURE AND CORRESPONDING DEVICE  
An embodiment for realizing a power device with trench-gate structure integrated on a semiconductor substrate, and including etching the semiconductor substrate to make a first trench having first...
US20130280900 MANUFACTURING METHOD FOR SEMICONDUCTOR DEVICE HAVING METAL GATE  
A manufacturing method for a semiconductor device having a metal gate is provided. First and second gate trenches are respectively formed in first and second semiconductor devices. A work-function...
US20120220092 METHOD OF FORMING A HYBRID SPLIT GATE SIMICONDUCTOR  
Method of forming a Hybrid Split Gate Semiconductor. In accordance with a method embodiment of the present invention, a plurality of first trenches is formed in a semiconductor substrate to a...
US20090294843 ENCLOSED VOID CAVITY FOR LOW DIELECTRIC CONSTANT INSULATOR  
Field effect devices and ICs (80, 82, 84) with very low gate-drain capacitance Cgd are provided by forming a substantially empty void (70, 100) between the gate (60′) and the drain (27) regions....
US20110059601 METHOD FOR TUNING A WORK FUNCTION OF HIGH-K METAL GATE DEVICES  
A method of fabricating a semiconductor device includes forming a first trench and a second trench on a semiconductor substrate and forming a first metal layer in the first and second trenches....
US20130137258 METHOD FOR FABRICATING BURIED GATES USING PRE LANDING PLUGS  
A method for fabricating a semiconductor device is provided, the method includes forming a plug conductive layer over an entire surface of a substrate, etching the plug conductive layer to form...
US20140015037 Novel Metal/Polysilicon Gate Trench Power Mosfet  
The present disclosure relates to a power MOSFET device having a relatively low resistance hybrid gate electrode that enables good switching performance. In some embodiments, the power MOSFET...
US20150037968 METHOD FOR FORMING SHIELDED GATE OF MOSFET  
A method for forming a shielded gate of a MOSFET includes steps as following: providing a semiconductor substrate having at least one trench, forming a bottom gate oxide region and a shielded gate...
Matches 1 - 50 out of 438 1 2 3 4 5 6 7 8 9 >