Matches 251 - 300 out of 438 < 1 2 3 4 5 6 7 8 9 >


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US20130099298 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME  
A semiconductor device comprises a buried gate formed in a mat and in an adjacent dummy region. A space larger than is conventional is formed in a dummy region of a mat edge where the buried gate...
US20120289034 Methods of Forming NAND Memory Constructions  
Some embodiments include NAND memory constructions. The constructions may contain semiconductor material pillars extending upwardly between dielectric regions, with individual pillars having a...
US20120146122 3-D NON-VOLATILE MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME  
A three-dimensional (3-D) non-volatile memory device includes a plurality of word line structures extended in parallel and including a plurality of interlayer dielectric layers and a plurality of...
US20120061763 METHODS OF FORMING NON-VOLATILE MEMORY DEVICES INCLUDING LOW-K DIELECTRIC GAPS IN SUBSTRATES AND DEVICES SO FORMED  
A method of manufacturing a non-volatile memory device, can be provided by forming a gate insulating layer and a gate conductive layer on a substrate that includes active regions that are defined...
US20120001258 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME  
A semiconductor device includes a gate metal buried within a trench included in a semiconductor substrate including an active region defined by an isolation layer, a spacer pattern disposed on an...
US20110291185 Semiconductor Device Having an Edge Termination Structure and Method of Manufacture Thereof  
A semiconductor device having a semiconductor body (22) comprising an active area (7) and a termination structure (16) surrounding the active area, and a method for the manufacture thereof. The...
US20110151633 METHODS OF FORMING A CONDUCTIVE LAYER STRUCTURE AND METHODS OF MANUFACTURING A RECESSED CHANNEL TRANSISTOR INCLUDING THE SAME  
In a method of forming a conductive layer structure and a method of manufacturing a recess channel transistor, a first insulating layer and a first conductive layer are sequentially formed on a...
US20110095360 METHOD AND DEVICE INCLUDING TRANSISTOR COMPONENT HAVING A FIELD ELECTRODE  
A transistor component and method of forming a transistor component. One embodiment provides a semiconductor arrangement including a semiconductor body having a at least one first trench, a first...
US20110065271 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE  
According to one embodiment, a method of fabricating a semiconductor device is disclosed. The method includes the steps of: forming a tunnel insulating film on a semiconductor substrate; forming a...
US20110003468 METHOD FOR FABRICATING SEMICONDUCTOR DEVICE WITH BURIED GATES  
A method for fabricating a semiconductor device, including forming a trench by etching a semiconductor substrate, forming a gate insulation layer over a surface of the trench, forming a gate...
US20100279497 Method for Manufacturing Semiconductor Device with a Recessed Channel  
A semiconductor device having a recessed channel and a method for manufacturing the same. The semiconductor device comprises a semiconductor substrate formed with an isolation layer defining an...
US20100270608 Integrated Circuits And Fabrication Using Sidewall Nitridation Processes  
Semiconductor devices are provided with encapsulating films for protection of sidewall features during fabrication processes, such as etching to form isolation regions. In a non-volatile flash...
US20100255664 METHODS OF SEMICONDUCTOR PROCESSING INVOLVING FORMING DOPED POLYSILICON ON UNDOPED POLYSILICON  
A number of methods are provided for semiconductor processing. One such method includes depositing a first precursor material on a surface at a particular temperature to form an undoped...
US20100252886 FIN STRUCTURES AND METHODS OF FABRICATING FIN STRUCTURES  
There is provided fin structures and methods for fabricating fin structures. More specifically, fin structures are formed in a substrate. The fin structures may include two fins separated by a...
US20100248437 Methods of forming recessed gate structures including blocking members, and methods of forming semiconductor devices having the recessed gate structures  
A recessed gate structure in a semiconductor device includes a gate electrode partially buried in a substrate, a blocking member formed in the buried portion of the gate electrode, and a gate...
US20100219467 SEMICONDUCTOR DEVICE HAVING SADDLE FIN TRANSISTOR AND MANUFACTURING METHOD OF THE SAME  
The present invention discloses a transistor having the saddle fin structure. The saddle fin transistor of the present invention has a structure in which a landing plug contact region,...
US20100207203 SEMICONDUCTOR DEVICE WITH BURIED GATE AND METHOD FOR FABRICATING THE SAME  
A Semiconductor device includes a substrate having an active region defined by a device isolation layer, a trench formed by etching the active region and the device isolation layer, a buried gate...
US20100200910 Semiconductor Devices with Stable and Controlled Avalanche Characteristics and Methods of Fabricating the Same  
Disclosed are semiconductor devices with breakdown voltages that are more controlled and stable after repeated exposure to breakdown conditions than prior art devices. The disclosed devices can be...
US20100193862 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME  
A method of manufacturing according to the present invention includes forming a trench to a semiconductor substrate, depositing an insulating film to the trench, etching the insulating film of a...
US20100193799 Semiconductor device and method of manufacturing semiconductor device  
The semiconductor device according to the present invention includes: a semiconductor layer of a first conductivity type made of SiC having an Si surface; a gate trench dug down from the surface...
US20100173486 SEMICONDUCTOR DEVICE WITH MUSHROOM ELECTRODE AND MANUFACTURE METHOD THEREOF  
A semiconductor device has: a semiconductor substrate having a pair of current input/output regions via which current flows; an insulating film formed on the semiconductor substrate and having a...
US20100167516 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF  
A semiconductor substrate has a trench in a first main surface. An insulated gate field effect part includes a gate electrode formed in the first main surface. A potential fixing electrode fills...
US20100163977 Semiconductor Device and Method for Fabricating the Same  
A method for fabricating a semiconductor device includes forming a trench in a substrate, forming a gate electrode buried over the trench to form a buried gate pattern, etching portions of the...
US20100163976 Semiconductor Device Having Saddle Fin Transistor and Method for Fabricating the Same  
A method for fabricating a semiconductor device includes forming a pad nitride layer that exposes an isolation region over a cell region of a semiconductor substrate; forming a trench in the...
US20100151636 Methods to make fine patterns by exploiting difference of threshold laser fluence of materials and tft fabrication methods using the same  
Disclosed are methods of making fine patterns by exploiting difference in threshold laser fluence of materials and a thin film transistor (TFT) fabrication methods using the same, and more...
US20100142266 VERTICAL FIELD-EFFECT TRANSISTOR  
A method produces a vertical field-effect transistor having a semiconductor layer, in which a doped channel region is arranged along a depression. A “buried” terminal region leads as far as a...
US20100133609 METHODS OF PROVIDING ELECTRICAL ISOLATION AND SEMICONDUCTOR STRUCTURES INCLUDING SAME  
Methods of isolating gates in a semiconductor structure. In one embodiment, isolation is achieved using a spacer material in combination with fins having substantially vertical sidewalls. In...
US20100123193 SEMICONDUCTOR COMPONENT AND METHOD OF MANUFACTURE  
A semiconductor component that includes gate electrodes and shield electrodes and a method of manufacturing the semiconductor component. A semiconductor material has a device region, a gate...
US20100109073 FLASH MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME  
A flash memory device includes a semiconductor substrate having a trench formed therein, the trench including a device isolation film, an oxide film formed over the semiconductor substrate...
US20100102371 Semiconductor devices including buried gate electrodes and isolation layers and methods of forming semiconductor devices including buried gate electrodes and isolation layers using self aligned double patterning  
A semiconductor device, including a semiconductor substrate including isolations defining active regions of the semiconductor substrate, and a plurality of buried gate electrodes between a pair of...
US20090170302 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE HAVING VERTICAL TRANSISTOR  
A method for manufacturing a semiconductor device having a vertical transistor includes forming hard masks on a semiconductor substrate to expose portions of the semiconductor substrate. Then the...
US20090068827 Method for fabricating semiconductor device  
A semiconductor device provided with: a channel region formed in a surface of a semiconductor substrate in a predetermined depth range, a trench being formed in the surface as penetrating the...
US20090065809 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE  
A semiconductor device is provided in which a stress can be effectively applied from a semiconductor layer having a different lattice constant from a semiconductor substrate to a channel part,...
US20080265301 Self-aligned patterning method by using non-conformal film and etch back for flash memory and other semiconductor applications  
A method for fabricating a memory device with a self-aligned trap layer which is optimized for scaling is disclosed. In the present invention, a non-conformal film is deposited over the charge...
US20080258211 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME  
In a MIS-type semiconductor device having a trench gate structure, a withstand voltage is ensured without changing the thickness of a drift layer and on-resistance can be reduced without applying...
US20080194090 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE USING A FREE RADICAL ASSISTED CHEMICAL VAPOR DEPOSITION NITIRIFYING PROCESS  
A method for manufacturing a semiconductor device for use in avoiding unwanted oxidation along exposed surfaces and for use in relieving etching damage is presented. The method includes step of...
US20050224891 Self aligned contact in a semiconductor device and method of fabricating the same  
A method of fabricating a self-aligned contact in a semiconductor device, in accordance with one embodiment of the present invention, includes etching a trench in a core area and partially...
US20170125532 SEMICONDUCTOR STRUCTURE HAVING BURIED GATE STRUCTURE, METHOD FOR MANUFACTURING THE SAME, AND MEMORY CELL HAVING THE SAME  
A method for forming a semiconductor structure includes forming a trench in a semiconductor substrate; forming a gate dielectric layer over a bottom surface and sidewalls of the trench; forming a...
US20170110331 Methods for Forming Semiconductor Devices  
A method for forming a semiconductor device includes etching, in a masked etching process, through a layer stack located on a surface of a semiconductor substrate to expose the semiconductor...
US20170084615 SEMICONDUCTOR DEVICE HAVING A GATE AND METHOD OF FORMING THE SAME  
Provided are a semiconductor device having a gate and a method of forming the same. The method includes forming a gate dielectric, forming a first conductive material layer on the gate dielectric,...
US20170040327 Method Of Forming Conductive Material Of A Buried Transistor Gate Line And Method Of Forming A Buried Transistor Gate Line  
A method of forming conductive material of a buried transistor gate line includes adhering a precursor comprising tungsten and chlorine to material within a substrate trench. The precursor is...
US20160343723 STRUCTURE AND METHOD FOR BEOL NANOSCALE DAMASCENE SIDEWALL-DEFINED NON-VOLATILE MEMORY ELEMENT  
An exposed edge of a conductive liner in a Damascene trench provides a high aspect ratio geometry of a non-volatile memory cell that can be scaled to arbitrarily small and nanoscale areas and thus...
US20160336414 DUAL WORK FUNCTION BURIED GATE-TYPE TRANSISTOR, METHOD FOR FORMING THE SAME, AND ELECTRONIC DEVICE INCLUDING THE SAME  
A transistor includes: a source region and a drain region that are formed in a substrate to be spaced apart from each other; a trench formed in the substrate between the source region and the...
US20160225882 METHOD OF MANUFACTURING ISOLATION STRUCTURE AND NON-VOLATILE MEMORY WITH THE ISOLATION STRUCTURE  
A method of manufacturing an isolation structure suitable for a non-volatile memory is provided. A substrate is provided. A dielectric layer, a conductive layer, and a hard mask layer are...
US20160190015 METHOD OF PATTERNING DOPANT FILMS IN HIGH-K DIELECTRICS IN A SOFT MASK INTEGRATION SCHEME  
A method of fabricating advanced node field effect transistors using a replacement metal gate process. The method includes dopant a high-k dielectric directly or indirectly by using layers...
US20160181395 FINFET DEVICE HAVING A HIGH GERMANIUM CONTENT FIN STRUCTURE AND METHOD OF MAKING SAME  
A fin of silicon-germanium material is formed and covered with an epitaxially grown layer of silicon material. A dummy transistor gate is then formed to extend over a channel of the fin. Sidewall...
US20160155642 Deposited Material and Method of Formation  
A system and method for manufacturing a semiconductor device is provided. An embodiment comprises forming a deposited layer using an atomic layer deposition (ALD) process. The ALD process may...
US20160141204 TRENCH HAVING THICK DIELECTRIC SELECTIVELY ON BOTTOM PORTION  
A method of fabricating a semiconductor device includes etching a semiconductor substrate having a top surface to form a trench having sidewalls and a bottom surface that extends from the top...
US20160133525 SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THE SAME  
In a method of manufacturing a semiconductor device, a first gate structure and a second gate structure are formed on a substrate in a first region and a second region, respectively. A first...
US20160133470 METHODS OF FORMING TITANIUM-ALUMINUM LAYERS FOR GATE ELECTRODES AND RELATED SEMICONDUCTOR DEVICES  
Methods of forming a semiconductor device are provided in which a first titanium-aluminum layer is formed in a recess. A first titanium layer is formed in the recess on top of the first...

Matches 251 - 300 out of 438 < 1 2 3 4 5 6 7 8 9 >