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US20090315112 Forming ESD Diodes and BJTs Using FinFET Compatible Processes  
A method of forming an electrostatic discharging (ESD) device includes forming a first and a second semiconductor fin over a substrate and adjacent to each other; epitaxially growing a...
US20090311840 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE  
A method of manufacturing a semiconductor device includes forming, over a substrate, a gate insulating film containing a high-k insulating film which is composed of a material having a dielectric...
US20090309141 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME  
A disclosed semiconductor device includes multiple gate electrodes disposed on a semiconductor substrate; and multiple sidewall spacers disposed on sidewalls of the gate electrodes. The thickness...
US20090294860 IN SITU FORMED DRAIN AND SOURCE REGIONS IN A SILICON/GERMANIUM CONTAINING TRANSISTOR DEVICE  
By repeatedly applying a process sequence comprising an etch process and a selective epitaxial growth process during the formation of drain and source areas in a transistor device, highly complex...
US20090294871 SEMICONDUCTOR DEVICES HAVING RARE EARTH METAL SILICIDE CONTACT LAYERS AND METHODS FOR FABRICATING THE SAME  
MOS transistors and methods for fabricating MOS transistors are provided. One exemplary method comprises providing a substrate having a silicon-comprising surface region. A first metal silicide...
US20090289370 LOW CONTACT RESISTANCE SEMICONDUCTOR DEVICES AND METHODS FOR FABRICATING THE SAME  
Low contact resistance semiconductor devices and methods for fabricating such semiconductor devices are provided. In accordance with one exemplary embodiment, a method comprises depositing an...
US20090286374 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME  
A base layer is formed on an insulating substrate, and a semiconductor layer is formed in localized fashion thereon. A gate insulating film is then formed so as to cover the semiconductor layer,...
US20090286373 METHOD FOR FABRICATING SEMICONDUCTOR DEVICES WITH SHALLOW DIFFUSION REGIONS  
A method for fabricating a semiconductor device is presented. The method includes providing a substrate and forming a gate stack over the substrate. A first laser processing to form vacancy rich...
US20090283834 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF  
A MOS semiconductor device including MOSFETs each of which has a gate portion formed on a semiconductor substrate and source/drain regions includes sidewall insulating films formed on the side...
US20090273028 Short Channel Lateral MOSFET and Method  
A short channel Lateral MOSFET (LMOS) and method are disclosed with interpenetrating drain-body protrusions (IDBP) for reducing channel-on resistance while maintaining high punch-through voltage....
US20090242982 SELF-ALIGNED COMPLEMENTARY LDMOS  
The invention includes a laterally double-diffused metal-oxide semiconductor (LDMOS) having a reduced size, a high breakdown voltage, and a low on-state resistance. This is achieved by providing a...
US20090236675 SELF-ALIGNED FIELD-EFFECT TRANSISTOR STRUCTURE AND MANUFACTURING METHOD THEREOF  
A self-aligned field-effect transistor (FET) is provided. The self-aligned FET includes a substrate, a dielectric layer, conductive electrodes, and a carbon nanotube. A patterned back-gated...
US20090227084 Novel Method to Enhance Channel Stress in CMOS Processes  
The invention provides a method of fabricating a semiconductor device that enhances the amount of stress that is transmitted to the channel region for carrier mobility enhancement. In one...
US20090224293 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME  
A semiconductor device includes: a sidewall insulating film; a gate electrode; source and drain regions; a first stress film; and a second stress film.
US20090221122 MOS Field Effect Transistor and Manufacture Method Therefor  
An MOS field effect transistor which improves the mobility of electrons and holes of an nMOS and a pMOS by applying larger tensile stress to a stressed Si channel in a lateral direction than that...
US20090189189 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF  
An exemplary embodiment provides a semiconductor device, in which a junction leakage current is reduced in MISFET including a source/drain impurity layer formed in a semiconductor region containing...
US20090159978 SEMICONDUCTOR DEVICE AND PROCESS FOR MANUFACTURING SAME  
A semiconductor device 100 includes a first gate 210 , which is formed using a gate last process. The first gate 210 includes a gate insulating film formed in a bottom surface in a first...
US20090159992 SEMICONDUCTOR DEVICE HAVING A POLYSILICON ELECTRODE  
A method of manufacturing a semiconductor device such as a MOS transistor. The device comprises a polysilicon gate ( 10 ) and doped regions ( 22,24 ) formed in a semiconductor substrate ( 12 ),...
US20090152652 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE AND THE SEMICONDUCTOR DEVICE  
Described herein is a method of manufacturing a semiconductor device realizing higher performance by reducing contact resistance of an electrode. In the method, a gate insulating film, a gate...
US20090146181 INTEGRATED CIRCUIT SYSTEM EMPLOYING DIFFUSED SOURCE/DRAIN EXTENSIONS  
An integrated circuit system that includes: providing a PFET device including a doped epitaxial layer; and forming a source/drain extension by employing an energy source to diffuse a dopant from...
US20090142901 METHOD FOR FABRICATING SEMICONDUCTOR DEVICE  
A method for fabricating a semiconductor device is disclosed. The method includes: forming a photoresist film on a semiconductor substrate including a silicide forming region and non-silicide...
US20090134455 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD  
A semiconductor device including a substrate, a first well, a second well, a gate, a first doped region, and a second doped region. The substrate includes a first conductive type. The first well...
US20090127594 MOS TRANSISTORS HAVING NiPtSi CONTACT LAYERS AND METHODS FOR FABRICATING THE SAME  
MOS transistors and methods for fabricating MOS transistors are provided. One exemplary method comprises providing a silicon substrate having an impurity-doped region disposed at a surface of the...
US20090124057 DAMASCENE GATE FIELD EFFECT TRANSISTOR WITH AN INTERNAL SPACER STRUCTURE  
A MOSFET is disclosed that comprises a channel between a source extension and a drain extension, a dielectric layer over the channel, a gate spacer structure formed on a peripheral portion of the...
US20090108336 METHOD FOR ADJUSTING THE HEIGHT OF A GATE ELECTRODE IN A SEMICONDUCTOR DEVICE  
By providing an implantation blocking material on the gate electrode structures of advanced semiconductor devices during high energy implantation processes, the required shielding effect with...
US20090111233 METHOD OF FORMING JUNCTION OF SEMICONDUCTOR DEVICE  
The present invention relates to a method of forming junctions of a semiconductor device. According to the method of forming junctions of a semiconductor device in accordance with an aspect of the...
US20090104741 METHODS OF FABRICATING SEMICONDUCTOR DEVICES USING A PLASMA PROCESS WITH NON-SILANE GAS INCLUDING DEUTERIUM  
Semiconductor devices are fabricated using a plasma process with a non-silane gas that includes deuterium, and which may result in improved device reliability and/or other improved device...
US20090072329 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME  
The semiconductor device includes a field effect transistor comprising a gate insulating film having the film thickness of 1 nm or more, wherein at least an area of the gate insulating film which...
US20090029515 METHODS FOR THE FORMATION OF FULLY SILICIDED METAL GATES  
An advanced gate structure that includes a fully silicided metal gate and silicided source and drain regions in which the fully silicided metal gate has a thickness that is greater than the...
US20080296666 SEMICONDUCTOR DEVICE INCLUDING AN EMBEDDED CONTACT PLUG  
A semiconductor device includes an active area isolated by an isolation area on a semiconductor substrate. A transistor includes a gate electrode extending across the active area, source/drain...
US20080290425 Method for Fabricating a Semiconductor Element, and Semiconductor Element  
In a method for fabricating a semiconductor element in a substrate, first implantation ions are implanted into the substrate, whereby micro-cavities are produced in a first partial region of the...
US20080254587 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICES USING SELF-ALIGNED PROCESS TO INCREASE DEVICE PACKING DENSITY  
A method for fabricating a semiconductor integrated circuit having a self-aligned structure, the method comprises the steps of: providing a semiconductor substrate; forming a gate dielectric layer,...
US20080246084 POWER SEMICONDUCTOR DEVICE AND METHOD FOR PRODUCING THE SAME  
A power semiconductor device includes: a first semiconductor substrate; a second semiconductor layer; a plurality of third semiconductor pillar regions and a plurality of fourth semiconductor...
US20080242038 METHODS OF FORMING A MULTILAYER CAPPING FILM TO MINIMIZE DIFFERENTIAL HEATING IN ANNEAL PROCESSES  
Methods and associated structures of forming a microelectronic device are described. Those methods may include implanting the source/drain region, forming a multilayer cap on the source/drain...
US20080230816 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME  
A method of manufacturing a semiconductor device has forming a first silicon film over the first insulating film, forming a second silicon film over the first silicon film, a first etching the...
US20080227258 Methods of forming a semiconductor device  
Methods of forming a semiconductor device include forming a mask layer on a semiconductor substrate. The mask layer has vertically and horizontally extending portions. The vertically extending...
US20080227259 SELF-ALIGNED PROCESS FOR NANOTUBE/NANOWIRE FETs  
A complementary metal oxide semiconductor (CMOS) device, e.g., a field effect transistor (FET), that includes at least one one-dimensional nanostructure that is typically a carbon-based...
US20080213964 FIELD EFFECT TRANSISTOR WITH THIN GATE ELECTRODE AND METHOD OF FABRICATING SAME  
A field effect transistor and a method of fabricating the field effect transistor. The field effect transistor includes: a silicon body, a perimeter of the silicon body abutting a dielectric...
US20080188048 Semiconductor device  
The invention provides a semiconductor apparatus capable of achieving a device having a snap-back resisting pressure of about 5 to 10 V by a self-aligning process. The semiconductor apparatus...
US20080185666 FIELD EFFECT TRANSISTORS INCLUDING VARIABLE WIDTH CHANNELS AND METHODS OF FORMING THE SAME  
A field effect transistor includes a first substrate region having a channel region and a second substrate region where a heavily doped region is formed. The channel region includes a first portion...
US20080176374 METHODS OF FORMING SEMICONDUCTOR DEVICES USING SELF-ALIGNED METAL SHUNTS  
A method of fabricating a semiconductor device using a self-aligned metal shunt process is disclosed. The method can include sequentially forming a lower conductive pattern and a sacrificial...
US20080176373 Semiconductor device and manufacturing method for the same  
A semiconductor device includes a first diffusion region including germanium atoms and first impurity atoms, provided on a surface layer of a semiconductor substrate, the first impurity atoms...
US20080166847 METHOD OF FORMING SOURCE AND DRAIN OF FIELD-EFFECT-TRANSISTOR AND STRUCTURE THEREOF  
Embodiments of the invention provide a method of forming a field-effect-transistor (FET). The method includes implanting one or more n-type dopants to create one or more implanted regions with at...
US20080160709 Advanced activation approach for MOS devices  
A method of forming a semiconductor structure includes providing a semiconductor substrate; forming a gate dielectric over the semiconductor substrate; forming a gate electrode on the gate...
US20080157199 Dielectric extension to mitigate short channel effects  
In patterning a transistor, some of a layer of gate dielectric material is allowed to remain over a semiconductor substrate upon which the transistor is formed. This remaining dielectric material...
US20080149929 METHOD OF PRODUCING A SEMICONDUCTOR ELEMENT AND SEMICONDUCTOR ELEMENT  
In a method of producing a semiconductor element in a substrate, a plurality of carbide precipitates is formed in the substrate, doping atoms are implanted into the substrate, thereby forming...
US20080150035 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF  
A semiconductor device includes an N-channel transistor having an N-type gate electrode and a P-channel transistor having a P-type gate electrode which are formed on a semiconductor substrate. The...
US20080153238 Method for forming a most device with reduced transient enhanced diffusion  
A method for forming a MOS device on a semiconductor substrate includes steps of: forming a gate structure on the semiconductor substrate; implanting ions into the semiconductor substrate for...
US20080142884 SEMICONDUCTOR DEVICE  
Embodiments relate to a semiconductor device, and to a semiconductor device and a method for manufacture that may improve a performance of a MOSFET device. According to embodiments, a semiconductor...
US20080135945 SEMICONDUCTOR DEVICE HAVING A SILICIDED GATE ELECTRODE AND METHOD OF MANUFACTURE THEREFOR  
The present invention provides a semiconductor device, a method of manufacture therefor, and an integrated circuit including the semiconductor device. The semiconductor device ( 100 ), among other...
Matches 1 - 50 out of 75 1 2 >