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US20090321836 DOUBLE GATE AND TRI-GATE TRANSISTOR FORMED ON A BULK SUBSTRATE AND METHOD FOR FORMING THE TRANSISTOR  
Three-dimensional transistor structures such as FinFETS and tri-gate transistors may be formed on the basis of an enhanced masking regime, thereby enabling the formation of drain and source areas,...
US20090317956 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE  
A method for manufacturing a semiconductor device includes forming a silicon substrate having first and second surfaces, the silicon substrate including no oxide film or an oxide film having a...
US20090317957 Method for Forming Isolation Structures  
A trench is formed in the surface of a provided semiconductor body. An oxide is deposited in the trench and a cap is deposited on the oxide, wherein the combination of the cap and the oxide impart...
US20090298248 Two-Step STI Formation Process  
A method of forming an integrated circuit structure includes providing a semiconductor substrate; forming a first isolation region in the semiconductor substrate; after the step of forming the...
US20090286367 SYSTEM AND METHOD FOR THE MANUFACTURE OF SEMICONDUCTOR DEVICES BY THE IMPLANTATION OF CARBON CLUSTERS  
A process is disclosed which incorporates implantation of a carbon cluster into a substrate to improve the characteristics of transistor junctions when the substrates are doped with Boron and...
US20090275184 Fabricating Method of Semiconductor Device  
Disclosed is a method of fabricating a semiconductor device. The method of fabricating a semiconductor device includes removing a part of an isolation layer from a semiconductor substrate such that...
US20090258468 MINIMIZING TRANSISTOR VARIATIONS DUE TO SHALLOW TRENCH ISOLATION STRESS  
The present invention provides, in one embodiment, a method of manufacturing a metal oxide semiconductor (MOS) transistor ( 100 ). The method comprises forming an active area ( 105 ) in a substrate...
US20090250770 INTEGRATION OF A SENSE FET INTO A DISCRETE POWER MOSFET  
A semiconductor device includes a main field effect transistor (FET) and one or more sense FETs, and a common gate pad. The main FET and the one or more sense FETs are formed in a common substrate....
US20090230502 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME  
A method for manufacturing a semiconductor device includes: forming a first semiconductor layer on a semiconductor substrate; forming a second semiconductor layer on the first semiconductor layer;...
US20090224335 FIELD EFFECT TRANSISTOR WITH REDUCED SHALLOW TRENCH ISOLATION INDUCED LEAKAGE CURRENT  
Edges of source and drain regions along the direction of a channel of a field effect transistor are formed within an active area offset from the boundary between the active area and a shallow...
US20090221121 Method of Forming a Salicide Layer for a Semiconductor Device  
Methods of fabricating semiconductor devices are disclosed. An illustrated example method protects spacers and active areas by performing impurity ion implantation on an oxide layer prior to...
US20090209078 Semiconductor Integrated Circuit Device and Method of Manufacturing the Same  
Provided is a manufacturing method of a semiconductor integrated circuit device having a plurality of first MISFETs in a first region and a plurality of second MISFETs in a second region, which...
US20090209077 SEMICONDUCTOR DEVICE CHANNEL TERMINATION  
A semiconductor device has a channel termination region for using a trench 30 filled with field oxide 32 and a channel stopper ring 18 which extends from the first major surface 8 through...
US20090203180 MOS TRANSISTOR HAVING PROTRUDED-SHAPE CHANNEL AND METHOD OF FABRICATING THE SAME  
A MOS transistor that has a protruding portion with a favorable vertical profile and a protruded-shape channel that requires no additional photolithography process, and a method of fabricating the...
US20090194825 SELF-ALIGNED CONTACT STRUCTURE IN A SEMICONDUCTOR DEVICE  
By forming an isolation structure that extends above the height level defined by the semiconductor material of an active region, respective recesses may be defined in combination with gate...
US20090159981 STRAIN MODULATION IN ACTIVE AREAS BY CONTROLLED INCORPORATION OF NITROGEN AT Si-SiO2 INTERFACE  
Adding nitrogen to the Si—SiO2 interface at STI sidewalls increases carrier mobility in MOS transistors, but control of the amount of nitrogen has been problematic due to loss of the nitrogen...
US20090140350 LITHOGRAPHY FOR PRINTING CONSTANT LINE WIDTH FEATURES  
An anisotropic wet etch of a semiconductor layer generates facets joined by a ridge running along the center of a pattern in a dielectric hardmask layer on the semiconductor layer. The dielectric...
US20090127635 Transistor including an active region and methods for fabricating the same  
A transistor including an active region and methods thereof. The active region may include corners with at least one of a rectangular, curved or rounded shape. The methods may include isotropically...
US20090098702 Method to Form CMOS Circuits Using Optimized Sidewalls  
A method of forming reduced width STI field oxide elements using sidewall spacers on the isolation hardmask to reduce the STI trench width is disclosed. The isolation sidewall spacers are formed by...
US20090090973 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME  
A semiconductor device includes a device isolation insulating film which is provided in a semiconductor substrate, and an insulated-gate field-effect transistor which is disposed adjacent to the...
US20090072310 SEMICONDUCTOR STRUCTURE INCLUDING HIGH VOLTAGE DEVICE  
A high voltage device includes a substrate with a device region defined thereon. A gate stack is disposed on the substrate in the device region. A channel region is located in the substrate beneath...
US20090072319 SEMICONDUCTOR DEVICE WITH RELATIVELY HIGH BREAKDOWN VOLTAGE AND MANUFACTURING METHOD  
A semiconductor device includes at least one active component ( 18 ) having a p-n junction ( 26 ) on the semiconductor substrate in an active region ( 19 ) of the semiconductor substrate ( 4 ). A...
US20090061586 Strained Channel Transistor  
A semiconductor device, such as a PMOS or an NMOS transistor, having a stressed channel region is provided. The semiconductor device is formed by recessing the source/drain regions after forming a...
US20090039442 Semiconductor Devices and Methods of Manufacture Thereof  
Semiconductor devices and methods of manufacture thereof are disclosed. In a preferred embodiment, a method of manufacturing a semiconductor device includes providing a semiconductor wafer, forming...
US20090032886 SEMICONDUCTOR TRANSISTORS HAVING REDUCED DISTANCES BETWEEN GATE ELECTRODE REGIONS  
A semiconductor structure and a method for forming the same. The method includes providing a semiconductor structure which includes a semiconductor substrate. The semiconductor substrate includes...
US20080315268 Methods and Apparatus for Semiconductor Memory Devices Manufacturable Using Bulk CMOS Process Manufacturing  
The present invention discloses semiconductor devices that can be manufactured utilizing standard process of manufacturing and that can hold information. In accordance with a presently preferred...
US20080315306 Semiconductor Device and Method of Fabricating the Semiconductor Device  
A semiconductor device comprises a gate electrode on a semiconductor substrate, drift regions at opposite sides of the gate electrode, source and drain regions in the respective drift regions, and...
US20080311718 MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE  
The present invention is to possible to avoid an inconvenience at a coupling portion between a barrier metal film obtained by depositing a titanium nitride film on a titanium film and thus having a...
US20080308879 MOS STRUCTURES WITH CONTACT PROJECTIONS FOR LOWER CONTACT RESISTANCE AND METHODS FOR FABRICATING THE SAME  
MOS structures with contact projections for lower contact resistance and methods for fabricating such MOS structures have been provided. In an embodiment, a method comprises providing a...
US20080303968 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME  
In an LCD driver, in a high voltage resistant MISFET, end portions of a gate electrode run onto electric field relaxing insulation regions. Wires to become source wires or drain wires are formed on...
US20080296678 METHOD FOR FABRICATING HIGH VOLTAGE DRIFT IN SEMICONDUCTOR DEVICE  
A drift of a high voltage transistor formed using an STI (shallow trench isolation). The method for forming a high voltage drift of a semiconductor device can include forming a pad insulating film...
US20080283915 HIGH VOLTAGE SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME  
The present invention provides a high voltage semiconductor device and a method of manufacturing the same. The high voltage semiconductor device includes: a semiconductor substrate; a first high...
US20080285357 1-TRANSISTOR TYPE DRAM CELL, DRAM DEVICE AND DRAM COMPRISING THEREOF AND DRIVING METHOD THEREOF AND MANUFACTURING METHOD THEREOF  
The present invention relates to a semiconductor device, and more precisely to an 1-transistor type DRAM cell implemented using bulk silicon, a DRAM device and a DRAM comprising thereof and a...
US20080283935 TRENCH ISOLATION STRUCTURE AND METHOD OF MANUFACTURE THEREFOR  
The disclosure provides a trench isolation structure, a semiconductor device, and a method for manufacturing a semiconductor device. The semiconductor device, in one embodiment, includes a...
US20080277740 SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD  
In the present invention, there is provided a semiconductor device including: element isolation regions formed in a state of being buried in a semiconductor substrate such that an element formation...
US20080268599 STRUCTURE AND METHOD FOR A TRIPLE-GATE TRANSISTOR WITH REVERSE STI  
Exemplary embodiments provide triple-gate semiconductor devices isolated by reverse STI structures and methodologies for their manufacture. In an exemplary process, stacked layers including a form...
US20080258237 SEMICONDUCTOR DEVICE HAVING MULTI-CHANNEL AND METHOD OF FABRICATING THE SAME  
An embodiment of the present invention relates to a semiconductor device having a multi-channel and a method of fabricating the same. In an aspect, the semiconductor device includes a semiconductor...
US20080258239 METHODS FOR MANUFACTURING A TRENCH TYPE SEMICONDUCTOR DEVICE HAVING A THERMALLY SENSITIVE REFILL MATERIAL  
Methods for manufacturing trench type semiconductor devices involve refilling the trenches after high temperature processing steps are performed. The methods allow thermally unstable materials to...
US20080233700 Methods of forming integrated circuitry  
The invention includes semiconductor processing methods in which openings are formed to extend into a semiconductor substrate, and the substrate is then annealed around the openings to form...
US20080217705 TRENCH FORMATION IN A SEMICONDUCTOR MATERIAL  
A semiconductor device is formed on a semiconductor layer. A gate dielectric layer is formed over the semiconductor layer. A layer of gate material is formed over the gate dielectric layer. The...
US20080217703 HIGHLY SELECTIVE LINERS FOR SEMICONDUCTOR FABRICATION  
A method for manufacturing an isolation structure is disclosed that protects the isolation structure during etching of a dichlorosilane (DCS) nitride layer. The method involves the formation of a...
US20080220582 Semiconductor device and method of fabricating the same  
According to the present invention, there is provided a semiconductor device fabrication method, comprising: depositing a mask material on a semiconductor substrate; patterning the mask...
US20080217685 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME  
A semiconductor device includes an isolation layer for dividing a silicon substrate into an active region and an inactive region, a gate electrode formed over the silicon substrate, a gate oxide...
US20080194070 Metal-oxide-semiconductor transistor device, manufacturing method thereof, and method of improving drain current thereof  
A method of manufacturing a metal-oxide-semiconductor transistor device is disclosed, in which, an insulation region is formed to define the insulation region and an active region, wherein the...
US20080169518 SEMICONDUCTOR STRUCTURE WITH FIELD SHIELD AND METHOD OF FORMING THE STRUCTURE.  
Disclosed is semiconductor structure that incorporates a field shield below a semiconductor device (e.g., a field effect transistor (FET) or a diode). The field shield is sandwiched between upper...
US20080171414 Method of fabricating semiconductor devices having a gate silicide  
A method of fabricating a semiconductor device according to an example embodiment may include forming an isolation layer defining an active region in a semiconductor substrate, forming a silicon...
US20080150037 Selective STI Stress Relaxation Through Ion Implantation  
A first example embodiment comprises the following steps and the structure formed therefrom. A trench having opposing sidewalls is formed within a substrate. A stress layer having an inherent...
US20080150038 Method of fabricating semiconductor device  
Semiconductor devices may be fabricated according to a method that includes steps of forming isolation layers in and a gate electrode on a semiconductor substrate and forming sidewall spacers on...
US20080145989 SEMICONDUCTOR DEVICE HAVING PARTIALLY INSULATED FIELD EFFECT TRANSISTOR (PiFET) AND METHOD OF FABRICATING THE SAME  
Embodiments of the invention include a partially insulated field effect transistor and a method of fabricating the same. According to some embodiments, a semiconductor substrate is formed by...
US20080128819 LATERAL MOS TRANSISTOR AND METHOD FOR MANUFACTURING THEREOF  
A lateral MOS transistor that can include a first device isolating layer formed in a semiconductor substrate; a second device isolating layer formed in the semiconductor substrate, the second...
Matches 1 - 50 out of 68 1 2 >