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US20150295057 SEMICONDUCTOR DEVICE AND METHOD FOR PRODUCING SEMICONDUCTOR DEVICE  
An SGT is produced by forming a first insulating film around a fin-shaped semiconductor layer, forming a pillar-shaped semiconductor layer in an upper portion of the fin-shaped layer, forming a...
US20150287822 SEMICONDUCTOR DEVICE PRODUCTION METHOD AND SEMICONDUCTOR DEVICE  
A semiconductor device production method includes a first step of forming a planar silicon layer on a silicon substrate and forming first and second pillar-shaped silicon layers on the planar...
US20150287821 SEMICONDUCTOR DEVICE WITH AN SGT AND METHOD FOR MANUFACTURING THE SAME  
A semiconductor device includes a P+ region and an N+ region functioning as sources of SGTs and disposed in top portions of Si pillars formed on an i-layer substrate. Connections between a power...
US20150287817 SILICON CARBIDE SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME  
A first portion of a silicon carbide substrate having an impurity of a first conductivity type is disposed deeper than a first depth position. A second portion is disposed to extend from the first...
US20150279988 INTEGRATED VACUUM MICROELECTRONIC STRUCTURE AND MANUFACTURING METHOD THEREOF  
An integrated vacuum microelectronic structure is described as having a highly doped semiconductor substrate, a first insulating layer placed above said doped semiconductor substrate, a first...
US20150279856 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME  
A semiconductor device includes interlayer dielectrics stacked and spaced apart from each other, a channel layer passing through the interlayer dielectrics, line pattern regions each surrounding a...
US20150270281 SEMICONDUCTOR MEMORY DEVICE AND METHOD OF FABRICATING THE SAME  
A semiconductor memory device includes insulating patterns and conductive patterns stacked alternately with each other, penetrating structures passing through the insulating patterns and the...
US20150270280 STACKED THIN CHANNELS FOR BOOST AND LEAKAGE IMPROVEMENT  
A hollow-channel memory device comprises a source layer, a first hollow-channel pillar structure formed on the source layer, and a second hollow-channel pillar structure formed on the first...
US20150263126 SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME  
According to one embodiment, a plurality of electrode films, a semiconductor pillar, a tunnel insulating film, a charge storage film, and a block insulating film. The plurality of electrode films...
US20150263038 VERTICAL-TYPE SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THE SAME  
In a vertical-type memory device and a method of manufacturing the vertical-type memory device, the vertical memory device includes an insulation layer pattern of a linear shape provided on a...
US20150263035 METHOD FOR MANUFACTURING SEMICONDUCTOR MEMORY DEVICE  
According to one embodiment, a method for manufacturing a semiconductor memory device processing the first sidewall films into a plurality of island shape patterns. The method includes processing...
US20150263034 SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD OF THE SAME  
According to one embodiment, a semiconductor memory device includes a stacked body having a plurality of electrode layers containing boron and silicon, and a plurality of insulating layers each...
US20150263032 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING SAME  
According to an embodiment, a nonvolatile semiconductor memory device includes: semiconductor regions; control gate electrodes provided on the semiconductor regions, the control gate electrodes; a...
US20150263025 SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING SAME  
A semiconductor memory device according to one embodiment includes a substrate, a first stacked body provided on the substrate, a second stacked body provided on the first stacked body, a first...
US20150243765 SEMICONDUCTOR STRUCTURES WITH PAIR(S) OF VERTICAL FIELD EFFECT TRANSISTORS, EACH PAIR HAVING A SHARED SOURCE/DRAIN REGION AND METHODS OF FORMING THE STRUCTURES  
Disclosed are semiconductor structures and methods of forming the structures. The structures each comprise a pair of vertical FETs. Specifically, a U-shaped semiconductor body has a horizontal...
US20150243707 TUNNELING TRANSISTOR HAVING A VERTICAL CHANNEL, VARIABLE RESISTIVE MEMORY DEVICE INCLUDING THE SAME, AND METHOD FOR MANUFACTURING THE SAME  
A tunneling transistor including a semiconductor substrate on which a source is formed in an upper region and having a first semiconductor material layer, a pillar formed on the semiconductor...
US20150243672 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME  
The semiconductor device includes a stacked structure having alternately stacked conductive patterns and interlayer insulating patterns, a through-hole passing through the stacked structure, a...
US20150236126 SEMICONDUCTOR DEVICE HAVING VERTICAL CHANNEL, RESISTIVE MEMORY DEVICE INCLUDING THE SAME, AND METHOD OF MANUFACTURING THE SAME  
A semiconductor device, a resistive memory device including the same, and a method of manufacturing the same are provided. The semiconductor device includes a pillar extending substantially...
US20150236092 SEMICONDUCTOR STRUCTURES AND METHODS FOR MULTI-LEVEL WORK FUNCTION AND MULTI-VALUED CHANNEL DOPING OF NANOWIRE TRANSISTORS TO IMPROVE DRIVE CURRENT  
A semiconductor device with multi-level work function and multi-valued channel doping is provided. The semiconductor device comprises a nanowire structure and a gate region. The nanowire structure...
US20150236038 MULTILEVEL MEMORY STACK STRUCTURE AND METHODS OF MANUFACTURING THE SAME  
A first stack of alternating layers including first electrically conductive layers and first electrically insulating layers is formed with first stepped surfaces and a first dielectric material...
US20150236036 SEMICONDUCTOR DEVICE AND METHODS OF MANUFACTURING AND OPERATING THE SAME  
A semiconductor device includes a memory cell array including a vertical channel layer, two or more selection transistors, and a plurality of memory cells formed along the vertical channel; a...
US20150228784 SUPERJUNCTION SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREFOR  
A semiconductor device that includes the following is manufactured: an n− base layer; a p-type base layer formed on the surface of the n− base layer; an n+ source layer formed in the inner area of...
US20150228775 SEMICONDUCTOR STRUCTURES AND METHODS FOR MULTI-DIMENSION OF NANOWIRE DIAMETER TO IMPROVE DRIVE CURRENT  
A semiconductor device having a channel formed from a nanowire with a multi-dimensional diameter is provided. The semiconductor device comprises a drain region formed on a semiconductor substrate....
US20150221767 SEMICONDUCTOR STRUCTURES WITH PAIR(S) OF VERTICAL FIELD EFFECT TRANSISTORS, EACH PAIR HAVING A SHARED SOURCE/DRAIN REGION AND METHODS OF FORMING THE STRUCTURES  
Disclosed are semiconductor structures and methods of forming the structures. The structures each comprise a pair of vertical FETs. Specifically, a U-shaped semiconductor body has a horizontal...
US20150221750 METHOD FOR PRODUCING SGT-INCLUDING SEMICONDUCTOR DEVICE  
Isotropic etching is conducted by using SiN layers that are disposed on i-layers having an island structure on an i-layer substrate and have the same rectangular shape in a plan view as the...
US20150221667 SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME  
A semiconductor memory device according to one embodiment includes a connecting member including a semiconductor material, a first electrode film, a first insulating film, a stacked body and three...
US20150214335 VERTICAL DMOS TRANSISTOR  
A transistor includes a semiconductor body; a body region of a first conductivity type formed in the semiconductor body; a gate electrode formed partially overlapping the body region and insulated...
US20150214301 METHOD OF MAKING A WIRE-BASED SEMICONDUCTOR DEVICE  
In some embodiments, a method for manufacturing forms a semiconductor device, such as a transistor. A dielectric stack is formed on a semiconductor substrate. The stack comprises a plurality of...
US20150206958 TUNNEL FIELD-EFFECT TRANSISTOR  
A tunnel field-effect transistor (TFET) device is provided comprising a semiconductor substrate and a fin structure disposed thereon. The fin structure comprises a channel region and a source...
US20150206886 Methods of Forming Memory Arrays and Semiconductor Constructions  
Some embodiments include methods of forming semiconductor constructions. A heavily-doped region is formed within a first semiconductor material, and a second semiconductor material is epitaxially...
US20150200199 SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING SAME  
According to one embodiment, a semiconductor memory device includes a substrate, a semiconductor pillar provided on the substrate to extend in a vertical direction, a plurality of first electrode...
US20150194436 SEMICONDUCTOR INTEGRATED CIRCUIT AND METHOD OF PRODUCING THE SAME  
Provided is a semiconductor integrated circuit that uses a novel vertical MOS transistor that is free of interference between cells, that enables the short-channel effect to be minimized, that...
US20150187936 QUASI-VERTICAL STRUCTURE HAVING A SIDEWALL IMPLANTATION FOR HIGH VOLTAGE MOS DEVICE  
A semiconductor device includes a buried layer in a substrate, the buried layer having a first dopant type. The semiconductor device further includes a first layer over the buried layer, the first...
US20150187912 INTEGRATED ELECTRONIC DEVICE WITH EDGE-TERMINATION STRUCTURE AND MANUFACTURING METHOD THEREOF  
An embodiment of an integrated electronic device formed in a semiconductor body delimited by a lateral surface, which includes: a substrate made of a first semiconductor material; a first...
US20150187791 METHODS OF FABRICATING THREE-DIMENSIONAL SEMICONDUCTOR DEVICES  
A three-dimensional semiconductor device includes an upper structure on a lower structure, the upper structure including conductive patterns, a semiconductor pattern connected to the lower...
US20150187788 3D MEMORY STRUCTURE AND MANUFACTURING METHOD OF THE SAME  
A 3D memory structure and a manufacturing method of the same are provided. The 3D memory structure includes a substrate, a plurality of stacked structures, a plurality of charge trapping layers, a...
US20150179770 METHOD FOR FABRICATING SEMICONDUCTOR DEVICE WITH LOOP-SHAPED FIN  
A fabrication method of a semiconductor device includes the following steps. First, sacrificial patterns are formed on a substrate and a space is formed on the sidewalls of each sacrificial...
US20150179661 VERTICAL CHANNEL-TYPE 3D SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME  
A vertical channel-type 3D semiconductor memory device and a method for manufacturing the same are disclosed. In one aspect, the device includes a multi-layer film formed by depositing alternating...
US20150179659 MULTILEVEL CONTACT TO A 3D MEMORY ARRAY AND METHOD OF MAKING THEREOF  
A multi-level device includes at least one device region and at least one contact region. The contact region has a stack of alternating plurality of electrically conductive layers and plurality of...
US20150171174 Vertical Transistor Device Structure with Cylindrically-Shaped Regions  
A vertical power transistor device includes a semiconductor layer of a first conductivity type, with a plurality of cylindrically-shaped dielectric regions disposed in the semiconductor layer. The...
US20150171099 ULTRAHIGH DENSITY VERTICAL NAND MEMORY DEVICE AND METHOD OF MAKING THEREOF  
Monolithic, three dimensional NAND strings include a semiconductor channel, at least one end portion of the semiconductor channel extending substantially perpendicular to a major surface of a...
US20150162345 SEMICONDUCTOR MEMORY DEVICE INCLUDING A SLIT  
A semiconductor device includes a first conductive layer, at least one first slit through the first conductive layer, and configured to divide the first conductive layer in the unit of a memory...
US20150162344 METHODS OF FABRICATING THREE-DIMENSIONAL SEMICONDUCTOR DEVICES  
Three dimensional semiconductor memory devices and methods of fabricating the same are provided. According to the method, sacrificial layers and insulating layers are alternately and repeatedly...
US20150155298 THREE-DIMENSIONAL DEVICES HAVING REDUCED CONTACT LENGTH  
Various embodiments comprise apparatuses and methods including a memory array having alternating levels of semiconductor materials and dielectric material with strings of memory cells formed on...
US20150155286 Structure and Method For Statice Random Access Memory Device of Vertical Tunneling Field Effect Transistor  
Forming an SRAM cell that includes first and second inverters cross-coupled for data storage, each inverter including at least one pull-up device and at least one pull-down devices; and at least...
US20150147856 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE  
A method of manufacturing a semiconductor device includes forming a trench in a semiconductor body. The method further includes doping a part of the semiconductor body via sidewalls of the trench...
US20150145021 VERTICAL MEMORY DEVICES AND METHODS OF MANUFACTURING THE SAME  
Nonvolatile memory devices include at least four cylindrical-shaped channel regions, which extend vertically from portions of a substrate located at respective vertices of at least one rhomboid...
US20150140755 METHOD FOR PRODUCING A SEMICONDUCTOR DEVICE WITH SURROUNDING GATE TRANSISTOR  
A method for producing a semiconductor device includes a first step of forming a fin-shaped silicon layer on a silicon substrate using a first resist and forming a first insulating film...
US20150132906 THREE DIMENSIONAL SEMICONDUCTOR MEMORY DEVICES AND METHODS OF FABRICATING THE SAME  
A 3D semiconductor device includes an electrode structure has electrodes stacked on a substrate, semiconductor patterns penetrating the electrode structure, charge storing patterns interposed...
US20150129955 SEMICONDUCTOR DEVICES INCLUDING VERTICAL MEMORY CELLS AND METHODS OF FORMING SAME  
A semiconductor device may include a memory array including vertical memory cells connected to a digit line, word lines, and a body connection line. A row or column of the memory array may include...