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US20090283813 |
NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR FABRICATING NONVOLATILE SEMICONDUCTOR MEMORY DEVICE
According to an aspect of the present invention, there is provided a method for fabricating a nonvolatile semiconductor memory device including a memory cell being formed in a first region of a...
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US20090279361 |
Addressable Memory Array
This document discloses non-volatile memory cells and methods of manufacturing the same. The memory arrays are byte, word, and/or page addressable without using a byte select transistor. The byte...
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US20090278187 |
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE
A semiconductor device of an aspect of the present invention includes a semiconductor substrate, two diffusion layers provided in the semiconductor substrate, a gate insulating film provided on a...
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US20090273015 |
NON-VOLATILE MEMORY CELL
This document discloses non-volatile memory cells and methods of manufacturing the same. The non-volatile memory cells are self-aligned and have a reduced tunnel window area that is within an...
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US20090273013 |
METHOD OF FORMING A SPLIT GATE MEMORY DEVICE AND APPARATUS
A split-gate memory device has a select gate having a first work function overlying a first portion of a substrate. A control gate having a second work function overlies a second portion of the...
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US20090242960 |
SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD THEREOF
A semiconductor memory device includes a semiconductor substrate, a memory cell provided on the semiconductor substrate and having a stacked gate structure formed by sequentially stacking a tunnel...
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US20090242955 |
Integrated Circuit, Memory Device and Methods of Manufacturing the Same
An integrated circuit includes: a contact structure with a first stack of at least two conductive layers, and a gate electrode with a second stack of conductive layers, the second stack of layers...
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US20090239345 |
Methods of Fabricating Nonvolatile Semiconductor Memory Devices
A nonvolatile semiconductor memory device includes a plurality of pillars protruding upward from a semiconductor substrate and having respective top surfaces and opposing sidewalls, a bit line on...
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US20090233405 |
METHODS OF FORMING NAND-TYPE NONVOLATILE MEMORY DEVICES
Methods of forming a NAND-type nonvolatile memory device include: forming first common drains and first common sources alternatively in an active region which is defined in a semiconductor...
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US20090231915 |
Reading array cell with matched reference cell
A method for reading a bit of a memory cell in a non-volatile memory (NVM) cell array, the method comprising providing a memory cell comprising a bit to be read and at least one other bit not to be...
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US20090230459 |
NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME
A non-volatile semiconductor memory device includes a memory string which is electrically rewritable and includes a plurality of memory cells connected in series. The memory string includes a...
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US20090230454 |
MEMORY ARRAY WITH A PAIR OF MEMORY-CELL STRINGS TO A SINGLE CONDUCTIVE PILLAR
Memory arrays and methods of forming memory arrays are disclosed. One such memory array has a first string of serially-coupled first memory cells and a second string of serially-coupled second...
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US20090227080 |
Method of Fabricating Semiconductor Device
A method of fabricating a semiconductor device, in which although a metal layer is included in a gate pattern, the gap-fill characteristic of contact plugs coupled to junctions can be improved and...
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US20090218614 |
SEMICONDUCTOR STORAGE DEVICE AND METHOD FOR MANUFACTURING THE SAME
A semiconductor storage device has a plurality of word lines formed with a predetermined interval on a semiconductor substrate, a selection transistor provided at an end portion of the plurality of...
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US20090212348 |
MIRROR BIT MEMORY DEVICE APPLYING A GATE VOLTAGE ALTERNATELY TO GATE
A semiconductor device and a method for manufacturing thereof are provided. The semiconductor device includes: an ONO film including a charge storage layer on a semiconductor substrate; a plurality...
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US20090207662 |
Multi-Transistor Non-Volatile Memory Element
The present disclosure provides a multi-transistor element including a substrate, a first floating gate disposed on the substrate, a second floating gate disposed on the substrate and coupled to...
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US20090206391 |
SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME
A semiconductor memory device has a semiconductor substrate, a plurality of word lines formed on the semiconductor substrate at predetermined intervals, a selecting transistor arranged on each of...
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US20090186459 |
MANUFACTURING METHOD OF NON-VOLATILE MEMORY
A method of manufacturing a non-volatile memory is provided. A substrate is provided and then a number of stacked gate structures are formed on the substrate. Each of the stacked gate structures...
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US20090184343 |
ISOLATION STRUCTURE, NON-VOLATILE MEMORY HAVING THE SAME, AND METHOD OF FABRICATING THE SAME
A method of forming an isolation structure, comprising: (a) providing a base having a recess; (b) forming a stop layer on the base and in the recess; (c) forming a dielectric material on the stop...
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US20090179253 |
Oxide-nitride-oxide stack having multiple oxynitride layers
A semiconductor device including an oxide-nitride-oxide (ONO) structure having a multi-layer charge storing layer and methods of forming the same are provided. Generally, the method involves: (i)...
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US20090179250 |
Memory Device
In an embodiment, a memory device, including: a semiconductor fin structure, each end portion of the fin structure including a source/drain region; a charge storage layer covering at least a...
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US20090173984 |
INTEGRATED CIRCUIT AND METHOD OF MANUFACTURING AN INTEGRATED CIRCUIT
The present invention provides an integrated circuit with a floating body transistor comprising two source/drain regions and a floating body region arranged between the two source/drain regions...
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US20090168529 |
NONVOLATILE SEMICONDUCTOR MEMORY DEVICE, METHOD FOR MANUFACTURING THE SAME, AND NONVOLATILE MEMORY ARRAY
A floating gate made of polysilicon is provided on a semiconductor substrate through the medium of a gate insulator. A side-wall insulating film is provided on each side wall of the floating gate....
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US20090166705 |
NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THEREOF
In a nonvolatile semiconductor memory device, second conductivity type source and drain regions are formed separately from each other in a first conductivity type semiconductor region on a surface...
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US20090161524 |
READING/WRITING HEAD USING ELECTRIC FIELD, DATA READING/WRITING APPARATUS INCLUDING THE SAME, AND METHOD OF MANUFACTURING THE SAME
A data reading/writing head reading/writing data from/to a ferroelectric recording medium by using an electric field effect, includes a semiconductor body having a first plane on which an air...
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US20090154240 |
NAND FLASH MEMORY DEVICES HAVING WIRING WITH INTEGRALLY-FORMED CONTACT PADS AND DUMMY LINES AND METHODS OF MANUFACTURING THE SAME
A NAND flash memory device includes a plurality of continuous conductors disposed on a common level of a multilayer substrate, the plurality of continuous conductors including respective conductive...
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US20090152645 |
METHODS FOR ISOLATING PORTIONS OF A LOOP OF PITCH-MULTIPLIED MATERIAL AND RELATED STRUCTURES
Different portions of a continuous loop of semiconductor material are electrically isolated from one another. In some embodiments, the end of the loop is electrically isolated from mid-portions of...
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US20090147588 |
MEMORY DEVICES HAVING REDUCED WORD LINE CURRENT AND METHOD OF OPERATING AND MANUFACTURING THE SAME
There is provided a memory array and methods for manufacturing the same. In one embodiment, there is provided a string comprising a plurality of transistors. Each of the plurality of transistors...
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US20090147576 |
FLOATING GATE WITH UNIVERSAL ETCH STOP LAYER
Floating gates of a floating gate memory array have an inverted-T shape in both the bit line direction and the word line direction. Floating gates are formed using an etch stop layer that separates...
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US20090146201 |
WORK FUNCTION ENGINEERING FOR FN ERAS OF A MEMORY DEVICE WITH MULTIPLE CHARGE STORAGE ELEMENTS IN AN UNDERCUT REGION
A memory device comprised of a plurality of memory cells that can each include multiple charge storage elements in undercut regions that are formed under a tunneling barrier and adjacent to a gate...
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US20090134449 |
NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME
Provided is a nonvolatile semiconductor memory device highly integrated and highly reliable. A plurality of memory cells are formed in a plurality of active regions sectioned by a plurality of...
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US20090134444 |
Memory Cells, And Methods Of Forming Memory Cells
Some embodiments include methods of forming memory cells. Dopant is implanted into a semiconductor substrate to form a pair of source/drain regions that are spaced from one another by a channel...
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US20090130809 |
SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME
A semiconductor memory device includes first and second element isolation insulating films, first and second gate insulating films, first and second gate wiring and first and second mask layer....
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US20090130808 |
METHOD OF FABRICATING FLASH MEMORY
A method of fabricating a flash memory includes successively forming a floating gate insulating layer, a floating gate material layer, a dielectric layer, a control gate material layer, a silicide...
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US20090129162 |
Method of making a non-volatile memory (NVM) cell structure and program biasing techniques for the NVM cell structure
A method of making a non-volatile memory (NVM) cell structure comprises the formation of a first NVM cell, a second NVM cell and an SRAM cell that includes first and second data nodes. A first pass...
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US20090127613 |
NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME
A nonvolatile semiconductor memory device comprises a memory cell array of plural memory cells arranged in matrix. Each memory cell includes a first gate insulator layer formed on a semiconductor...
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US20090127610 |
NON-VOLATILE MEMORY AND THE MANUFACTURING METHOD THEREOF
A non-volatile memory disposed on a substrate includes active regions, a memory array, and contacts. The active regions defined by isolation structures disposed in the substrate are extended in a...
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US20090124054 |
METHOD OF MAKING INTEGRATED CIRCUIT EMBEDDED WITH NON-VOLATILE PROGRAMMABLE MEMORY HAVING VARIABLE COUPLING
A programmable non-volatile device is made with a floating gate that functions as a FET gate that overlaps a portion of a source/drain region and allows for variable coupling through geometry...
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US20090117696 |
Fully logic process compatible non-volatile memory cell with a high coupling ratio and process of making the same
A fully logic process compatible non-volatile memory cell has a well on a substrate, a pair of source and drain outside the well, a channel between the source and drain, a control gate in the well,...
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US20090109752 |
MEMORY CELL HEIGHTS
Embodiments of the present disclosure provide methods, arrays, devices, modules, and systems for memory cell heights. One array of memory cells includes a number of semiconductor pillars having a...
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US20090108324 |
SEMICONDUCTOR FIN BASED NONVOLATILE MEMORY DEVICE AND METHOD FOR FABRICATION THEREOF
A semiconductor structure and a method for fabricating the semiconductor structure include a semiconductor fin having a first side and a second side opposite the first side. A first gate dielectric...
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US20090101959 |
NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME
According to an aspect of the present invention, there is provided a nonvolatile semiconductor memory device including: a semiconductor substrate; memory cell transistors that are series-connected;...
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US20090097310 |
MEMORY CELL STORAGE NODE LENGTH
Methods, devices, and systems for a memory cell are provided. One embodiment includes a memory cell with a storage node separated from a body region by a first dielectric, wherein the body region...
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US20090096015 |
Nonvolatile semiconductor memory device and manufacturing method therefor
In a nonvolatile semiconductor memory device, a floating gate is formed on a semiconductor substrate through a gate insulating film, and has a first portion contacting the gate insulating film and...
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US20090096006 |
NONVOLATILE SEMICONDUCTOR STORAGE APPARATUS AND METHOD FOR MANUFACTURING THE SAME
According to an aspect of the present invention, there is provided a nonvolatile semiconductor storage apparatus including: a semiconductor substrate on which element isolation trenches are formed...
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US20090090955 |
ELEVATED CHANNEL FLASH DEVICE AND MANUFACTURING METHOD THEREOF
A FLASH device including a substrate having a protrusive portion integrally formed thereon, two floating gates, a control gate and a dielectric layer is provided. The two floating gates are...
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US20090080245 |
OFFSET NON-VOLATILE STORAGE
A plurality of non-volatile storage elements on a common active layer are offset from neighbor non-volatile storage elements. This offsetting of non-volatile storage elements helps reduce...
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US20090061581 |
METHOD FOR MANUFACTURING TRENCH ISOLATION STRUCTURE AND NON-VOLATILE MEMORY
A method for manufacturing a non-volatile memory is provided. An isolation structure is formed in a trench formed in a substrate. A portion of the isolation structure is removed to form a recess. A...
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US20090053866 |
NONVOLATILE SEMICONDUCTOR MEMORY DEVICE, METHOD FOR DRIVING THE SAME, AND METHOD FOR FABRICATING THE SAME
A p-type source region 2 and a p-type drain region 3 are formed on the surface of an n-type semiconductor layer 1 . In the position located above a channel region interposed between the p-type...
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US20090050955 |
NONVOLATILE SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
A charge storage layer interposed between a memory gate electrode and a semiconductor substrate is formed shorter than a gate length of the memory gate electrode or a length of insulating films so...
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