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US20120139083 POWER DISTRIBUTION NETWORK  
In one embodiment, an integrated circuit (IC) is presented. The IC includes first and second sets of power distribution lines formed in the IC. The IC includes first and second capacitors formed in...
US20110198677 SYSTEMS AND METHODS FOR A CONTINUOUS-WELL DECOUPLING CAPACITOR  
A decoupling capacitor includes a pair of MOS capacitors formed in wells of opposite plurality. Each MOS capacitor has a set of well-ties and a high-dose implant, allowing high frequency...
US20130001664 DECOUPLING CAPACITOR CIRCUITRY  
Integrated circuits with decoupling capacitor circuitry are provided. The decoupling capacitor circuitry may include density-compliance structures. The density-compliance structures may be strapped...
US20060270145 CAPACITIVE ARRAY  
A capacitive array comprising at least two capacitive entities, comprising a substrate layer. The substrate layer comprises a comb comprising at least four substantially identical teeth, and, for...
US20120098045 Zero Temperature Coefficient Capacitor  
A zero temperature coefficient (ZTC) capacitor including a silicon dioxide dielectric layer with a phosphorus density between 1.7×1020 atoms/cm3 and 2.3×1020 atoms/cm3. An integrated circuit c...
US20090085082 CONTROLLED INTERMIXING OF HFO2 AND ZRO2 DIELECTRICS ENABLING HIGHER DIELECTRIC CONSTANT AND REDUCED GATE LEAKAGE  
Controlled deposition of HfO2 and ZrO2 dielectrics is generally described. In one example, a microelectronic apparatus includes a substrate and a dielectric film coupled with the substrate, the...
US20110217819 DRAM LAYOUT WITH VERTICAL FETS AND METHOD OF FORMATION  
DRAM cell arrays having a cell area of less than about 4F2 comprise an array of vertical transistors with buried bit lines and vertical double gate electrodes. The buried bit lines comprise a...
US20130130450 LOW LEAKAGE CAPACITOR FOR ANALOG FLOATING-GATE INTEGRATED CIRCUITS  
An analog floating-gate electrode in an integrated circuit, and method of fabricating the same, in which trapped charge can be stored for long durations. The analog floating-gate electrode is...
US20120241829 Low Leakage Capacitor for Analog Floating-Gate Integrated Circuits  
An analog floating-gate electrode in an integrated circuit, and method of fabricating the same, in which trapped charge can be stored for long durations. The analog floating-gate electrode is...
US20140246715 DECOUPLING CAPACITOR FOR INTEGRATED CIRCUIT  
An integrated circuit includes a capacitor having first, second and third nodes. The first and second nodes of the first transistor are connected together and the first and second nodes of the...
US20120292678 BI-DIRECTIONAL SELF-ALIGNED FET CAPACITOR  
A method of forming a field effect transistor (FET) capacitor includes forming a channel region; forming a gate stack over the channel region; forming a first extension region on a first side of...
US20110108900 BI-DIRECTIONAL SELF-ALIGNED FET CAPACITOR  
A method of forming a field effect transistor (FET) capacitor includes forming a channel region; forming a gate stack over the channel region; forming a first extension region on a first side of...
US20130237023 Methods Of Forming A Vertical Transistor And At Least A Conductive Line Electrically Coupled Therewith  
Trenches are formed into semiconductive material. Masking material is formed laterally over at least elevationally inner sidewall portions of the trenches. Conductivity modifying impurity is...
US20080283841 TFT SUBSTRATE AND MANUFACTURING METHOD, AND DISPLAY DEVICE WITH THE SAME  
In forming a TFT and a storage capacitance element, whereas sharing with each other the conductive film and the insulation film, which are components of the TFT and the storage capacitance element,...
US20120244671 Unitary Floating-Gate Electrode with Both N-Type and P-Type Gates  
An analog floating-gate electrode in an integrated circuit, and method of fabricating the same, in which trapped charge can be stored for long durations. The analog floating-gate electrode is...
US20130264713 METHODS OF FORMING CONDUCTIVE STRUCTURES AND METHODS OF FORMING DRAM CELLS  
Some embodiments include methods of forming conductive structures. An electrically conductive material may be deposited with a first deposition method. The first deposition method has a first...
US20120043595 CAPACITOR DEVICE AND METHOD OF FABRICATING THE SAME  
A capacitor device includes a substrate including a first well having a first conductivity type and a first voltage applied thereto and a second well having a second conductivity type and a second...
US20110230023 DRAM CELL WITH ENHANCED CAPACITOR AREA AND THE METHOD OF MANUFACTURING THE SAME  
A dynamic random access memory (DRAM) cell and the method of manufacturing the same are provided. The DRAM cell includes a cell transistor and a cell capacitor. The cell capacitor includes a first,...
US20060199328 Non-dispersive high density polysilicon capacitor utilizing amorphous silicon electrodes  
The present invention provides, in one aspect, a method of fabricating a capacitor 615, comprising forming a first electrode 610, placing a dielectric 515 over the first electrode, and locating a...
US20090321804 SEMICONDUCTOR COMPONENT INCLUDING A DRIFT ZONE AND A DRIFT CONTROL ZONE  
A semiconductor component including a drift zone and a drift control zone. One embodiment provides a transistor component having a drift zone, a body zone, a source zone and a drain zone. The drift...
US20090108313 REDUCING SHORT CHANNEL EFFECTS IN TRANSISTORS  
Microelectronic structures and associated methods for reducing short channel effects in transistors are generally described. In one example, an apparatus includes a semiconductor channel, one or...
US20130193499 DECOUPLING CAPACITOR AND LAYOUT FOR THE CAPACITOR  
A device comprises a semiconductor substrate having first and second implant regions of a first dopant type. A gate insulating layer and a gate electrode are provided above a resistor region...
US20110210384 Scalable integrated MIM capacitor using gate metal  
According to one embodiment, a scalable integrated MIM capacitor in a semiconductor die includes a high-k dielectric segment over a substrate and a metal segment over the high-k dielectric segment,...
US20060197183 IMPROVED MIM CAPACITOR STRUCTURE AND PROCESS  
An improved MIM capacitor structure and method where a selective plating process is used to form the capping layer on the copper capacitor electrodes. The metallic passivation layers prevent copper...
US20070042542 Method for fabricating an interconnect arrangement with increased capacitive coupling and associated interconnect arrangement  
A method for fabricating an interconnect arrangement with increased capacitive coupling is described. A trench structure is formed in a first dielectric having a capacitor region with a first...
US20070125575 Dielectric lamination structure, manufacturing method of a dielectric lamination structure, and wiring board including a dielectric lamination structure  
A dielectric structure comprising: a metal foil; a dielectric layer; and a conductor layer provided in this order, wherein the metal foil has a thickness of from 10 to 40 μm, the dielectric layer ...
US20080237672 High density memory  
In one embodiment of the invention, a method of forming a semiconductor device includes forming a dynamic random access memory using spacer-defined lithography.
US20100096680 OC DRAM CELL WITH INCREASED SENSE MARGIN  
A memory device and method of making the memory device. The memory device comprises a storage transistor at a surface of a substrate. The storage transistor comprises a body portion between first...
US20120280297 DRAM WITH DOPANT STOP LAYER AND METHOD OF FABRICATING THE SAME  
A DRAM with dopant stop layer includes a substrate, a trench-type transistor and a capacitor electrically connected to the trench-type transistor. The trench-type transistor includes a gate...
US20100090283 Electro Static Discharge Protection Device  
A semiconductor device for protecting against an electro static discharge is disclosed. In one embodiment, the semiconductor device includes a first low doped region disposed in a substrate, a...
US20100025748 SEMICONDUCTOR DEVICE WITH A DYNAMIC GATE-DRAIN CAPACITANCE  
A semiconductor device with a dynamic gate drain capacitance. One embodiment provides a semiconductor device. The device includes a semiconductor substrate, a field effect transistor structure...
US20080042171 Transistor arrangement, sense-amplifier arrangement and methods of manufacturing the same via a phase shift mask  
Methods of forming transistor arrangements using alternating phase shift masks are provided. The mask may include two parallel opaque lines, a first transparent section separating the opaque lines...
US20140308787 MONOLITHICALLY INTEGRATED ACTIVE SNUBBER  
A semiconductor device containing an extended drain MOS transistor with an integrated snubber formed by forming a drain drift region of the MOS transistor, forming a snubber capacitor including a...
US20130009225 MONOLITHICALLY INTEGRATED ACTIVE SNUBBER  
A semiconductor device containing an extended drain MOS transistor with an integrated snubber formed by forming a drain drift region of the MOS transistor, forming a snubber capacitor including a...
US20120302020 SOI Trench Dram Structure With Backside Strap  
In one exemplary embodiment, a semiconductor structure including: a SOI substrate having a top silicon layer overlying an insulation layer, the insulation layer overlies a bottom silicon layer; a...
US20090180238 ENERGY STORAGE DEVICES  
Double-layer energy storage devices and methods for manufacturing thereof are disclosed. Such devices and methods are useful for lessening self-discharge of the double-layer energy storage devices....
US20080197393 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICES INCLUDING GATE PATTERNS HAVING STEP DIFFERENCE THEREBETWEEN AND A CONNECTION LINE DISPOSED BETWEEN THE GATE PATTERNS AND METHODS OF FABRICATING THE SAME  
Provided are semiconductor integrated circuit (IC) devices including gate patterns having a step difference therebetween and a connection line interposed between the gate patterns. The...
US20080099811 SINGLE TRANSISTOR MEMORY DEVICE HAVING SOURCE AND DRAIN INSULATING REGIONS AND METHOD OF FABRICATING THE SAME  
A single transistor floating-body dynamic random access memory (DRAM) device includes a floating body located on a semiconductor substrate and a gate electrode located on the floating body, the...
US20050014330 Method of planarizing an interlayer dielectric layer  
A method of planarizing an interlayer dielectric layer formed over a one cylinder storage (OCS) capacitor including applying two or three interlayer dielectric layers over the capacitor and...
US20100078696 SEMICONDUCTOR MEMORY DEVICE WITH POWER DECOUPLING CAPACITORS AND METHOD OF FABRICATION  
Provided is a semiconductor memory device including a capacitor structure extending over core and peripheral areas of a substrate. Respective portions of the capacitor structure function as memory...
US20100117129 Scratch protection for direct contact sensors  
In capacitive sensor circuits where physical contact is required and excess pressure may be inadvertently applied to the sensor surface, aluminum is not sufficiently hard to provide “scratch” pro...
US20060267142 Capacitor device, semiconductor devioce, and setting method of terminal capacitance of pad electrode thereof  
A capacitor device comprising: a first wiring region disposed at a predetermined location in a wiring layer on a semiconductor substrate, a second wiring region disposed in a vicinity of the first...
US20140295631 ANALOG FLOATING-GATE CAPACITOR WITH IMPROVED DATA RETENTION IN A SILICIDED INTEGRATED CIRCUIT  
An analog floating-gate electrode in an integrated circuit, and method of fabricating the same, in which trapped charge can be stored for long durations. The analog floating-gate electrode is...
US20140001526 Analog Floating-Gate Capacitor with Improved Data Retention in a Silicided Integrated Circuit  
An analog floating-gate electrode in an integrated circuit, and method of fabricating the same, in which trapped charge can be stored for long durations. The analog floating-gate electrode is...
US20110148529 RADIO FREQUENCY AMPLIFIER WITH EFFECTIVE DECOUPLING  
A variety of circuits, methods and devices are implemented for radiofrequency amplifiers. According to one such implementation, a radiofrequency amplifier circuit is implemented in a SMD package....
US20070184609 MULTIVOLTAGE THIN FILM CAPACITOR  
An apparatus, and a method for forming, a split thin film capacitor for providing multiple power and reference supply voltage levels to electrical devices such as integrated circuits, may be useful...
US20060263974 Methods of electrically interconnecting different elevation conductive structures, methods of forming capacitors, methods of forming an interconnect between a substrate bit line contact and a bit line in DRAM, and methods of forming DRAM memory cell  
The invention includes methods of electrically interconnecting different elevation conductive structures, methods of forming capacitors, methods of forming an interconnect between a substrate bit...
US20110063025 High Breakdown Voltage Double-Gate Semiconductor Device  
A double-gate semiconductor device includes a MOS gate and a junction gate, in which the bias of the junction gate is a function of the gate voltage of the MOS gate. The breakdown voltage of the...
US20130092989 Embedded Transistor  
An embedded transistor for an electrical device, such as a DRAM memory cell, and a method of manufacture thereof is provided. A trench is formed in a substrate and a gate dielectric and a gate...
US20140042510 CAPACITORS POSITIONED AT THE DEVICE LEVEL IN AN INTEGRATED CIRCUIT PRODUCT AND METHODS OF MAKING SUCH CAPACITORS  
One illustrative integrated circuit product disclosed herein includes a metal-1 metallization layer positioned above a semiconducting substrate, a capacitor positioned between a surface of the...
Matches 1 - 50 out of 200 1 2 3 4 >