|
Match
|
Document |
Document Title |
|
|
US20100327335 |
METHOD OF BUILDING COMPENSATED ISOLATED P-WELL DEVICES
Electrical device structures constructed in an isolated p-well that is wholly contained within a core n-well. Methods of forming electrical devices within an isolated p-well that is wholly... |
|
|
US20050230763 |
Method of manufacturing a microelectronic device with electrode perturbing sill
A method of manufacturing a microelectronic device. The method includes providing a substrate and forming a patterned feature located over the substrate and a plurality of doped regions. The... |
|
|
US20070096215 |
TRANSISTOR WITH DIELECTRIC STRESSOR ELEMENTS
A chip is provided which includes an active semiconductor region and a field effect transistor (“FET”) having a channel region, a source region and a drain region all disposed within the active... |
|
|
US20050186722 |
Method and structure for CMOS device with stress relaxed by ion implantation of carbon or oxygen containing ions
Stress in a silicon nitride contact etch stop layer on a CMOS structure having NMOS and PMOS devices is selectively relieved by selective implantation of oxygen-containing or carbon-containing... |
|
|
US20100001342 |
METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE
A method for manufacturing a semiconductor device is disclosed. The method includes: forming a LDMOS region, an offset drain MOS region, and a CMOS region; simultaneously forming a first well in... |
|
|
US20110084324 |
RADIATION HARDENED MOS DEVICES AND METHODS OF FABRICATION
Radiation hardened NMOS devices suitable for application in NMOS, CMOS, or BiCMOS integrated circuits, and methods for fabricating them. A device includes a p-type silicon substrate, a field oxide... |
|
|
US20090302415 |
Micro-Electromechanical System Devices
Micro-electromechanical system (MEMS) devices and methods of manufacture thereof are disclosed. In one embodiment, a MEMS device includes a semiconductive layer disposed over a substrate. A trench... |
|
|
US20090011553 |
THERMALLY STABLE BiCMOS FABRICATION METHOD AND BIPOLAR JUNCTION TRANSISTOR FORMED ACCORDING TO THE METHOD
A method for forming BiCMOS integrated circuits and structures formed according to the method. After forming doped wells and gate stacks for the CMOS devices and collector and base regions for the... |
|
|
US20100022056 |
METHOD OF MANUFACTURING A BIPOLAR TRANSISTOR
The invention provides for an alternative and less complex method of manufacturing a bipolar transistor comprising a field plate (17) in a trench (7) adjacent to a collector region (21), which... |
|
|
US20140183655 |
HIGH PERFORMANCE ISOLATED VERTICAL BIPOLAR JUNCTION TRANSISTOR AND METHOD FOR FORMING IN A CMOS INTEGRATED CIRCUIT
A CMOS integrated circuit containing an isolated n-channel DEMOS transistor and an isolated vertical PNP transistor has deep n-type wells and surrounding shallow n-type wells providing isolation... |
|
|
US20070161173 |
Process to integrate fabrication of bipolar devices into a CMOS process flow
A BiCMOS method for forming bipolar junction transistors and CMOS devices in a substrate. To avoid erosion of the bipolar junction transistor material layers, gate spacers for the CMOS devices are... |
|
|
US20100273301 |
THERMALLY STABLE BICMOS FABRICATION METHOD AND BIPOLAR JUNCTION TRNASISTORS FORMED ACCORDING TO THE METHOD
A method for forming BiCMOS integrated circuits and structures formed according to the method. After forming doped wells and gate stacks for the CMOS devices and collector and base regions for the... |
|
|
US20060270138 |
Transistors having a recessed channel region and methods of fabricating the same
A transistor includes a substrate and a device isolation layer that is formed on the substrate to define an active region. A gate pattern crosses over the active region. A gate insulation layer is... |
|
|
US20100032768 |
TRANSISTOR OF IMAGE SENSOR AND METHOD FOR MANUFACTURING THE SAME
A transistor of an image sensor and a method for manufacturing the same include simultaneously forming a device isolation layer at a boundary between a first conductive transistor region having a... |
|
|
US20090159984 |
Semiconductor Device and Method for Manufacturing the Same
A semiconductor device and a method for manufacturing the same are provided. An n-well region can be formed on a semiconductor substrate, and a base contact region can be formed on the n-well... |
|
|
US20090230481 |
SEMICONDUCTOR DEVICE FORMED USING SINGLE POLYSILICON PROCESS AND METHOD OF FABRICATING THE SAME
Provided are a semiconductor device including a source/drain and a gate formed using a doped polysilicon process, and a method of fabricating the semiconductor device. The method comprises:... |
|
|
US20130175614 |
SEMICONDUCTOR DEVICES AND METHODS OF FABRICATING THE SAME
Semiconductor devices and methods of fabricating the same are provided. The semiconductor device includes a substrate having a first region including a first element and a second region including... |
|
|
US20120299114 |
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
The invention is directed to a semiconductor device which is manufactured by a BiCMOS process in which a process of manufacturing a V-NPN transistor is rationalized. Furthermore, the hFE of the... |
|
|
US20100317165 |
HIGH-GAIN BIPOLAR JUNCTION TRANSISTOR COMPATIBLE WITH COMPLEMENTARY METAL-OXIDE-SEMICONDUCTOR (CMOS) PROCESS AND METHOD FOR FABRICATING THE SAME
A method for forming a bipolar junction transistor comprises forming a first well of a second conductive type for forming a collector region in a substrate including device isolation layers,... |