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US20110012090 SILICON-GERMANIUM NANOWIRE STRUCTURE AND A METHOD OF FORMING THE SAME  
A silicon-germanium nanowire structure arranged on a support substrate is disclosed, The silicon-germanium nanowire structure includes at least one germanium-containing supporting portion arranged...
US20080291020 Collectable Cop/Spot Chip  
This invention proposes the useful, non-obvious and novel steps of a polymer or wet paper based planchette containing an RFID fully integrated system on a chip transponder which can be attached to...
US20070065990 Recursive spacer defined patterning  
A method for the patterning of a plurality of fins in a MugFET device is provided. The method involves depositing at least one temporary pattern using photolithography. Further processing steps...
US20080160683 SOURCE/DRAIN EXTENSIONS IN NMOS DEVICES  
A method including implanting carbon and fluorine into a substrate in an area of the substrate between a source/drain region and a channel, the area designated for a source/drain extension; and a...
US20070247495 Continuous injet printers  
The invention provides a method of forming a charge electrode array for a binary continuous inkjet printer, the method including forming the charge electrodes and the driver circuitry for the...
US20070218597 Structure and method for controlling the behavior of dislocations in strained semiconductor layers  
A structure and method for controlling the behavior of dislocations in strained semiconductor layers is described incorporating a graded alloy region to provide a strain gradient to change the...
US20070155064 Method for manufacturing carbon nano-tube FET  
A method for manufacturing a carbon nano-tube field-effect transistor (CNT-FET), comprising steps of: forming a patterned conductive layer on a substrate; forming a dielectric layer covering the...
US20070111405 Design method for semiconductor integrated circuit  
In a standard cell in which an active area and a gate conductor are provided, the active area has a largest length in a gate width direction at an end thereof in a gate length direction.
US20070243669 Method for manufacturing solid-state image pickup element and solid-state image pickup element  
The present invention provides a method for manufacturing a solid-state image pickup element in which an intralayer lens is formed above a solid-state image pickup element by: a first step of...
US20090124050 METHOD OF MANUFACTURING NANOWIRES PARALLEL TO THE SUPPORTING SUBSTRATE  
A method of manufacturing at least one nanowire, the nanowire being parallel to its supporting substrate, the method comprising: the formation on the supporting substrate of a structure comprising...
US20100078651 ELECTRONIC FIELD EFFECT DEVICES AND METHODS FOR THEIR MANUFACTURE  
Electronic field effect devices, and methods of manufacture of these electronic field effect devices are disclosed. In particular, there is disclosed an electronic field effect device which has...
US20120305893 TRANSISTOR DEVICE  
The invention provides transistor device comprising a source, a drain and a connecting channel, the channel is a nano-structure device adapted to allow current flow between the source and drain....
US20070166889 Method of forming a well of a NAND flash memory device  
Disclosed herein are a NAND flash memory device and a method of forming a well of the NAND flash memory device. Triple wells of a NAND flash memory device are formed within a cell region in plural....
US20100173478 CONCENTRIC GATE NANOTUBE TRANSISTOR DEVICES  
Single-walled carbon nanotube transistor devices, and associated methods of making such devices include a porous structure for the single-walled carbon nanotubes. The porous structure may be...
US20070194301 Semiconductor arrangement with non-volatile memories  
One aspect of the invention relates to a semiconductor arrangement having at least one nonvolatile memory cell which has a first electrode comprising at least two layers; and having an organic...
US20070224738 Semiconductor device with a multi-plate isolation structure  
A microelectronic assembly and a method for constructing a microelectronic assembly are provided. The microelectronic assembly may include a semiconductor substrate with an isolation trench (62)...
US20050148120 Polycide gate stucture and manufacturing method thereof  
A polycide gate structure and the manufacturing method thereof are provided. The manufacturing method includes the following steps of: (a) providing a substrate; (b) forming a polysilicon layer and...
US20120309135 Through-Substrate Vias  
A method of etching through-substrate vias comprising depositing a layer of embossable material on a first side and a second side of a thin-film stack, the thin-film stack including a base...
US20080171449 METHOD FOR CLEANING SALICIDE  
A method for cleaning suicide includes providing a substrate having at least an intergraded silicide and residues, sequentially performing an ammonia hydrogen peroxide (APM) mixture cleaning...
US20090283833 Integrated circuits having a contact structure having an elongate structure and methods for manufacturing the same  
In an embodiment, an integrated circuit is provided. The integrated circuit may include an active area extending along a first direction corresponding to a current flow direction through the active...
US20050101063 Three-terminal field-controlled molecular devices  
The present invention comprises three-terminal molecules devices that provide an electronic switching or modulation function in response to an electric field that is optimally directed normally to...
US20070111404 Method of manufacturing strained-silicon semiconductor device  
A method for fabricating a strained-silicon semiconductor device to ameliorate undesirable variation in epitaxial film thickness. The layout or component configuration for the proposed...
US20100078724 TRANSISTOR-TYPE PROTECTION DEVICE, SEMICONDUCTOR INTEGRATED CIRCUIT, AND MANUFACTURING METHOD OF THE SAME  
A transistor-type protection device includes: a semiconductor substrate; a well including a first-conductivity-type semiconductor formed in the semiconductor substrate; a source region including a...
US20100301419 INTEGRATED CIRCUIT DEVICE WITH DEEP TRENCH ISOLATION REGIONS FOR ALL INTER-WELL AND INTRA-WELL ISOLATION AND WITH A SHARED CONTACT TO A JUNCTION BETWEEN ADJACENT DEVICE DIFFUSION REGIONS ANDAN UNDERLYING FLOATING WELL SECTION  
Disclosed are embodiments of an improved integrated circuit device structure (e.g., a static random access memory array structure or other integrated circuit device structure incorporating both...
US20080205133 Capacitor-less volatile memory cell, device, system and method of making same  
A capacitor-less memory cell, memory device, system and process of forming the capacitor-less memory cell includes forming the memory cell in an active area of a substantially physically isolated...
US20050269600 Integrated field-effect transistor comprising two control regions, use of said field-effect transistor and method for producing the same  
An integrated field-effect transistor is described in which a substrate region is surrounded by: two terminal regions (a source region and a drain region), two electrically insulating insulating...
US20090309137 FIELD EFFECT TRANSISTOR AND METHOD OF MANUFACTURE THEREOF  
A field effect transistor comprising a semiconductor substrate comprising an electrically conducting channel layer therein; a plurality of source and drain fingers on a first face of the substrate,...
US20070224710 Methods to shape the electric field in electron devices, passivate dislocations and point defects, and enhance the luminescence efficiency of optical devices  
A fluorine treatment that can shape the electric field profile in electronic devices in 1, 2, or 3 dimensions is disclosed. A method to increase the breakdown voltage of AlGaN/GaN high electron...
US20060001051 Thin film semiconductor circuit, manufacturing method thereof, and image display apparatus utilizing the same thin film semiconductor circuit  
Agglomeration of a polycrystalline silicon film is eliminated at the time of obtaining a high quality polycrystalline silicon film by forming a silicon layer on an insulating film substrate and...
US20050139867 Field effect transistor and manufacturing method thereof  
The Mott transistor capable of operating at a room temperature can be realized by using a self-organized nanoparticle array for the channel portion. The nanoparticle used in the present invention...
US20070134853 Power semiconductor device having reduced on-resistance and method of manufacturing the same  
A power semiconductor device having reduced on-resistance (Ron) and a method of manufacturing the same is provided. The method is provided after forming the gate region for inclinedly implanting...
US20100321044 Sensing element integrating silicon nanowire gated-diodes, manufacturing method and detecting system thereof  
The invention disclosed a sensing element integrating silicon nanowire gated-diodes with microfluidic channel, a manufacturing method and a detecting system thereof. The sensing element integrating...
US20080182367 EMBEDDED MEMORY IN A CMOS CIRCUIT AND METHODS OF FORMING THE SAME  
In some aspects, a method of forming a memory circuit is provided that includes (1) forming a two-terminal memory element on a substrate between a gate layer and a first metal layer of the memory...
US20060063314 Field effect transistor and method of manufacturing the same  
A field effect transistor according to one embodiment of the present invention is a field effect transistor which is supposed to be operated under a temperature condition at 300 K or less,...
US20090258463 METHODS OF FABRICATING DIFFERENT THICKNESS SILICON-GERMANIUM LAYERS ON SEMICONDUCTOR INTEGRATED CIRCUIT DEVICES AND SEMICONDUCTOR INTEGRATED CIRCUIT DEVICES FABRICATED THEREBY  
Methods of fabricating semiconductor integrated circuit devices are provided. A substrate is provided with gate patterns formed on first and second regions. Spaces between gate patterns on the...
US20100167472 IMPLANTATION SHADOWING EFFECT REDUCTION USING THERMAL BAKE PROCESS  
A method of forming a resist feature includes forming a resist layer over a semiconductor body, and selectively exposing the resist layer. The method further includes performing a first bake of the...
US20050116305 Thin film transistor  
A thin film transistor according to the present invention may include a gate insulating layer; and a lower pattern placed below the gate insulating layer to contact therewith and having an edge...
US20060125000 Field effect transistor and fabrication method  
A field effect transistor (FET) and fabrication method are disclosed. The FET includes a drift region formed in a substrate. A trench adjoins the drift region and contains at least one control...
US20090256175 Method of doping transistor comprising carbon nanotube, method of controlling position of doping ion, and transistors using the same  
Provided are a method of doping a carbon nanotube (CNT) of a field effect transistor and a method of controlling the position of doping ions. The method may include providing a source, a drain, the...
US20060263948 Method for manufacturing semicondutor device  
A gate oxide film, a gate electrode and low-concentration N type diffusion layers are first formed in a device forming region of a P type silicon substrate. A insulating film is deposited over them...
US20110049594 SILICON-ON-INSULATOR SUBSTRATE WITH BUILT-IN SUBSTRATE JUNCTION  
A method of forming a SOI substrate, diodes in the SOI substrate and electronic devices in the SOI substrate and an electronic device formed using the SOI substrate. The method of forming the SOI...
US20050285219 Nonvolatile semiconductor memory and method of fabricating the same  
A charge storage layer (112) in a gate insulating film of a cell transistor is so formed as not to extend from a channel region of a cell to an element isolation region. Since no electric charge...
US20090250687 SEMICONDUCTOR DEVICE AND METHOD TO CONTROL THE STATE OF A SEMICONDUCTOR DEVICE AND TO MANUFACTURE THE SAME  
A semiconductor device includes a conduct structure to which are arranged contacts for a source and a drain, a resonance region including at least two barrier regions, at least one resonator...
US20070278532 Field-Effect Transistor, Semiconductor Device, a Method for Manufacturing Them, and a Method of Semiconductor Crystal Growth  
A field-effect transistor which comprises a buffer layer and a barrier layer each of which is made of a Group III nitride compound semiconductor and has a channel at the interface inside of the...
US20050263795 Semiconductor device having a channel layer and method of manufacturing the same  
In a method of forming a semiconductor device having an improved channel layer, the channel layer is formed on a surface of a semiconductor substrate and comprises a material of high carrier...
US20100041185 METHOD OF PRODUCING A FIELD EFFECT TRANSISTOR ARRANGEMENT  
A method of producing a field effect transistor arrangement. A substrate having a first crystal surface orientation is provided. A first layer is formed above a first portion of the substrate, the...
US20100035387 Method for fabricating a CMOS-compatible MEMS device  
A method for fabricating a CMOS-compatible MEMS device is disclosed. In particular, disclosed is a method of ordering the acts in the fabrication process of the two device types such that one...
US20090315017 Electronic devices  
An electronic device includes a substrate supporting mobile charge carriers, insulative features formed on the substrate surface to define first and second substrate areas on either side of the...
US20060011942 2-Terminal semiconductor device using abrupt metal-insulator transition semiconductor material  
Provided is a 2-terminal semiconductor device that uses an abrupt MIT semiconductor material layer. The 2-terminal semiconductor device includes a first electrode layer, an abrupt MIT semiconductor...
US20100261319 N-type carrier enhancement in semiconductors  
A method for generating n-type carriers in a semiconductor is disclosed. The method includes supplying a semiconductor having an atomic radius. Implanting an n-type dopant species into the...
Matches 1 - 50 out of 61 1 2 >