Match Document Document Title
US20110080717 INTERCONNECT BOARD, PRINTED CIRCUIT BOARD UNIT, AND METHOD  
An interconnect board for interconnecting and arranged between a first circuit board and a second circuit board, the interconnect board includes a conductive plate including a connection terminal...
US20140097865 CIRCUIT BOARD HAVING BYPASS PAD  
An electronic device having a printed circuit board is provided. In one embodiment, the printed circuit board includes a plurality of external pads to be coupled with an external device and a...
US20150158721 MEMS Device with Sealed Cavity and Release Chamber and Related Double Release Method  
Disclosed is a MEMS device having lower, upper and release chambers with a similar pressure and/or a similar gaseous chemistry. The MEMS device includes a top MEMS plate and a bottom MEMS plate....
US20130341783 INTERPOSER WITH IDENTIFICATION SYSTEM  
Various interposers and method of manufacturing related thereto are disclosed. In one aspect, a method of manufacturing is provided that includes coupling an identification structure to an...
US20060244124 Reduced cost printed circuit board  
A printed circuit board in which signal traces are not restricted in orientation based on the orientation of traces in an adjacent layer. Spacing between layers is increased to reduce crosstalk,...
US20150194405 Protrusion Bump Pads for Bond-on-Trace Processing  
An embodiment apparatus includes a dielectric layer, a conductive trace in the dielectric layer, and a bump pad. The conductive trace includes a first portion having an exposed top surface,...
US20150049441 CIRCUIT BOARD WITH CORNER HOLLOWS  
A method of manufacturing is provided that includes singulating a circuit board from a substrate of plural of the circuit boards, wherein the circuit board is shaped to have four corner hollows....
US20140091456 USING COLLAPSE LIMITER STRUCTURES BETWEEN ELEMENTS TO REDUCE SOLDER BUMP BRIDGING  
Provided are an electronic assembly and method for forming the same, comprising a first element having a first surface and a second element having a second surface. Electrical connections are...
US20090218667 SMART CARDS AND METHODS FOR PRODUCING A SMART CARD  
The invention relates to smart cards. In one embodiment a smart card has a card body having at least a first, a second and a third layer. The first and the second layer are at least partly...
US20140248746 MAKING A FLIP-CHIP ASSEMBLY WITH BOND FINGERS  
A method of making a flip chip assembly includes a substrate having a top surface and forming a plurality of generally longitudinally extending, laterally spaced apart bond fingers are formed on...
US20140131864 Connector Design for Packaging Integrated Circuits  
A device includes a top dielectric layer having a top surface. A metal pillar has a portion over the top surface of the top dielectric layer. A non-wetting layer is formed on a sidewall of the...
US20150235986 SELECTIVE AREA HEATING FOR 3D CHIP STACK  
A method of forming a 3D package. The method may include joining an interposer to a laminate chip carrier with the solid state diffusion of a first plurality of solder bumps by applying a first...
US20120070940 FIXTURE TO CONSTRAIN LAMINATE AND METHOD OF ASSEMBLY  
A fixture assembly and method of forming a chip assembly is provided. The fixture assembly includes a first plate having an opening sized to accommodate a chip mounted on a laminate. The fixture...
US20150187719 Trace Design for Bump-on-Trace (BOT) Assembly  
A bump-on-trace (BOT) interconnection in a package and methods of making the BOT interconnection are provided. An embodiment BOT interconnection comprises a landing trace including a distal end, a...
US20140335660 BONDING STRUCTURE AND METHOD  
A bonding structure and a method for bonding components, wherein the bonding structure includes a nanoparticle preform. In accordance with embodiments, the nanoparticle preform is placed on a...
US20150194408 DOUBLE SOLDER BUMPS ON SUBSTRATES FOR LOW TEMPERATURE FLIP CHIP BONDING  
Multiple injections of molten solder are employed to form double solder bumps having outer layers that melt at lower temperatures than the inner portions thereof. During a flip chip assembly...
US20110165736 Mounting structures for integrated circuit modules  
A structure of an integrated circuit module includes a wiring board, a plurality of integrated circuits and at least one terminating resistance circuit. The wiring board has a mounting region on...
US20080083993 Gold-Tin Solder Joints Having Reduced Embrittlement  
A metal interconnection for two workplaces such as a semiconductor chip and an insulating substrate. The first workpiece (101) has a first contact pad (201) with a gold stud (110); the second...
US20130020718 MEMS Devices and Methods of Forming Same  
The present invention provides a MEMS structure comprising confined sacrificial oxide layer and a bonded Si layer. Polysilicon stack is used to fill aligned oxide openings and MEMS vias on the...
US20130127036 NOVEL MECHANISM FOR MEMS BUMP SIDE WALL ANGLE IMPROVEMENT  
The present disclosure relates to a bump processing method and/or resulting MEMS-CMOS structure, in which one or more anti-stiction bumps are formed within a substrate prior to the formation of a...
US20150115442 Redistribution layer and method of forming a redistribution layer  
A redistribution layer for a chip is provided, wherein the redistribution layer comprises at least one electrical conductor path connecting two connection points with each other, wherein the at...
US20110122587 FLEXIBLE CIRCUIT STRETCHING  
A method of connecting electrical components and an electronic device formed using this method are disclosed. This method includes stretching a first substrate with a plurality of conductive...
US20150031173 COPPER POST SOLDER BUMPS ON SUBSTRATES  
A method comprises forming semiconductor flip chip interconnects having electrical connecting pads and electrically conductive posts terminating in distal ends operatively associated with the...
US20140370662 Copper Post Solder Bumps on Substrates  
A method comprises forming semiconductor flip chip interconnects having electrical connecting pads and electrically conductive posts terminating in distal ends operatively associated with the...
US20130285239 CHIP ASSEMBLY AND CHIP ASSEMBLING METHOD  
A chip assembly includes a PCB and a chip positioned on the PCB. The PCB includes a number of first bonding pads. Each bonding pad includes two soldering balls formed thereon. The chip includes a...
US20120217614 POWER CONVERTOR DEVICE AND CONSTRUCTION METHODS  
In one aspect, the present invention relates generally to integrated circuit (IC) packages and more specific to some embodiments of IC power convertor technologies. In particular, IC packages that...
US20070235848 Substrate having conductive traces isolated by laser to allow electrical inspection  
A semiconductor die substrate panel, and method of forming same, are disclosed wherein plating bars are severed for example by a laser after electroplating of the substrate. Severing the plating...
US20140363928 MICRO DEVICE STABILIZATION POST  
A method and structure for stabilizing an array of micro devices is disclosed. The array of micro devices is formed on an array of stabilization posts formed from a thermoset material. Each micro...
US20050224954 Thermal dissipation in integrated circuit systems  
Integrated circuit systems with thermal dissipation enhancement features are described. In one aspect, an integrated circuit system includes a die incorporating an integrated circuit. The die has...
US20150243584 INTERMETALLIC COMPOUND FILLED VIAS  
Electronic devices including intermetallic columns within vias are provided. Vias are filled with one or more pastes containing metal particles. Thermal treatment of the pastes within the vias...
US20120293973 MULTILAYERED WIRING BOARD AND METHOD FOR FABRICATING THE SAME  
In a multilayered wiring board constituted by laminating to form pluralities of layers of wiring layers 105, 108, 110 and insulating layers 104, 106, 107, in the plurality of laminated insulating...
US20120132463 PRINTED WIRING BOARD AND METHOD FOR MANUFACTURING THE SAME  
Embodiments of the present invention provide a printed wiring board in which solder bumps of a mounted semiconductor chip are less prone to be ruptured. The printed wiring board includes a...
US20050196904 Aerodynamic memory module cover  
Adjacent integrated circuit chips in processor-based systems may be covered with a metal foil cover. The cover may make air flow over the chips more aerodynamic, improving thermal heat transfer...
US20150115437 UNIVERSAL ENCAPSULATION SUBSTRATE, ENCAPSULATION STRUCTURE AND ENCAPSULATION METHOD  
A universal packaging substrate, comprising a first substrate (102) and a silicon interposer (103), wherein, a plurality of bumps (106) are formed between the upper surface of the first substrate...
US20070152321 Fluxless heat spreader bonding with cold form solder  
The formation of electronic assemblies including a heat spreader coupled to at least one die is described. One embodiment relates to a method including positioning a solder on a heat spreader. The...
US20140008786 BUMP-ON-TRACE PACKAGING STRUCTURE AND METHOD FOR FORMING THE SAME  
A device comprises a first package component, and a first metal trace and a second metal trace on a top surface of the first package component. The device further includes a dielectric mask layer...
US20150156869 MICROELECTRONIC STRUCTURES HAVING LAMINATED OR EMBEDDED GLASS ROUTING STRUCTURES FOR HIGH DENSITY PACKAGING  
Embodiments of the present description relate to the field of fabricating microelectronic structures. The microelectronic structures may include a glass routing structure formed separately from a...
US20050227417 Packaging assembly utilizing flip chip and conductive plastic traces  
Packaging assembly methods and systems are disclosed herein. Initially, a plastic substrate can be provided. Thereafter, the plastic substrate can be configured as a conductive plastic trace...
US20140363927 Novel Terminations and Couplings Between Chips and Substrates  
A method of attaching a chip to the substrate with an outer layer comprising via pillars embedded in a dielectric such as solder mask, with ends of the via pillars flush with said dielectric, the...
US20100059877 Method for packaging electronic devices and integrated circuits  
The present invention relates to the field of electronic devices and their associated driver and/or controller integrated circuits and in particular to the mechanical packaging of electronic...
US20150194404 Protrusion Bump Pads for Bond-on-Trace Processing  
A die and a substrate are provided. The die comprises at least one integrated circuit chip, and the substrate comprises first and second subsets of conductive pillars extending at least partially...
US20120032346 ENVIRONMENT-RESISTANT MODULE, MICROPACKAGE AND METHODS OF MANUFACTURING SAME  
An environment-resistant module which provides both thermal and vibration isolation for a packaged micromachined or MEMS device is disclosed. A microplatform and a support structure for the...
US20150263078 FLEXIBLE TFT BACKPANEL BY GLASS SUBSTRATE REMOVAL  
A process of fabricating a flexible TFT back-panel on a glass support includes a step of providing a flat glass support member sufficiently thick to prevent bending during the processing. A layer...
US20110092009 PACKAGE, IN PARTICULAR FOR MEMS DEVICES AND METHOD OF MAKING SAME  
A package includes a substrate provided with a passing opening and a MEMS device. The MEMS device includes an active surface wherein a portion of the MEMS device is integrated sensitive to the...
US20070072421 Method to passivate defects in integrated circuits  
Defects in an integrated circuit are electrically passivated. A hydrogen diffusion blocking film is placed on the integrated circuit. Atomic hydrogen is implanted through the hydrogen diffusion...
US20090127697 Housing with a Cavity for a Mechanically-Sensitive Electronic Component and Method for Production  
An element includes a hollow space for a mechanically sensitive electrical element. The element includes a first housing part and a second housing part rigidly connected to the first housing part...
US20090057874 SEMICONDUCTOR MODULE INCLUDING SEMICONDUCTOR CHIPS IN A PLASTIC HOUSING IN SEPARATE REGIONS  
Semiconductor module comprising semiconductor chips in a plastic housing in separate regions and method for producing the same The invention relates to a semiconductor module (9) comprising...
US20080169555 ANCHOR STRUCTURE FOR AN INTEGRATED CIRCUIT  
An integrated circuit product includes a die and an insulation layer. The insulation layer is operatively coupled to the die. The insulation layer includes a plurality of bump apertures. The...
US20130337615 POLYMER HOT-WIRE CHEMICAL VAPOR DEPOSITION IN CHIP SCALE PACKAGING  
Embodiments of the present invention provide a vapor phase organic polymer film deposited using a CVD process at low temperature during a process sequence for wafer-level chip scale packaging...
US20120161312 NON-SOLDER METAL BUMPS TO REDUCE PACKAGE HEIGHT  
Electronic assemblies and their manufacture are described. One assembly includes a substrate and a die on a first side of the substrate. A plurality of non-solder metal bumps are positioned on a...