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US20090325343 |
BONDED SEMICONDUCTOR STRUCTURE AND METHOD OF FABRICATING THE SAME
A method of forming a bonded semiconductor structure circuit includes providing a support substrate which carries a first semiconductor circuit and providing a first interconnect region carried by...
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US20090079091 |
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH INTERPOSER
An integrated circuit packaging system comprising: fabricating an interposer array having an access opening; fabricating a base package substrate sheet; attaching a first integrated circuit die...
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US20080029879 |
Structure and method of making lidded chips
Lidded chip packages are provided in which an optoelectronic device chip has microelectronic circuits exposed at a surface of the chip with a lid mounted to overlie the optoelectronic device and...
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US20120241980 |
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH COLLAPSED MULTI-INTEGRATION PACKAGE AND METHOD OF MANUFACTURE THEREOF
A method of manufacture of an integrated circuit packaging system includes: providing a base substrate; mounting a central integrated circuit over the base substrate; mounting a side package having...
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US20110227209 |
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH PACKAGE STACKING AND METHOD OF MANUFACTURE THEREOF
A method of manufacture of an integrated circuit package system includes: forming a base package including: fabricating a base package substrate having a component side and a system side, coupling...
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US20110147901 |
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PACKAGE STACKING AND METHOD OF MANUFACTURE THEREOF
A method of manufacture of an integrated circuit packaging system includes forming a lead frame including providing a tie bar plate, forming conductive columns on the tie bar plate, forming a...
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US20110084402 |
PACKAGED SEMICONDUCTOR ASSEMBLIES AND METHODS FOR MANUFACTURING SUCH ASSEMBLIES
Packaged semiconductor assemblies including interconnect structures and methods for forming such interconnect structures are disclosed herein. One embodiment of a packaged semiconductor assembly...
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US20100022052 |
Method for manufacturing package on package with cavity
A manufacturing method of a package on package with a cavity. The method can include forming a first upper substrate cavity in one side of an upper substrate; mounting an upper semiconductor chip...
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US20090283889 |
INTEGRATED CIRCUIT PACKAGE SYSTEM
An integrated circuit package system includes: providing a heat spreader; attaching an upper substrate to the heat spreader, the upper substrate having an upper through-opening provided therein;...
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US20090170246 |
FORMING A 3-D SEMICONDUCTOR DIE STRUCTURE WITH AN INTERMETALLIC FORMATION
A method for forming a semiconductor structure includes forming a first contact pad on a first die, wherein the first contact pad comprises a first metal element, forming a metal over the first...
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US20080081398 |
Cap Wafer for Wafer Bonded Packaging and Method for Manufacturing the Same
The present invention relates to semiconductor device manufacturing techniques, and specifically to a field of device packaging techniques at wafer level. More specifically, it relates to a cap...
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US20080064141 |
MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE, ADHESIVE SHEET USED THEREIN, AND SEMICONDUCTOR DEVICE OBTAINED THEREBY
The present invention includes a temporary fixing step of temporarily fixing a semiconductor element on an adherend interposing an adhesive sheet therebetween, a wire-bonding step of bonding wires...
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US20120196403 |
Rule-Based Semiconductor Die Stacking And Bonding Within A Multi-Die Package
A rule-based method of optimizing wire bonding jumps is disclosed which minimizes the amount of wire used for wire bonds and/or minimizes a number of power and ground pads on a substrate to support...
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US20110195529 |
Rule-Based Semiconductor Die Stacking And Bonding Within A Multi-Die Package
A rule-based method of optimizing wire bonding jumps is disclosed which minimizes the amount of wire used for wire bonds and/or minimizes a number of power and ground pads on a substrate to support...
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US20100320583 |
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH A DUAL SUBSTRATE PACKAGE AND METHOD OF MANUFACTURE THEREOF
A method of manufacture of an integrated circuit packaging system includes: providing a base substrate having a base conductive material on opposite sides of the base substrate; connecting an...
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US20090296476 |
Flash Memory Device and Method for Manufacturing the Same
A flash memory device includes a substrate, a cell stack having a semiconductor layer, in which junction areas for setting areas therebetween to channel areas are formed in a shape of a stripe, and...
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US20090243067 |
MOUNTABLE INTEGRATED CIRCUIT PACKAGE SYSTEM WITH SUBSTRATE
A mountable integrated circuit package system includes: providing a substrate having an opening provided therein; providing an encapsulated integrated circuit package having an external leadfinger;...
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US20120129276 |
4D Process and Structure
A 4D device comprises a 2D multi-core logic and a 3D memory stack connected through the memory stack sidewall using a fine pitch T&J connection. 3D memory in the stack is thinned from the original...
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US20100015759 |
POP Semiconductor Device Manufacturing Method
The objective of the invention is to prevent electrostatic destruction of semiconductor chips during resin molding. With the semiconductor device manufacturing method, a substrate 400 that includes...
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US20090152547 |
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH LEADFRAME INTERPOSER AND METHOD OF MANUFACTURE THEREOF
A method of manufacture of an integrated circuit packaging system includes: forming a substrate; mounting a base integrated circuit on the substrate; forming a leadframe interposer, over the base...
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US20080122058 |
Partially stacked semiconductor devices
Embodiments of the present invention provide partially stacked semiconductor devices and methods of making the same. In one embodiment, a first LSI chip is strategically buried or embedded in a...
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US20120282735 |
METHOD OF MANUFACTURING CHIP-STACKED SEMICONDUCTOR PACKAGE
A method of manufacturing a chip-stacked semiconductor package, the method including preparing a base wafer including a plurality of first chips each having a through-silicon via (TSV); bonding the...
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US20100301496 |
Structure and Method for Power Field Effect Transistor
A packaged semiconductor device has a metal plate (1200) with sawed sides (1200c), a flat first surface (1200a) and a parallel second surface (1200b); the plate is separated into a first section...
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US20100237482 |
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH LAYERED PACKAGING AND METHOD OF MANUFACTURE THEREOF
A method of manufacture of an integrated circuit packaging system includes: forming a base package having a base interposer; forming an intermediate package having an intermediate interposer and an...
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US20100059897 |
INTERCONNECT STRUCTURES FOR STACKED DIES, INCLUDING PENETRATING STRUCTURES FOR THROUGH-SILICON VIAS, AND ASSOCIATED SYSTEMS AND METHODS
Interconnect structures for stacked dies, including penetrating structures for through-silicon vias, and associated systems and methods are disclosed. A system in accordance with a particular...
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US20090189291 |
MULTI-CHIP MODULE
A multi-chip module and method is disclosed. One embodiment provides an electronic module having a first metal structure and a second metal structure. A first semiconductor chip is electrically...
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US20090166835 |
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH INTERPOSER
An integrated circuit package system including: providing a base substrate; coupling a base integrated circuit on the base substrate; forming a double side molded interposer unit over the base...
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US20090108468 |
STACKED SEMICONDUCTOR PACKAGE AND METHOD FOR MANUFACTURING THE SAME
A stacked semiconductor package includes a semiconductor chip module including at least two semiconductor chips, each semiconductor chip having a first face, a second face opposite to the first...
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US20070181990 |
Stacked semiconductor structure and fabrication method thereof
A stacked semiconductor structure and fabrication method thereof are provided. The method includes mounting and connecting electrically a semiconductor chip to a first substrate, mounting on the...
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US20110037157 |
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PACKAGE-ON-PACKAGE AND METHOD OF MANUFACTURE THEREOF
A method of manufacture of an integrated circuit packaging system includes: providing a substrate; mounting a component over a side of the substrate; forming an interface module having a module via...
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US20100244219 |
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PACKAGE STACKING AND METHOD OF MANUFACTURE THEREOF
A method of manufacture of an integrated circuit packaging system includes: forming an encapsulation surrounding an integrated circuit having an inactive side and an active side exposed; forming a...
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US20100022035 |
Electronic apparatus and manufacturing method thereof
There are provided a plurality of semiconductor apparatuses judged as good items in electrical and functional inspections while having internal connection terminals disposed on electrode pads of...
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US20090321948 |
METHOD FOR STACKING DEVICES
A method for fabricating a semiconductor device is provided which includes providing a first device, a second device, and a third device, providing a first coating material between the first device...
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US20090236686 |
Semiconductor Device and Method of Forming UBM Fixed Relative to Interconnect Structure for Alignment of Semiconductor Die
A semiconductor device is made by forming a first conductive layer over a temporary carrier. A UBM layer is formed over the temporary carrier and fixed in position relative to the first conductive...
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US20090091022 |
SEMICONDUCTOR CHIP PACKAGE, SEMICONDUCTOR CHIP ASSEMBLY, AND METHOD FOR FABRICATING A DEVICE
A method for fabricating a device, a semiconductor chip package, and a semiconductor chip assembly is disclosed. One embodiment includes applying at least one semiconductor chip on a first form...
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US20080258288 |
Semiconductor device stack package, electronic apparatus including the same, and method of manufacturing the same
In a semiconductor device stack package and a method of forming the same, the package comprises: a substrate; a plurality of lower chips stacked on the substrate and having an active surface...
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US20110248410 |
STACK PACKAGES USING RECONSTITUTED WAFERS
A stacked microelectronic unit is provided which has a top surface and a bottom surface remote from the top surface and a plurality of vertically stacked microelectronic elements therein, including...
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US20110147849 |
INTEGRATED CIRCUIT WITH ELECTROSTATICALLY COUPLED MOS TRANSISTORS AND METHOD FOR PRODUCING SUCH AN INTEGRATED CIRCUIT
An integrated circuit including: a first transistor;a second transistor, arranged on the first transistor, whereof a channel region is formed in a semiconductor layer including two approximately...
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US20100009499 |
STACKED MICROELECTRONIC LAYER AND MODULE WITH THREE-AXIS CHANNEL T-CONNECTS
A method for interconnecting stacked layers containing integrated circuit die and a device built from the method is disclosed. The stacked layers are bonded together to form a module whereby...
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US20090309235 |
Method and Apparatus for Wafer Level Integration Using Tapered Vias
A semiconductor device has first and second wafers having bond pads. The bond pad of the second wafer is connected to the bond pad of the first wafer using a conductive adhesive. A first...
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US20090206379 |
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
A semiconductor device which can prevent the degradation of contact yield even when subjected to a high-temperature and long-time thermal process, and a manufacturing method thereof are provided....
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US20090091962 |
MULTI-CHIP MEMORY DEVICE WITH STACKED MEMORY CHIPS, METHOD OF STACKING MEMORY CHIPS, AND METHOD OF CONTROLLING OPERATION OF MULTI-CHIP PACKAGE MEMORY
A multi-chip memory device includes a transfer memory chip communicating input/output signals, a stacked plurality of memory chips each including a memory array having a designated bank, and a...
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US20090045489 |
MICROELECTRONIC DIE PACKAGES WITH LEADFRAMES, INCLUDING LEADFRAME-BASED INTERPOSER FOR STACKED DIE PACKAGES, AND ASSOCIATED SYSTEMS AND METHODS
Microelectronic die packages, stacked systems of die packages, and methods of manufacturing thereof are disclosed herein. In one embodiment, a method of manufacturing a microelectronic device...
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US20090026600 |
MICROELECTRONIC DIE PACKAGES WITH METAL LEADS, INCLUDING METAL LEADS FOR STACKED DIE PACKAGES, AND ASSOCIATED SYSTEMS AND METHODS
Microelectronic die packages, stacked systems of die packages, and methods of manufacturing them are disclosed herein. In one embodiment, a system of stacked packages includes a first die package...
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US20080197491 |
SEMICONDUCTOR DEVICE AND METHOD FOR PRODUCING THE SAME
The semiconductor device includes a silicon interposer made of a semiconductor and a first semiconductor chip mounted on one surface of the silicon interposer. The semiconductor device is provided...
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US20070092997 |
FABRICATION METHOD OF NON-VOLATILE MEMORY
A method of fabrication a non-volatile memory is provided. A stacked structure is formed on a substrate, the stacked structure including a gate dielectric layer and a control gate. Then, a first...
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US20110140247 |
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH SHIELDED PACKAGE AND METHOD OF MANUFACTURE THEREOF
A method of manufacture of an integrated circuit packaging system includes: providing a substrate assembly having a connection path; mounting a base device over the substrate assembly with a mount...
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US20110086468 |
ASSEMBLY OF SEMICONDUCTOR CHIPS/WAFERS
A method for assembling a first semiconductor chip provided with pads on a second semiconductor chip or wafer provided with pads, comprising covering the chip(s) with a dielectric, superposing the...
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US20090079060 |
METHOD AND STRUCTURE FOR DISPENSING CHIP UNDERFILL THROUGH AN OPENING IN THE CHIP
A method of making an integrated circuit package includes forming a through hole in an integrated circuit and assembling a die containing the integrated circuit on a carrier so that the die is...
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US20090045497 |
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
A semiconductor device includes a wiring board having connection pads thereon and a semiconductor chip mounted on the wiring board. The wiring board and the semiconductor chip are covered with a...
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