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US20090289345 ELECTRONIC DEVICE PACKAGE AND FABRICATION METHOD THEREOF  
An electronic device package and a fabrication method thereof are provided. The fabrication method includes providing a semiconductor substrate containing a plurality of chips having a first...
US20090288805 SEMICONDUCTOR PACKAGE WITH A CHIP ON A SUPPORT PLATE  
A semiconductor package includes a support plate made of an electrically non-conducting material. Electrical connection vias are formed outside a chip fixing region provided on the front face of...
US20090286390 METHOD OF PACKAGING A SEMICONDUCTOR DEVICE AND A PREFABRICATED CONNECTOR  
A method of packaging a first device having a first major surface and a second major surface includes forming a first layer over a second major surface of the first device and around sides of the...
US20090286353 Apparatus and Methods for Packaging Electronic Devices for Optical Testing  
Apparatus and methods are provided for packaging IC (integrated circuit) chips to enable both optical access to the back side of an IC chip and electrical access to the front side of the IC chip.
US20090275170 LOW TEMPERATURE HERMETIC BONDING AT WATER LEVEL AND METHOD OF BONDING FOR MICRO DISPLAY APPLICATION  
A spatial light modulator is fabricated by bonding a capping layer over a wafer bearing active reflecting surfaces utilizing a low temperature bonding agent capable of providing a hermetic seal,...
US20090274872 Device and Method for Coating a Micro-and/or Nano-Structured Structural Substrate and Coated Structural Substrate  
The present invention relates to a device ( 1 ) and a method for coating a microstructured and/or nanostructured structured substrate ( 8 ). According to the present invention, the coating is...
US20090267219 ULTRA-THIN CHIP PACKAGING  
A packaging method involves attaching a first chip to a stable base, forming contact pads at locations on the stable base, applying a medium onto the stable base such that it electrically insulates...
US20090267079 EXTERNALLY CONFIGURABLE INTEGRATED CIRCUITS  
A die comprising two or more active electronic components is provided. The active electronic components are capable of being interconnected using interconnections external to the die. The die may...
US20090263935 RECYCLING FAULTY MULTI-DIE PACKAGES  
The present invention teaches the recycling of a faulty multi-die memory package by isolating the functional part of the package and using it as a smaller memory package.
US20090256253 Continuously Referencing Signals Over Multiple Layers in Laminate Packages  
A mechanism for continuously referencing signals over multiple layers in laminate packages provides a continuous path for signals from one layer to another while using the ideal voltage reference...
US20090256251 Electronic device packages and methods of formation  
Provided are electronic device packages and their methods of formation. The electronic device packages include an electronic device mounted on a substrate, a conductive via and a locally thinned...
US20090251874 SOLDER BALL INTERFACE  
An intercoupling component is provided that electrically connects the device leads of an integrated circuit package to a substrate. The package includes external device leads, each device lead...
US20090250823 Electronic Modules and Methods for Forming the Same  
Electronic modules are formed by encapsulating microelectronic dies within cavities in a substrate.
US20090250808 RELIABILITY IMPROVEMENT IN A COMPOUND SEMICONDUCTOR MMIC  
A semiconductor package (M) includes a semiconductor substrate layer ( 100 ) having a first side or upper surface ( 120 ) and a second side or lower surface or backplane ( 104 ) opposite the first...
US20090246909 Semiconductor device and method of manufacturing the same  
In a semiconductor device, via holes are formed around a chip buried in a package, one end of a conductor filled in the via hole is covered with a pad portion exposed to the outside, and a wiring...
US20090243063 PACKAGING METHOD OF MICRO ELECTRO MECHANICAL SYSTEM DEVICE AND PACKAGE THEREOF  
Disclosed are a micro electro mechanical system (MEMS) device and a package thereof. The packaging method of a MEMS device comprises: sequentially forming a sacrificial layer, a support layer, and...
US20090236756 FLIP CHIP INTERCONNECTION SYSTEM  
A flip chip interconnection system includes: providing a conductive lead coated with a protective coating; forming a groove through the protective coating to the conductive lead for controlling...
US20090230552 Bump-on-Lead Flip Chip Interconnection  
A flip chip interconnect is made by mating the interconnect bump directly onto a lead, rather than onto a capture pad. Also, a flip chip package includes a die having solder bumps attached to...
US20090230538 SEMICONDUCTOR CHIP PACKAGE STRUCTURE FOR ACHIEVING FACE-UP ELECTRICAL CONNECTION WITHOUT USING A WIRE-BONDING PROCESS AND METHOD FOR MAKING THE SAME  
A semiconductor chip package structure for achieving face-up electrical connection without using a wire-bonding process includes a package unit, a semiconductor chip, a substrate unit, a first...
US20090230487 SEMICONDUCTOR DEVICE, SEMICONDUCTOR DEVICE MANUFACTURING METHOD AND LID FRAME  
A semiconductor device includes: a substrate; a semiconductor chip that is fixed to a first surface of the substrate; a chip covering lid body that is provided on the first surface of the substrate...
US20090227071 SEMICONDUCTOR MODULE  
A module having a semiconductor chip with a first contact element on a first main surface and a second contact element on a second main surface is disclosed. The semiconductor chip is arranged on a...
US20090227068 Method and Apparatus for Packaging Circuit Devices  
A hermetically sealed package includes a lid ( 14 ) hermetically bonded to a wafer or substrate ( 12 ), with a chamber therebetween defined by a recess ( 16 ) in the lid. A circuit device ( 26 )...
US20090224391 Wafer Level Die Integration and Method Therefor  
A method of manufacturing a semiconductor device includes providing a wafer for supporting the semiconductor device. An insulation layer is disposed over a top surface of the wafer. The method...
US20090215227 Chip Scale Package Fabrication Methods  
Embodiments of the present invention includes a method of assembling a chip scale package (CSP). The method comprises adding bumps, sawing the saw streets from the front of a wafer, molding the...
US20090215226 Method of Detaching a Thin Semiconductor Circuit From Its Base  
In order to provide a method of detaching a thin semiconductor circuit ( 1 ) from its base ( 2 ), wherein the semiconductor circuit ( 1 ) is provided with terminals ( 3 ) for electrical contacting,...
US20090212443 INTEGRATED CIRCUIT PACKAGE SUBSTRATE HAVING CONFIGURABLE BOND PADS  
Methods, systems, and apparatuses for integrated circuit package substrates, integrated circuit packages, and processes for assembling the same, are provided. A substrate for a flip chip integrated...
US20090212416 INTEGRATED CIRCUIT PACKAGE AND METHOD OF MANUFACTURING SAME  
An integrated circuit package includes a substrate ( 110, 210 ) having a first surface ( 111, 211 ) and an opposing second surface ( 112, 212 ), and a die platform ( 130, 230 ) adjacent to the...
US20090212411 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREFOR  
A semiconductor device includes a thermoplastic resin case, a semiconductor chip mounted within the thermoplastic resin case, a metal terminal having a wire bonding surface and an opposing contact...
US20090206460 Intermediate Bond Pad for Stacked Semiconductor Chip Package  
The invention provides apparatus and methods by which, in a stacked semiconductor chip package, a continuous electrical path may be provided among bond pads by way of one or more intermediate bond...
US20090206455 INTEGRATED CIRCUIT STACKED PACKAGE PRECURSORS AND STACKED PACKAGED DEVICES AND SYSTEMS THEREFROM  
A package-on-package (POP) package precursor and packaged devices and systems therefrom includes an electronic substrate including electrically conductive layers and a top surface. A first portion...
US20090206358 PACKAGE STRUCTURE OF COMPOUND SEMICONDUCTOR DEVICE AND FABRICATING METHOD THEREOF  
A package structure of a compound semiconductor device comprises a thin film substrate, a die, at least one metal wire and a transparent encapsulation material. The thin film substrate comprises a...
US20090203167 Method for Manufacturing Bonded Substrate  
The present invention provides a method for manufacturing a bonded substrate that is a method for manufacturing a bonded substrate where an active layer wafer is bonded to a support substrate...
US20090201656 Semiconductor package, and method of manufacturing semiconductor package  
A semiconductor package is obtained by separately preparing a board having, as formed on the surface thereof, an interconnect pattern containing a fine pattern having a narrow interconnect pitch...
US20090191664 Apparatus for Improved Power Distribution in Wirebond Semiconductor Packages  
A semiconductor package comprising a die adjacent a substrate, a supporting plate adjacent the die, and a conducting plate abutting the supporting plate and electrically coupled to a metal...
US20090187993 PROCESSOR HARDWARE AND SOFTWARE  
A system and method for detecting the use of pirated software on a processor device ( 10 ), whereby said processor device ( 10 ) having a bus controller ( 14 ), is bonded so as to detect the...
US20090186425 METHOD FOR FORMING BUMPS, SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME, SUBSTRATE PROCESSING APPARATUS, AND SEMICONDUCTOR MANUFACTURING APPARATUS  
A semiconductor substrate ( 1 ) is secured by suction to a rear face ( 1 b ) of a supporting face ( 11 a ) of a substrate supporting table ( 11 ). In this event, the thickness of the semiconductor...
US20090184756 Semiconductor Power Device with Bias Circuit  
An RF power circuit comprises a power transistor having a gate and drain, an output matching network coupled to the drain and an input matching network coupled to the gate. A closed-loop bias...
US20090174072 SEMICONDUCTOR SYSTEM HAVING BGA PACKAGE WITH RADIALLY BALL-DEPOPULATED SUBSTRATE ZONES AND BOARD WITH RADIAL VIA ZONES  
A printed circuit board has contact lands ( 710 ) forms an array with depopulated elongated zones ( 820 ), which are radially oriented from the board center towards the board periphery. Conductive...
US20090174054 Module with Flat Construction and Method for Placing Components  
A module for electrical components is proposed in which connection surfaces that can be bonded are provided on a multi-layer substrate with integrated wiring; a component chip is bonded on the top...
US20090174050 IN-PLANE SILICON HEAT SPREADER AND METHOD THEREFOR  
A method of (and heat spreader for) dissipating heat from a heat source, includes providing a plurality of heat flux paths from the heat source, to remove the heat from the heat source.
US20090170239 UTILIZING APERTURE WITH PHASE SHIFT FEATURE IN FORMING MICROVIAS  
A method, comprises drilling a set of one or more microvias in a semiconductor package with an aperture, wherein drilling the set of microvias comprises to use an aperture that has a phase shift...
US20090168386 ELECTRONIC APPARATUS AND SUBSTRATE MOUNTING METHOD  
According to one embodiment, an electronic apparatus comprises a frame with a hollow portion formed inside thereof, a shield coating applied to the inner surface of the frame, a plurality of...
US20090166827 MECHANICAL ISOLATION FOR MEMS DEVICES  
A device according to the present invention includes a MEMS device supported on a first side of a die. A first side of an isolator is attached to the first side of the die. A package is attached to...
US20090166774 WIRE BONDING METHOD AND SEMICONDUCTOR DEVICE  
First and second semiconductor chips are arranged side by side on a package base. A plurality of electrode pads with exposed Al films are formed at regular intervals on the first and second...
US20090166679 INTEGRATED CIRCUIT AND MANUFACTURING PROCESS FACILITATING SELECTIVE CONFIGURATION FOR ELECTROMAGNETIC COMPATIBILITY  
An integrated circuit (IC) having a selectively-designated electromagnetic compatibility (EMC) performance characteristic. The IC includes an IC die having an input or output (I/O) node. A first...
US20090160040 LOW TEMPERATURE CERAMIC MICROELECTROMECHANICAL STRUCTURES  
A method of providing microelectromechanical structures (MEMS) that are compatible with silicon CMOS electronics is provided. The method provides for processing and manufacturing is steps limiting...
US20090155954 THERMAL ENHANCED LOW PROFILE PACKAGE STRUCTURE AND METHOD FOR FABRICATING THE SAME  
A thermal enhanced low profile package structure and a method for fabricating the same are provided. The package structure typically includes a metallization layer with an electronic component...
US20090155953 Semiconductor device fabricating method and fabricating apparatus  
Respective attracting openings of a bonding head are disposed so as to avoid joining regions at which bump electrodes (obverse electrodes) of a semiconductor chip are joined with bump electrodes of...
US20090152705 Micromechanical Component and Method for Fabricating a Micromechanical Component  
A method for fabricating a microelectromechanical or microoptoelectromechanical component. The method includes producing first and second layer composites. The first has a first substrate and a...
US20090152544 DISGUISING TEST PADS IN A SEMICONDUCTOR PACKAGE  
A method of forming a semiconductor package is disclosed including disguising the test pads. Test pads are defined in the conductive pattern of the semiconductor package for allowing electrical...
Matches 1 - 50 out of 226 1 2 3 4 5 >