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US20060050580 Method for generating identification code of semiconductor device, method for identifying semiconductor device and semiconductor device  
A semiconductor device including memory cells such as flip-flops, RAMs or SRAMs is powered on, and first logic signals of Hi or Lo output from the respective memory cells are obtained. A...
US20120087196 GATE OXIDE BREAKDOWN-WITHSTANDING POWER SWITCH STRUCTURE  
The present invention proposes a gate oxide breakdown-withstanding power switch structure, which is connected with an SRAM and comprises a first CMOS switch and a second CMOS switch respectively...
US20100091596 SOLID STATE DRIVE SYSTEMS AND METHODS OF REDUCING TEST TIMES OF THE SAME  
Example embodiments of the inventive concept are directed to solid state device systems and methods of reducing test times of the same.
US20110235454 High-voltage selecting circuit which can generate an output voltage without a voltage drop  
A high-voltage selecting circuit generates an output voltage with no voltage drop by means of an auxiliary NMOS transistor turning on the corresponding selecting PMOS transistor of the high-voltage...
US20110280094 Boost Cell Supply Write Assist  
A method of increasing a drain to source voltage measured at an access pass-gate to a SRAM circuit in a SRAM memory array, including increasing a low voltage from a low voltage source powering said...
US20120106285 CIRCUITS AND METHODS FOR REDUCING MINIMUM SUPPLY FOR REGISTER FILE CELLS  
A register file employing a shared supply structure to improve the minimum supply voltage.
US20110310689 POWER SOURCE AND POWER SOURCE CONTROL CIRCUIT  
Power sources, backup power circuits, power source control circuits, data storage devices, and methods relating to controlling application of power to a node are disclosed. An example power source...
US20110026335 POWER-UP SIGNAL GENERATION CIRCUIT  
A power-up signal generation circuit includes a fixed level transition voltage generation unit, a variable level transition voltage generation unit, a comparison unit, and a selective output unit....
US20090267636 Security circuit having an electrical fuse ROM  
A security circuit includes an electrical fuse read only memory (ROM) including a plurality of electrical fuse units. The electrical fuse units are arranged to correspond to bit values of an...
US20110216618 VOLTAGE COMPENSATED TRACKING CIRCUIT IN SRAM  
Supply voltage compensated tracking circuit in a split-rail static random access memory (SRAM). The circuit includes a tracking circuit for tracking a delay required for generating sense amplifier...
US20090040857 INTEGRATED CIRCUIT INCLUDING DECOUPLING CAPACITORS THAT CAN BE DISABLED  
An integrated circuit includes a decoupling capacitor configured to be enabled in response to the decoupling capacitor not increasing a standby current of the integrated circuit and disabled in...
US20110141837 Voltage regulation circuitry  
Voltage regulation circuitry is provided comprising a pull-up p-type threshold device connecting a supply voltage node to an output voltage node, the pull-up p-type threshold device configured to...
US20090122633 INTEGRATED CIRCUIT WITH CONTROLLED POWER SUPPLY  
An integrated circuit comprises a main circuit, a supply circuit configured to provide a supply current to the main circuit, a sensing circuit configured to sense the supply current, and a control...
US20110082963 POWER INTERRUPT MANAGEMENT  
The present disclosure includes methods for operating a memory system, and memory systems. One such method includes updating transaction log information in a transaction log using write look ahead...
US20110085399 Method for Extending Word-Line Pulses  
An integrated circuit includes a positive power supply node, a current tracking circuit, and a current mirroring circuit including a plurality of current paths coupled in parallel. The currents of...
US20110235445 METHOD AND SYSTEM TO LOWER THE MINIMUM OPERATING VOLTAGE OF REGISTER FILES  
A method and system to lower the minimum operating voltage of a register file without increasing the area of each bit cell of the register file. In one embodiment of the invention, the register...
US20060280019 Error based supply regulation  
In some embodiments, an error based supply regulation scheme is provided where error information from a cache is monitored, and the supply level supplying a CPU associated with the cache is...
US20050237818 Plating internal stress measurement program and plating internal stress measurement system  
In order to measure a plating internal stress, the plating internal stress measurement program in a plating internal stress measurement system makes a computer function as: a plating condition...
US20070153610 Dynamic body bias with bias boost  
For one disclosed embodiment, circuitry may bias one or more wells of a substrate from a first state to a second state. Bias by the circuitry of one or more wells of the substrate to the second...
US20060285417 TRANSFORMER COUPLED CLOCK INTERFACE CIRCUIT FOR MEMORY MODULES  
The invention is a clock interface circuit for high-speed computer memory modules. It provides improved timing margin due to improved rise and fall times than achieved with present JEDEC specified...
US20110235457 SEMICONDCUTOR INTEGRATED CIRCUIT DEVICE  
According to one embodiment, a semiconductor integrated circuit device is provided. The semiconductor integrated circuit device is provided with a plurality of booster circuits, a regulator and a...
US20090257272 REDUCED SIZE CHARGE PUMP FOR DRAM SYSTEM  
A memory system includes: a memory array, comprising a plurality of memory banks, respectively enabled by a plurality of bank enable signals; a bank selector circuit, for generating the plurality...
US20110235455 VOLTAGE REGULATORS, AMPLIFIERS, MEMORY DEVICES AND METHODS  
Circuits, devices and methods are provided, such as an amplifier (e.g., a voltage regulator) that includes a feedback circuit that supplies negative feedback through a feedback path. One such...
US20070280024 Power-up signal generator for use in semiconductor device  
In an apparatus for generating a power-up signal, a mode register set (MRS) and other circuits are prevented from being reset, thereby providing stable circuit operation. A final power-up signal is...
US20100097875 Enhanced Power Distribution in an Integrated Circuit  
An integrated circuit structure for distributing power to one or more standard cells in an integrated circuit includes a first plurality of standard cells and a power mesh power connection...
US20110228623 POWER-UP CIRCUIT  
A power-up circuit comprises an external supply voltage potential detector, a first internal supply voltage potential detector, a second internal supply voltage potential detector, and a logic...
US20090287873 SEMICONDUCTOR INTEGRATED CIRCUIT, SYSTEM DEVICE INCLUDING SEMICONDUCTOR INTEGRATED CIRCUIT, AND SEMICONDUCTOR INTEGRATED CIRCUIT CONTROL METHOD  
A disclosed semiconductor integrated circuit interfaces an external circuit and a host for controlling the external circuit and obtains data used to interface the external circuit and the host from...
US20090295774 Semiconductor integrated circuit having internal voltage generating circuit  
A semiconductor integrated circuit device, includes: a RAM (Random Access Memory) circuit; and an internal power source circuit. The RAM circuit includes a plurality of RAM circuit blocks. The...
US20110007596 Low-Leakage Power Supply Architecture for an SRAM Array  
A method of forming an integrated circuit structure includes providing a chip; forming a static random access memory (SRAM) cell including a transistor on the chip; and forming a bias transistor...
US20090285036 Fuse data read circuit having control circuit between fuse and current mirror circuit  
A fuse data read circuit includes a fuse data holding unit which holds fuse data, a fuse data read unit which detects fuse data, and a bias voltage generating circuit which generates a bias...
US20090080234 SEMICONDUCTOR DEVICE AND DRAM CONTROLLER  
According to a semiconductor device of the present invention, a differential potential between a sense amplification level and a precharge level of a sense amplifier is set to a power supply...
US20090254772 Extending and Scavenging Super-Capacitor Capacity  
A memory system has mechanisms for scavenging capacity of a super capacitor by removing, or reducing, system load from the super capacitor when the super capacitor voltage decays below a low...
US20050135173 System and method for RDMA QP state split between RNIC and host software  
Systems and methods for remote direct memory access (RDMA) queue pair (QP) state split between a RDMA aware network interface card (RNIC) and a host software or application are provided. If a QP...
US20100202190 COMPACT AND HIGHLY EFFICIENT DRAM CELL  
A compact dynamic random access memory (DRAM) cell and highly efficient methods for using the DRAM cell are disclosed. The DRAM cell provides reading, writing, and storage of a data bit on an ASIC...
US20100254181 Raising Programming Currents of Magnetic Tunnel Junctions Using Word Line Overdrive and High-k Metal Gate  
A method of operating magneto-resistive random access memory (MRAM) cells includes providing an MRAM cell, which includes a magnetic tunneling junction (MTJ) device; and a selector comprising a...
US20090225618 POWER MANAGEMENT MODULE FOR MEMORY MODULE  
A power management module for a memory module is provided. The memory module is coupled to a chipset. The power management module includes a basic input/output system (BIOS), a power regulation...
US20100034043 SEMICONDUCTOR IC DEVICE HAVING POWER-SHARING AND METHOD OF POWER-SHARING THEREOF  
A semiconductor IC device capable of power-sharing includes a first power line configured to be supplied with a first power, a second power line configured to be supplied with a second power, a...
US20110235442 Integrated Circuit with Separate Supply Voltage for Memory That is Different from Logic Circuit Supply Voltage  
In one embodiment, an integrated circuit includes at least one logic circuit supplied by a first supply voltage and at least one memory circuit coupled to the logic circuit and supplied by a second...
US20060291280 Configuration finalization on first valid NAND command  
A startup method and circuit to allow high current consumption for startup processes of a low operating voltage memory device such as a NAND device until the receipt of a valid command to the...
US20100182865 Negative-Voltage Generator with Power Tracking for Improved SRAM Write Ability  
An integrated circuit structure includes a static random access memory (SRAM) cell; a first power supply node connected to the SRAM cell, wherein the first power supply node is configured to...
US20100157708 NOISE TOLERANT SENSE CIRCUIT  
A device and a method for a sense circuit have been disclosed. In an implementation, the sense circuit includes a sense amplifier and at least one decoupling device. The decoupling device is...
US20100118637 Circuts and methods for reducing minimum supply for register file cells  
A register file employing a shared supply structure to improve the minimum supply voltage.
US20090268541 DESIGN STRUCTURE FOR ESTIMATING AND/OR PREDICTING POWER CYCLE LENGTH, METHOD OF ESTIMATING AND/OR PREDICTING POWER CYCLE LENGTH AND CIRCUIT THEREOF  
A design structure is embodied in a machine readable medium for designing, manufacturing, or testing a design. The design structure includes a threshold register having a counter, a count register,...
US20100128551 ADJUSTABLE VOLTAGE REGULATOR FOR PROVIDING A REGULATED OUTPUT VOLTAGE  
Voltage regulators, memories, and methods for providing a regulated output voltage are disclosed. For example, one such voltage regulator includes a comparator circuit, a driver circuit, an...
US20110090753 POWER MANAGEMENT  
An SRAM includes circuitry configured for the SRAM to operate at different operation modes using different voltage levels wherein the voltage level and thus the supply current leakage is regulated...
US20070189098 Memory module with independently adjustable power supply  
A memory module with independently adjustable power supply is disconnected from a main board of a computer using the memory module, and includes a rectification circuit provided thereon. The...
US20090219741 DIAGONAL CONNECTION STORAGE ARRAY  
In one aspect, an electronic memory array includes overlapping, generally parallel sets of conductors, and includes storage elements near each point of overlap. One set of conductors has a...
US20110110140 REFERENCE CURRENT GENERATOR FOR RESISTANCE TYPE MEMORY AND METHOD THEREOF  
A reference current generator for a resistance type memory and a method thereof is disclosed. The reference current generator comprises N parallel circuit sets. Each of the N parallel circuit sets...
US20070070772 Voltage generator for peripheral circuit  
A voltage generator for a peripheral circuit, the voltage generator includes: a voltage supplier supplying a peripheral circuit voltage having a voltage level maintained at a reference voltage...
US20070211551 Method for dynamic performance optimization conforming to a dynamic maximum current level  
Various non-limiting exemplary embodiments are disclosed including a method for power management in a system comprising determining a maximum system current level, and allocating current to one or...
Matches 1 - 50 out of 558 1 2 3 4 5 6 7 8 9 10 11 12 >