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US20130094314 SRAM POWER REDUCTION THROUGH SELECTIVE PROGRAMMING  
A method of programming a memory array having plural subarrays is disclosed. (FIG. 3). The method comprises determining a minimum operating voltage (Vmin) for each subarray of the plural subarrays...
US20110085396 REPAIR FUSE DEVICE  
A repair fuse device is provided. The repair fuse device remarkably reduces the number of the enable fuse cuttings by making initial states of all repair fuse sets to a repair state, cutting an...
US20090180340 SEMICONDUCTOR INTEGRATED CIRCUIT INCLUDING COLUMN REDUNDANCY FUSE BLOCK  
A semiconductor integrated circuit includes a semiconductor chip having an edge area and a bank area located an inner portion of the edge area, and a column redundancy fuse block disposed in the...
US20050207241 Semiconductor storage method and apparatus for implementing imormation prompt  
The invention relates to a digital data processing, and more particularly to a method for realizing information prompt semiconductor storage. It comprises the steps of setting up a semiconductor...
US20090257300 FUSE INFORMATION CONTROL DEVICE, SEMICONDUCTOR INTEGRATED CIRCUIT USING THE SAME, AND CONTROL METHOD THEREOF  
A fuse information control device having a delay circuit to delay an active signal, includes a fuse circuit that outputs fuse information in response to a fuse information control signal, and a...
US20070274143 Semiconductor device, electronic equipment and equipment authentication program  
A semiconductor device judges the justice of electronic equipment with authentication information of the electronic equipment to which peculiar ID information is given. The semiconductor device...
US20090161457 Semiconductor storage device having redundancy area  
A semiconductor storage device is provided with: a memory cell array which includes a normal area and a redundancy area which replaces a defective memory cell in the normal area; a normal area...
US20090196113 Fuse circuit and semiconductor memory device including the same  
The fuse circuit includes a first program unit, a second program unit and a sensing circuit. The first and second program units are programmed simultaneously. The first program unit is programmed...
US20090268530 Trigger Circuit of a Column Redundant Circuit and Related Column Redundant Device  
A trigger circuit for triggering corresponding memory cells of a column redundant circuit includes a determining circuit for generating a determining signal according to an accessed row address,...
US20130223172 SELF-REPAIR INTEGRATED CIRCUIT AND REPAIR METHOD  
A method for repairing degraded field effect transistors includes forward biasing PN junctions of one of a source and a drain of a field effect transistor (FET), and a body of the FET. Charge is...
US20120051166 SELF-REPAIR INTEGRATED CIRCUIT AND REPAIR METHOD  
A method for repairing degraded field effect transistors includes forward biasing PN junctions of one of a source and a drain of a field effect transistor (FET), and a body of the FET. Charge is...
US20070109885 Defect analysis place specifying device and defect analysis place specifying method  
A defect analysis place specifying device for specifying defect analysis places from an inspection result of produced printed wiring boards in an electronic part mounting device for mounting parts...
US20100034025 NON-VOLATILE SEMICONDUCTOR STORAGE SYSTEM  
There is provided a non-volatile memory having electrically rewritable non-volatile memory cells arranged therein. A controller controls operation at the non-volatile memory. The non-volatile...
US20070070737 METHOD AND AUXILIARY DEVICE FOR CREATING AND CHECKING THE CIRCUIT DIAGRAM FOR A CIRCUIT WHICH IS TO BE INTEGRATED  
Method and apparatus for creating and checking a circuit diagram for a circuit which is to be integrated. On the basis of this circuit diagram, a layout for the circuit which is to be integrated...
US20090168580 FUSE MONITORING CIRCUIT FOR SEMICONDUCTOR MEMORY DEVICE  
A fuse monitoring circuit for a semiconductor device includes a repair fuse unit including a number of fuses to which a repair address is programmed, and configured to output fuse state signals...
US20080273406 ENHANCED SRAM REDUNDANCY CIRCUIT FOR REDUCING WIRING AND REQUIRED NUMBER OF REDUNDANT ELEMENTS  
A method and enhanced Static Random Access Memory (SRAM) redundancy circuit reduce wiring and the required number of redundant elements. A bitline redundancy mechanism allows the swapping of a...
US20080089151 Methods of determining laser alignment and related structures, devices, and circuits  
Methods may be provided to determine an alignment of a laser with respect to an integrated circuit device including a fuse pattern and a monitoring pattern adjacent the fuse pattern. More...
US20100080072 METHODS AND SYSTEMS TO WRITE TO SOFT ERROR UPSET TOLERANT LATCHES  
Methods and systems to write to redundant storage latches, or storage cells, including soft error upset tolerant latches and feedback-interlocked redundant storage cells, including to write a...
US20070217276 FUSE LATCH CIRCUIT, SEMICONDUCTOR DEVICE AND SEMICONDUCTOR MEMORY SYSTEM  
A data storing fuse element unit includes a plurality of fuse elements, stores data in the respective fuse elements in a bit unit in accordance with presence and absence of cutting of fuse...
US20060274586 Semiconductor memory device with redundancy function  
A fuse and fuse latch includes first and second fuse and fuse latches each serving as a redundancy information storage circuit. Fuse elements and a fuse latch are provided in each of the first and...
US20060285404 Multi-use strobe and illumination module  
A system for illuminating and signaling in a hands free manner includes an illumination module comprising at least one independent light source and strobe emitter, and a material holder for...
US20090201754 SEMICONDUCTOR DEVICE HAVING TRANSMISSION CONTROL CIRCUIT  
A semiconductor device has a transmission control circuit comprising a signal transmission circuit, an output control circuit, a replica circuit and a detection circuit. The single transmission...
US20090067270 STRUCTURE FOR IMPROVED MEMORY COLUMN REDUNDANCY SCHEME  
A design structure embodied in machine readable medium used in a design process includes a system for implementing a memory column redundancy scheme. The system comprises a core array having a...
US20090323417 SEMICONDUCTOR MEMORY REPAIRING A DEFECTIVE BIT AND SEMICONDUCTOR MEMORY SYSTEM  
A semiconductor memory has a plurality of blocks, and each of the blocks comprises a plurality of pages, and further, each of the pages has a plurality of memory cells. A block having defective...
US20090016129 DESIGN STRUCTURE FOR INCREASING FUSE PROGRAMMING YIELD  
A design structure which enables e-fuse memory repair. The design structure uses a compressed bit string to generate another bit string based on a select value. The select value provides...
US20130329510 STACKED DEVICE REMAPPING AND REPAIR  
Various embodiments include apparatus, systems, and methods having multiple dice arranged in a stack in which a defective cell may be replaced by a spare cell on the same die or a different die....
US20100034037 Semiconductor testing device and method of testing semiconductor memory  
The disclosure concerns a semiconductor tester for testing a MUT, comprising a pattern generator; a pattern formatter; a comparator comparing a result signal from the MUT with an expectation...
US20090097334 SEMICONDUCTOR DEVICE  
In a semiconductor device having a redundant memory, the area of the device is reduced and a time required to transfer relief information is reduced. Moreover, a transfer control of relief...
US20090168569 Method and device for redundancy replacement in semiconductor devices using a multiplexer  
A redundancy replacement scheme for a semiconductor device repairing a faulty memory cell in a column select line group with a spare memory cell in the column select line group based on a physical...
US20110134707 BLOCK ISOLATION CONTROL CIRCUIT  
A block isolation control circuit includes: a control signal generation unit configured to generate a control signal which is disabled when a defect occurs in a cell block and it is necessary to...
US20090190418 SEMICONDUCTOR MEMORY, METHOD OF CONTROLLING THE SEMICONDUCTOR MEMORY, AND MEMORY SYSTEM  
A semiconductor memory comprising an address transition detection circuit for detecting a transition of an address and outputs an address detection signal; an address input circuit for inputting...
US20090154245 NONVOLATILE SEMICONDUCTOR STORAGE DEVICE  
A nonvolatile semiconductor storage device includes: a memory cell array in which electrically rewritable nonvolatile memory cells are arranged; and a register that holds good/bad information on a...
US20060198214 Circuits and methods for controlling timing skew in semiconductor memory devices  
A circuit for controlling timing skew in a semiconductor memory device includes a skew control circuit that is configured generate separate skew control signals for each respective one of a...
US20110235453 FUSE CIRCUIT AND REPAIR CONTROL CIRCUIT USING THE SAME  
A fuse circuit includes a fuse driving unit, a separation/connection unit, a voltage equalization unit, and a latching unit. The fuse driving unit is configured to drive an output terminal in...
US20100061168 FUSES FOR MEMORY REPAIR  
Structures for fuses to control repair of multiple memories embedded on an integrated circuit are provided along with methods of use. A set of fuses is shared to control repair of a plurality of...
US20050007842 Amplifying circuit, amplifying apparatus, and memory apparatus  
The present invention is proposed to attain the higher speed and lower electric power consumption in an amplifying circuit, wherein the amplifying circuit comprises a differential type amplifying...
US20130315016 COLUMN REPAIR CIRCUIT  
A column repair circuit of a semiconductor memory apparatus includes a plurality of mats and performs a column repair operation to replace failed cells among a plurality of memory cells provided...
US20090257296 Programmable memory repair scheme  
The present disclosure provides semiconductor devices and methods, systems, and apparatus for testing and operating the same. A semiconductor memory device includes data storage elements and a...
US20110090751 SYSTEMS AND METHODS FOR EFFICIENTLY REPAIRING DYNAMIC RANDOM-ACCESS MEMORY HAVING MARGINALLY FAILING CELLS  
A test system and a method for efficiently repairing marginally failing memory cells in an embedded dynamic random access memory on an integrated circuit identify marginally failing cells in the...
US20080159042 LATCH CIRCUITS AND OPERATION CIRCUITS HAVING SCALABLE NONVOLATILE NANOTUBE SWITCHES AS ELECTRONIC FUSE REPLACEMENT ELEMENTS  
A non-volatile latch circuit is provided. The non-volatile latch circuit includes a nanotube switching element capable of switching between resistance states and non-volatilely retaining the...
US20070058463 Rescue circuit line, display device having the same and method for manufacturing the same  
A display device includes a rescue circuit line structure having a first conductive pattern for interconnecting electrically two circuit elements. The first conductive pattern is formed with an...
US20150228357 STRESS BALANCING OF CIRCUITS  
Methods, systems, and structures for stress balancing field effect transistors subject to bias temperature instability-caused threshold voltage shifts. A method includes characterizing fatigue of...
US20090010085 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND REDUNDANCY METHOD THEREOF  
A semiconductor integrated circuit device includes a first fuse circuit, a second fuse circuit, and a control signal generating circuit which sends a first control signal and executes program such...
US20090067269 MEMORY COLUMN REDUNDANCY SCHEME  
A system for implementing a memory column redundancy scheme is provided. The system comprises a core array having a plurality of columns and a redundancy column each configured for reading or...
US20090190423 SEMICONDUCTOR MEMORY AND MANUFACTURING METHOD THEREOF  
A semiconductor memory is provided which performs redundancy on a memory cell by a given bit unit, the semiconductor memory includes: a comparator circuit that compares an input address and a...
US20120120737 REPAIR CIRCUIT AND CONTROL METHOD THEREOF  
A semiconductor memory apparatus including a repair circuit may comprise: a fuse set block configured to store a repair address, compare the repair address with an input address, and generate a...
US20080170448 STRUCTURE FOR REDUNDANCY PROGRAMMING OF A MEMORY DEVICE  
A design structure for implementing redundancy programming in a memory macro of an integrated circuit chip. It is assumed that all fails are row fails until determined to be bitline fails, circuit...
US20060227632 Information processing system, information generating apparatus and method, information processing apparatus and method, and program  
Embodiments of the present invention are intended to allow a user to integrally manage content regardless whether the content is owned or not owned by the user. In a reproduction terminal, one...
US20100290298 FUSE CIRCUIT AND REDUNDANCY CIRCUIT  
A fuse circuit or a redundancy circuit is capable of detecting a fuse with a crack. The fuse circuit includes a fuse block configured to drive an output node through a current path including a...
US20110019466 Stuck-At Defect Condition Repair for a Non-Volatile Memory Cell  
A method and apparatus for repairing a stuck-at defect condition in a non-volatile memory cell, such as a spin-torque transfer random access memory (STRAM). In some embodiments, a resistive sense...