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US20130193944 VOLTAGE GENERATOR  
According to one embodiment, a voltage generator includes a step-up circuit and a limiter circuit. The step-up circuit outputs a first voltage to a first node. The limiter circuit includes first...
US20140050029 SPLIT-GATE MEMORY CELLS HAVING SELECT-GATE SIDEWALL METAL SILICIDE REGIONS AND RELATED MANUFACTURING METHODS  
Split-gate non-volatile memory (NVM) cells having select-gate sidewall metal silicide regions are disclosed along with related manufacturing methods. Spacer etch processing steps are used to...
US20130077411 Dynamic Switching Approach to Reduce Area and Power Consumption of High Voltage Charge Pumps  
A charge pump system uses a dynamic switching approach, where the pump connections are independent of the load for each output. One large pump is designed to be shared between all of the outputs...
US20140071750 ADAPTIVE WORD-LINE BOOST DRIVER  
A word line driver circuit includes a first transistor having its gate coupled to a first node configured to receive a word line select signal. A second transistor has its gate coupled to the...
US20080043538 Non-volatile semiconductor storage device and word line drive method  
The present invention provides a non-volatile semiconductor storage device which includes word lines used as control gates of memory cells; a pre-decoder which generates pre-decode signals; a main...
US20070274132 DISCHARGE ORDER CONTROL CIRCUIT AND MEMORY DEVICE  
A discharge order control circuit includes a pool circuit, a delay circuit and a discharge unit to control a discharge order of internal power supplies. The pool circuit stores electric charges...
US20120155168 NEGATIVE VOLTAGE GENERATOR, DECODER, NONVOLATILE MEMORY DEVICE AND MEMORY SYSTEM USING NEGATIVE VOLTAGE  
A negative voltage generator includes a direct current voltage generator configured to generate a direct current voltage, a reference voltage generator configured to generate a reference voltage,...
US20140313836 High Speed Signaling Techniques to Improve Performance of Integrated Circuits  
Techniques are presented to improve the performance, accuracy and power consumption of on-chip voltage biasing and transmission for highly loaded RC networks (such as wordlines or bitlines in NAND...
US20150206824 I/O PIN CAPACITANCE REDUCTION USING TSVS  
Methods for reducing pin capacitance and improving off-chip driver performance by using TSVs to enable usage of off-chip drivers located within selected and unselected die of a plurality of...
US20110063921 Circuit Arrangement with a Column Latch and Method for Operating a Column Latch  
In one embodiment, a circuit arrangement with a column latch has a first terminal (A1) for connection to a bit line (BL) of a nonvolatile memory, a second terminal (A2) connected via a first...
US20150092499 SLEW RATE MODULATION  
Apparatus and methods may operate so that arrival times of a data signal at gates of transistors are controlled to switch the transistors at different times to modulate the slew rate of a signal...
US20100008152 SEMICONDUCTOR DEVICE INCLUDING DRIVING TRANSISTORS  
A semiconductor device includes a driving active region defined in a substrate and at least three driving transistors disposed at the driving active region. The driving transistors share one...
US20070064491 Radio resource management  
The present invention relates to radio resource management in a wireless communication system. Specifically, the present invention relates to a method and apparatus for a method of managing...
US20070153589 VOLTAGE REGULATION CIRCUIT, PARTICULARLY FOR CHARGE PUMP  
A voltage regulation device comprises a voltage regulator for regulating a direct voltage supplied by a voltage generator, the voltage regulator comprising means for stopping or activating the...
US20050219911 Non-volatile memory circuit and semiconductor device  
A trimming circuit having an EPROM is provided which enables trimming after packaging without the increase of the number of terminals. An EPROM write voltage is generated by an internal resistor....
US20150103602 SECTOR-BASED REGULATION OF PROGRAM VOLTAGES FOR NON-VOLATILE MEMORY (NVM) SYSTEMS  
Methods and systems are disclosed for sector-based regulation of program voltages for non-volatile memory (NVM) systems. The disclosed embodiments regulate program voltages for NVM cells based...
US20130301361 ROW DRIVER ARCHITECTURE  
Devices and circuits for row driver in a memory device. The proposed row driver circuit architectures may reduce size of the row driver circuitry and enhance the row driver circuit's reliability....
US20130077412 ROW DRIVER CIRCUIT FOR NAND MEMORIES INCLUDING A DECOUPLING INVERTER  
Devices and circuits for row driver architectures that can improve an existing row driver circuit including a boosting capacitor and a level shifter circuit. For example, the improvement can...
US20090196103 NON-VOLATILE MEMORY DEVICE HAVING CONFIGURABLE PAGE SIZE  
A flash memory device having at least one bank, where the each bank has an independently configurable page size. Each bank includes at least two memory planes having corresponding page buffers,...
US20070041248 Semiconductor storage device and method of manufacturing the same  
A method of manufacturing a semiconductor storage device according to an embodiment of the present invention includes forming dummy cells 611, to 618 at a position adjacent to a reference cell...
US20140254284 WORD LINE DRIVER CIRCUIT FOR SELECTING AND DESELECTING WORD LINES  
A memory circuit includes word lines coupled to a memory array, including a first set of one or more word lines deselected in an erase operation, and a second set of one or more word lines...
US20140185388 DYNAMIC DRIVE STRENGTH OPTIMIZATION  
A system for optimizing drive strength may be utilized for identifying the maximum data transfer rate for different devices and different device configurations. The drive strength may be optimized...
US20090003075 FLASH MEMORY DEVICES AND PROGRAMMING METHODS THAT VARY PROGRAMMING CONDITIONS IN RESPONSE TO A SELECTED STEP INCREMENT  
A flash memory device includes a flash memory cell array having flash memory cells arranged with word and bit lines, a word line driver circuit configured to drive the word lines at a selected...
US20090244983 FLASH MEMORY DEVICE AND PROGRAM METHOD THEREOF  
A nonvolatile memory device that includes first and second storage areas, and a control logic configured to control the first and second storage areas, wherein when a program operation of the...
US20140321213 BIASING SPLIT GATE MEMORY CELL DURING POWER-OFF MODE  
A non-volatile memory (NVM) system has a normal mode, a standby mode and an off mode that uses less power than the standby mode. The NVM system includes an NVM array that includes NVM cells and...
US20100085813 METHOD OF DRIVING A SEMICONDUCTOR MEMORY DEVICE AND A SEMICONDUCTOR MEMORY DEVICE  
This disclosure concerns a driving method of a memory having cells of floating body type which comprises executing, during a write operation, a first cycle of applying a first potential to the bit...
US20100034028 METHOD FOR DRIVING NONVOLATILE SEMICONDUCTOR MEMORY DEVICE  
In a nonvolatile semiconductor memory device having n (n is an integer of two or more) electrode films stacked and having charge storage layers provided above and below each of the electrode...
US20070076513 Decoder for memory device with loading capacitor  
A decoder system for a memory device includes a high voltage pump, a high voltage switch, and a loading capacitor. The high voltage pump generates a boost voltage, and the high voltage switch...
US20080186776 SOURCE SIDE ASYMMETRICAL PRECHARGE PROGRAMMING SCHEME  
A method for programming NAND flash cells to minimize program stress while allowing for random page programming operations. The method includes asymmetrically precharging a NAND string from a...
US20110255346 SUB VOLT FLASH MEMORY SYSTEM  
Various circuits include MOS transistors that have a bulk voltage terminal for receiving a bulk voltage that is different from a supply voltage and ground. The bulk voltage may be selectively set...
US20110090743 Sub Volt Flash Memory System  
Various circuits include MOS transistors that have a bulk voltage terminal for receiving a bulk voltage that is different from a supply voltage and ground. The bulk voltage may be selectively set...
US20110222339 NONVOLATILE MEMORY DEVICE FOR REDUCING INTERFERENCE BETWEEN WORD LINES AND OPERATION METHOD THEREOF  
Provided are a nonvolatile memory device and a method of operating the same. The nonvolatile memory device in accordance with an embodiment of the inventive concept may include a string select...
US20140301146 MODIFIED LOCAL SEGMENTED SELF-BOOSTING OF MEMORY CELL CHANNELS  
A method of programming a memory system by selectively applying a program voltage to a selected wordline connected to a memory transistor to be programmed. A first bias voltage is applied to a...
US20080205162 Non-Volatile Memory Device and Driving Method Thereof  
This patent relates to a non-volatile memory device and a driving method thereof The non-volatile memory device includes a source select line in which a floating gate and a control gate are...
US20110007564 FLASH MULTI-LEVEL THRESHOLD DISTRIBUTION SCHEME  
A threshold voltage distribution scheme for multi-level Flash cells where an erase threshold voltage and at least one programmed threshold voltage lie in an erase voltage domain. Having at least...
US20080144389 WORD LINE DRIVER DESIGN IN NOR FLASH MEMORY  
A memory device of the non-volatile type including a memory array having a plurality of memory cells organized as sectors, each sector having a main word line associated with a plurality of local...
US20090052257 NONVOLATILE SEMICONDUCTOR MEMORIES FOR PREVENTING READ DISTURBANCE AND READING METHODS THEREOF  
A method of reading a flash memory device can include driving a selected word line by applying a selection voltage thereto and driving unselected word lines by applying a first voltage thereto,...
US20090027972 WORDLINE DRIVER FOR A NON-VOLATILE MEMORY DEVICE, A NON-VOLATILE MEMORY DEVICE AND METHOD  
A wordline driver, for a non-volatile memory device, comprises a wordline driver output, a first power source, adapted to provide an erase level voltage for erasing portions of the non-volatile...
US20150009764 OUTPUT CIRCUIT AND SEMICONDUCTOR STORAGE DEVICE  
According to one embodiment, there is provided an output circuit including a driver transistor and a pre-driver circuit. The driver transistor is connected to an output terminal. The pre-driver...
US20070047321 Memory system with two voltage sources  
A memory system with two voltage sources comprises a controlling chip which includes a built-in DC/DC converter for transforming low voltage to high voltage, used for transforming 1.8/3.3 voltage...
US20110267891 DRIVING CIRCUIT FOR MEMORY DEVICE  
An electrically programmable non-volatile memory device is proposed. The memory device includes a plurality of memory cells and a driver circuit for driving the memory cells; the driver circuit...
US20120069680 NAND WITH BACK BIASED OPERATION  
Methods of programming, reading and erasing memory cells are disclosed. In at least one embodiment, program, sense, and erase operations in a memory are performed with back biased operation, such...
US20090225599 NONVOLATILE SEMICONDUCTOR STORAGE DEVICE  
A nonvolatile semiconductor memory comprising: a plurality of memory cell blocks each including a plurality of memory cells serially connected to each other; a word line that is connected to...
US20130003462 CONTROL SYSTEM FOR MEMORY DEVICE  
A nonvolatile memory device includes a discharge circuit configured to selectively connect circuit nodes to discharge terminals through corresponding discharge paths, and an accumulation device...
US20080106947 DECODERS AND DECODING METHODS FOR NONVOLATILE MEMORY DEVICES USING LEVEL SHIFTING  
A decoder for a nonvolatile memory device includes a level shifter configured to produce a first voltage at an output thereof responsive to a first state of a global word line and to produce a...
US20080170450 METHOD FOR TESTING INTERNAL HIGH VOLTAGE IN NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND RELATED VOLTAGE OUTPUT CIRCUIT  
In a voltage output circuit of a nonvolatile semiconductor memory device, a high voltage generator generates an internal high voltage, a sampling signal generator generates a sampling signal, and...
US20090010073 Non-Volatile Memory System Including Spare Array and Method of Erasing a Block in the Same  
Methods of operating non-volatile memory devices can compensate for threshold voltage disturbances caused by overhead data programming during block erase operations. These methods include erasing...
US20080151641 Non-volatile memory device reducing data programming and verification time, and method of driving the same  
Provided are a non-volatile memory device in which time required for programming may be saved, and a method of driving the same. The non-volatile memory device may include a memory cell array with...
US20100061148 SEMICONDUCTOR MEMORY DEVICE AND DATA WRITE METHOD THEREOF  
A semiconductor memory device includes a control circuit. The control circuit executes control to perform a verify operation with respect to only a lowest threshold voltage level of a memory cell...
US20090185422 Flash memory device having row decoders sharing single high voltage level shifter, system including the same, and associated methods  
A flash memory device includes first and second memory cell array blocks and a row decoder coupled to the first memory cell array block and the second. memory cell array block. The row decoder...

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