Matches 1 - 50 out of 166 1 2 3 4 >


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US20100080057 Providing A Capacitor-based Power Supply To Enable Backup Copying Of Data From Volatile Storage To Persistent Storage  
A system includes a volatile storage, a persistent storage, a capacitor-based power supply, and a controller coupled to the capacitor-based power supply. The controller detects interruption of...
US20120026794 Method and apparatus of operating a non-volatile DRAM  
A non-volatile DRAM cell includes a pass-gate transistor and a cell capacitor. A read operation of the non-volatile cell begins by negatively charging the cell capacitor. A cell capacitor of an...
US20110002168 Binary Logic Utilizing MEMS Devices  
Embodiments disclosed herein generally relate to switches that utilize micro-electromechanical systems (MEMS). By replacing transistors in many devices with switches such as MEMS switches, the...
US20070002619 BISTABLE MULTIVIBRATOR WITH NON-VOLATILE STATE STORAGE  
The non-volatile memory cell has a volatile memory means for storing an item of binary information. Furthermore, the memory cell comprises only a single programmable resistance element for...
US20140104946 ON-CHIP HV AND LV CAPACITORS ACTING AS THE SECOND BACK-UP SUPPLIES FOR NVSRAM AUTO-STORE OPERATION  
Two on-chip capacitors including one HV capacitor VPPcap and one LV VCC capacitor VCCcap are built over a NVSRAM memory chip as a back-up second power supplies for each NVSRAM cell, regardless of...
US20060007738 Area management type memory system, area management type memory unit and area management type memory controller  
In a storage medium which has a number of areas, access to any area is controlled in accordance with whether or not access to another area is possible, and thereby, destruction of data due to...
US20090147579 NON-VOLATILE MEMORY SYSTEMS AND METHODS INCLUDING PAGE READ AND/OR CONFIGURATION FEATURES  
A high speed voltage mode sensing is provided for a digital multibit non-volatile memory integrated system. An embodiment has a local source follower stage followed by a high speed common source...
US20120020159 NON-VOLATILE STATIC RAM CELL CIRCUIT AND TIMING METHOD  
A non-volatile static random access memory cell and includes a bistable regenerative circuit coupled to first and second transistors and to first and second non-volatile memory cells. Methods of...
US20100238728 Method and apparatus of operating a non-volatile DRAM  
A non-volatile DRAM cell includes a pass-gate transistor and a cell capacitor. A read operation of the non-volatile cell begins by positively charging the cell capacitor. A cell capacitor of an...
US20090147580 One-transistor floating-body dram cell device with non-volatile function  
Disclosed herein is a one-transistor (1T) floating-body Dynamic Random Access Memory (DRAM) cell device with a non-volatile function for implementing the high integration/high performance DRAM....
US20080232167 Current controlled recall schema  
A memory circuit includes a controlled current source coupled to an input to a nonvolatile cell, and a second controlled current source coupled to a volatile cell, the volatile cell coupled to...
US20110267883 DRAM-LIKE NVM MEMORY ARRAY AND SENSE AMPLIFIER DESIGN FOR HIGH TEMPERATURE AND HIGH ENDURANCE OPERATION  
A DRAM-like non-volatile memory array includes a cell array of non-volatile cell units with a DRAM-like cross-coupled latch-type sense amplifier. Each non-volatile cell unit has two non-volatile...
US20100054038 PROGRAMMING OF A CHARGE RETENTION CIRCUIT FOR A TIME MEASUREMENT  
A method of controlling an electronic charge retention circuit for time measurement, including at least a first capacitive element, the dielectric of which has a leakage, and at least a second...
US20140112072 10T NVSRAM CELL AND CELL OPERATIONS  
A 10T NVSRAM cell is provided with a bottom HV NMOS Select transistor in each 3T FString removed from traditional 12T NVSRAM cell. A Recall operation by reading a stored ΔVt state of flash...
US20100061150 Logged-based flash memory system and logged-based method for recovering a flash memory system  
A flash memory system includes a path selector to determine to write to a non-volatile memory, a volatile memory or both the non-volatile memory and the volatile memory when the flash memory...
US20080025092 New cell structure with buried capacitor for soft error rate improvement  
A semiconductor memory device with an improved protection against soft errors includes a bi-stable flip-flop cell having a data storage node and a data bar storage node. A first capacitor...
US20140085978 METHOD AND ARCHITECTURE FOR IMPROVING DEFECT DETECTABILITY, COUPLING AREA, AND FLEXIBILITY OF NVSRAM CELLS AND ARRAYS  
Several preferred embodiments of 1S1F 16T NVSRAM, 1S1F 20T NVSRAM, 1S2F 22T NVSRAM, 1S2F 14T NVSRAM cells are proposed, regardless of 1-poly, 2-poly, PMOS or NOS flash cell structures. Two...
US20070291571 Increasing the battery life of a mobile computing system in a reduced power state through memory compression  
Embodiments of the invention are generally directed to systems, methods, and apparatuses for increasing the battery life of a mobile computing system through memory compression. In some...
US20090122603 INTEGRATED CIRCUIT EMBEDDED WITH NON-VOLATILE PROGRAMMABLE MEMORY HAVING VARIABLE COUPLING  
A programmable non-volatile device uses a floating gate that functions as a FET gate that overlaps a variable portion of a source/drain region. This allows a programming voltage for the device to...
US20140351500 HYBRID VOLATILE AND NON-VOLATILE MEMORY DEVICE  
Non-transitory computer-readable media having information embodied therein that includes a description of an integrated circuit device. The information includes descriptions of a volatile storage...
US20090168519 Architecture of a nvDRAM array and its sense regime  
A process of operating a memory array includes performing all volatile and nonvolatile operations on an nvDRAM cell array via a single data interface and using only DRAM-level signals on the data...
US20090251966 SEMICONDUCTOR MEMORY HAVING VOLATILE AND MULTI-BIT, NON-VOLATILE FUNCTIONALITY AND METHODS OF OPERATING  
A semiconductor memory cell, semiconductor memory devices comprising a plurality of the semiconductor memory cells, and methods of using the semiconductor memory cell and devices are described. A...
US20080291727 Semiconductor memory system having volatile memory and non-volatile memory that share bus, and method of controlling operation of non-volatile memory  
Example embodiments relate to a semiconductor memory system which may include a volatile memory and a non-volatile memory that share a common bus, and a method for controlling the operation of the...
US20090184362 Flash memory cell string  
The present invention relates to a flash memory cell string. The flash memory cell string includes a plurality of cell devices and switching devices connected to ends of the cell devices. Each of...
US20080084743 Memory stucture capable of bit-wise write or overwrite  
An integrated circuit includes a plurality of tiles. One tile is a master tile. Other tiles contain writable registers of memory structures. Information for configuring circuitry of the tile is...
US20120113718 5T HIGH DENSITY NVDRAM CELL  
A memory circuit includes a high voltage region providing storage of a nonvolatile bit, and a low voltage region providing at least partial storage of a volatile bit. The high and low voltage...
US20060227605 Memory architectures including non-volatile memory devices  
Architectures are described that can include integrated non-volatile memory modules. Integrated non-volatile memory modules are a form of memory that is integrated on a single chip and includes at...
US20130294161 LOW-VOLTAGE FAST-WRITE NVSRAM CELL  
This invention discloses several embodiments of a low-voltage fast-write NVSRAM cells, made of either of a 2-poly floating-gate type flash cell or a 1-poly charge-trapping SONOS or MONOS flash...
US20140321205 MEMORY DEVICE PAGE BUFFER CONFIGURATION AND METHODS  
Memory devices and methods are described that include communication circuitry between page buffers in a memory array. Examples include communication circuitry that provide status information of...
US20080080257 Flash memory device and its reading method  
The present invention relates to a flash memory device and a reading method thereof wherein, in a page buffer of a flash memory device, a transmitting unit is disposed between a bit line and a...
US20090219760 MEMORY DEVICE HAVING READ CACHE  
A memory device comprises a non-volatile electrically alterable memory which is susceptible to read disturbance. The device has a control circuit for controlling the operation of the non-volatile...
US20130039127 NON-VOLATILE STATIC RANDOM ACCESS MEMORY DEVICES AND METHODS OF OPERATIONS  
Non-Volatile Static Random Access Memory (NVSRAM) cell devices applying only one single non-volatile element embedded in a conventional Static Random Access Memory (SRAM) cell are disclosed. The...
US20070211530 DATA RECORDING METHOD OF SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE  
A data recording system of a semiconductor integrated circuit device having a memory area is disclosed. The semiconductor integrated circuit device is equipped with a memory area that includes a...
US20090122610 Operation of a non-volatile memory array  
A cache programming operation which requires 2 SRAMs (one for the user and one for the array) may be combined with a multi-level cell (MLC) programming operation which also requires 2 SRAMs (one...
US20060133140 RFID tags storing component configuration data in non-volatile memory and methods  
An RFID tag has a Non Volatile Memory (NVM) array that can store data in a way that survives loss of power. The data is configuration data that controls the operation of an operational component...
US20090237996 MEMORY STRUCTURE HAVING VOLATILE AND NON-VOLATILE MEMORY PORTIONS  
A memory array is provided that includes a transistor having two active gates sharing a source, a drain, and a channel of the transistor. One of the active gates may be coupled to a volatile...
US20090168520 3T high density NVDRAM cell  
A memory circuit includes a single transistor storing both volatile and nonvolatile bit charges.
US20140119120 NVSRAM CELLS WITH VOLTAGE FLASH CHARGER  
The present invention discloses two preferred embodiments of a 12 T NVSRAM cell with a flash-based Charger and a pseudo 10 T NVSRAM cell with one shared Flash-based Charger. The Flash-based...
US20140119118 8T NVSRAM CELL AND CELL OPERATIONS  
One or more embodiments of 8T NVSRAM cell are provided for improving NVSRAM memory architecture with reduced cell size as opposed to the prior art of 12T NVSRAM cell. This novel 8T NVSRAM cell...
US20140334229 SEMICONDUCTOR DEVICE WITH FLOATING GATE AND ELECTRICALLY FLOATING BODY  
Techniques for providing floating body memory devices are disclosed. In one particular exemplary embodiment, the techniques may be realized as a semiconductor device comprising a floating gate, a...
US20070147115 Unified memory and controller  
A memory device has a controller. The controller has a first address bus for receiving a RAM address signals, a first data bus for receiving RAM data signals, and a first control bus for receiving...
US20100008139 Memory devices having volatile and non-volatile memory characteristics and methods of operating the same  
Multi-bit semiconductor memory devices having both volatile and nonvolatile memory characteristics and methods of operating the same are disclosed, the semiconductor memory device including a...
US20140050025 LOW-VOLTAGE FAST-WRITE PMOS NVSRAM CELL  
This invention discloses a low-voltage fast-write 12T or 14T PMOS NVSRAM cell structure which comprises a 6T LV SRAM cell and one pairs of two 3T or 4T HV PMOS Flash strings. Due to reverse...
US20090244972 Nonvolatile Semiconductor Memory Device and Usage Method Thereof  
A nonvolatile semiconductor memory device comprises a first PMOS transistor and a second PMOS transistor having a gate, the first and the second PMOS transistors being connected in series; and a...
US20140119119 PSEUDO-8T NVSRAM CELL WITH A CHARGE-FOLLOWER  
The present invention discloses a 10T NVSRAM cell with a 6T SRAM cell with 4T Flash cell with one dedicated Flash-based Charger. In addition, a Pseudo-8T NVSRAM cell with a shared Flash-based...
US20140010012 FUSION MEMORY  
According to one embodiment, there is provided a fusion memory including a first memory cell array formed of a NAND cell unit and a second memory cell array formed of a DRAM cell on a...
US20110228603 FUSION MEMORY  
According to one embodiment, there is provided a fusion memory including a first memory cell array formed of a NAND cell unit and a second memory cell array formed of a DRAM cell on a...
US20110110157 RANDOM ACCESS MEMORY WITH CMOS-COMPATIBLE NONVOLATILE STORAGE ELEMENT AND PARALLEL STORAGE CAPACITOR  
Systems, methods, and memory device with row lines and column lines arranged in a matrix configuration with a memory cell coupled to one of the column lines and one of the row lines. The memory...
US20080192542 Memory System and Data Reading Method Thereof  
A memory system includes a memory and a memory controller operating to control the memory. The memory includes a random accessible memory including a memory cell array operable in a random access...
US20090244970 RANDOM ACCESS MEMORY WITH CMOS-COMPATIBLE NONVOLATILE STORAGE ELEMENT AND PARALLEL STORAGE CAPACITOR  
Systems, methods, and memory device with row lines and column lines arranged in a matrix configuration with a memory cell coupled to one of the column lines and one of the row lines. The memory...

Matches 1 - 50 out of 166 1 2 3 4 >