Matches 1 - 44 out of 44
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US20100001773 DIGITAL PLL DEVICE  
An input clock dividing unit frequency-divides an input clock, and an input clock multiplying unit frequency-multiplies the input clock. An operation clock selecting unit selects the...
US20090322386 PROGRAMMABLE DIVIDER APPARATUS AND METHOD FOR THE SAME  
A programmable divider apparatus comprises a first divider, a second divider, a feedback control unit, and a plurality of control signals. The first divider provides a frequency division operation...
US20090302900 FREQUENCY DIVIDING DEVICE  
In a frequency dividing device, a 1/P frequency divider subjects an input clock signal to 1/P frequency division. A phase shifter shifts the phase of the 1/P frequency signal and outputs multiple...
US20090302896 SIGNAL CONDITIONING CIRCUIT WITH A SHARED OSCILLATOR  
A circuit for signal conditioning including a first stage with a digital/analog converter, a second stage with an I/Q-modulator, and at least one third stage with a mixer. Instead of a multiplicity...
US20090295436 ELECTRONIC CIRCUIT, FREQUENCY DIVIDER AND RADIO SET  
A master stage 101 comprises a differential circuit composed of transistors 1 and 2 , a differential circuit composed of transistors 3 and 4 , a differential circuit composed of transistors...
US20090296878 FREQUENCY DIVIDER  
A frequency divider including a first frequency-dividing unit, a second frequency-dividing unit, a selecting unit, and a counting unit is provided. The first frequency-dividing unit receives an...
US20090243668 FREQUENCY DIVIDER SPEED BOOSTER  
Embodiments of the present invention synthesize a core frequency divider by adding a switching feedback shell and using multiple clock edges to trigger the frequency divider. Feedback logic is used...
US20090237128 High frequency fractional-N divider  
A divider can include a phase selection circuit that switches between a plurality of phase-separated clock signals in response to a fractional control signal to form a selected clock signal, the...
US20090237036 FREQUENCY SYNTHESIZER AND LOOP FILTER USED THEREIN  
An LPF ( 15 ) includes a plurality of capacitors (C 1 ) to (C n ) connected in parallel, switches (SW 11 ) to (SW 1n ) and (SW 21 ) to (SW 2n ) for carrying out switching to perform their...
US20090219063 METHODS AND ARTICLES OF MANUFACTURE FOR OPERATING ELECTRONIC DEVICES ON A PLURALITY OF CLOCK SIGNALS  
Embodiments of the invention relate to an integrated circuit comprising at least one functional unit configured to operate at a first clock frequency. The integrated circuit also comprises at least...
US20090167366 Audio clock regenerator with precise parameter transformer  
It is difficult to implement a conventional phase lock loop circuit in a sink device within an HDMI system because the low frequency input causes the conventional phase lock loop circuit to absorb...
US20090167375 Signal Generation System  
A signal generation system maintains a phase relationship between output signals of first and second signal generators even when the sampling clock frequency is changed. The signal generators are...
US20090160501 CONTROL SIGNAL GENERATING CIRCUIT ENABLING VALUE OF PERIOD OF A GENERATED CLOCK SIGNAL TO BE SET AS THE PERIOD OF A REFERENCE SIGNAL MULTIPLIED OR DIVIDED BY AN ARBITRARY REAL NUMBER  
A pulse signal circulates around a ring of delay elements with respective traversal signals being thereby successively outputted from the delay elements. The period of a reference signal is...
US20090115466 SEMICONDUCTOR APPARATUS AND RADIO CIRCUIT APPARATUS USING THE SAME  
A semiconductor apparatus includes a signal source 7 that outputs a signal of predetermined frequency, a frequency divider 15 that receives the output signal of the signal source and is capable of...
US20090115467 Semiconductor device and operation method thereof  
A semiconductor memory device can optimize the layout area and current consumption based on multi-phase clock signals which are generated by dividing a source clock signal using a reset signal...
US20090102521 CIRCUIT AND OSCILLATING APPARATUS  
A circuit includes a logic circuit containing a first transistor and a second transistor which are connected in series to each other between a high power supply and a low power supply in such a...
US20090091361 Frequency divider configuration  
A frequency divider including at least one frequency divider cell having an adjustable circuit configuration which may be selected adaptively according to properties of an oscillator signal to be...
US20090085616 SEMICONDUCTOR INTEGRATED CIRCUIT, COMMUNICATION APPARATUS, INFORMATION PLAYBACK APPARATUS, IMAGE DISPLAY APPARATUS, ELECTRONIC APPARATUS, ELECTRONIC CONTROL APPARATUS AND MOBILE APPARATUS  
The semiconductor integrated circuit having a transmitter circuit for transmitting a supplied external data signal DIN. The transmitter circuit includes: a transmitter flip-flop circuit having a...
US20090079497 PHASE TUNING TECHNIQUES  
A differential frequency divider includes first and second input terminals each configured to receive a differential input signal. The divider also includes a first output terminal configured to...
US20090058479 TIMING CONTROLLERS AND DRIVING STRENGTH CONTROL METHODS  
A timing controller receiving image data using an input clock signal and transferring the received image data and an output clock signal to a source driver. The received image data is transferred...
US20090009220 Signal generating apparatus, periodic-signal observing system, integrated circuit, periodic-signal observing method, and method of testing integrated circuit  
A signal generating apparatus having an LSI circuit in which a plurality of cycle-observing signals are generated to be output via an I/O circuit to a device outside the LSI circuit in order to...
US20080269928 Digital PLL and applications thereof  
A digital phase locked loop (PLL) includes a digital phase detector, a digital loop filter, a digitally controlled oscillation module, and a variable feedback divider. The digital phase detector is...
US20080260089 Quadrature Divide-By-Three Frequency Divider and Low Voltage Muller C Element  
A low voltage, low power, wideband quadrature divide-by-three frequency divider using a wideband low voltage, low power differential Muller C element with multiple inputs operates on quadrature...
US20080258781 Multi-Bit Programmable Frequency Divider  
A multi-bit, programmable, modular digital frequency divider divides an input frequency by an m-bit integer divisor to produce an output frequency. The integer divisor re-initializes m-number of...
US20080258780 FREQUENCY DIVIDER  
A frequency divider using a clock source with a plurality of phase signals of a multi-phase oscillator. In one version, the divider includes a plurality of spot-moving stages that are connected to...
US20080238498 CLOCK GENERATOR, METHOD FOR GENERATING CLOCK SIGNAL AND FRACTIONAL PHASE LOCK LOOP THEREOF  
A clock generator includes a delta sigma modulator, a counter and a first phase lock loop. The delta sigma modulator sequentially generates a plurality of variable parameters according to a...
US20080211560 CLOCK GENERATOR AND ASSOCIATED SELF-TEST AND SWITCHING-CONTROL METHOD  
A clock generator with extended tuning range and associated method is provided. The associated self-test and switching-control method includes steps of generating a primary clock signal by a...
US20080191755 Low-Noise Frequency Divider  
A frequency divider has an inverting unit and a plurality of switch inverters in series. Each switch inverter comprises two inphase switches and is controlled by a clock. The two inphase switches...
US20080191754 Phase Coherent Differtial Structures  
Phase-coherent differential structures contain a phase-coherent transformer having two pairs of phase-coherent coupled differential inductors.
US20080186064 Digital Programmable Frequency Divider  
A digital programmable frequency divider is constructed of Rapid Single Flux Quantum (RSFQ) logic elements. The logic elements may include an RSFQ non-destructive readout cell (NDRO), and RSFQ D...
US20080186062 Frequency Divider  
A frequency divider providing an odd integer division factor comprising a binary counter ( 10 ) providing an even integer division factor, which is the first even number smaller than the odd...
US20080186063 Reduced-noise frequency divider system  
Embodiments of a reduced noise reduction system (“RNFDS”) include a frequency divider and a resampler in signal communication with the frequency divider. The frequency divider receives an input...
US20080180139 CMOS DIFFERENTIAL RAIL-TO-RAIL LATCH CIRCUITS  
A CMOS rail-to-rail differential latch is provided in which a plurality of cross-coupled devices pull first and second nodes of the latch to opposite rail-to-rail voltages. Desirably, first and...
US20080180138 METHOD OF DETERMINING FRACTIONAL DIVIDE RATIO USING SIGMA-DELTA MODULATOR  
The invention relates to method of determining a fractional division ratio using a sigma-delta modulator. In this method, the fractional division ratio of the sigma-delta modulator is set as k/q,...
US20080169946 DESERIALIZER, RELATED METHOD, AND CLOCK FREQUENCY DIVIDER  
A deserializer and method for deserializing data are disclosed. The method includes converting data from a serial data domain to a parallel data domain, detecting a comma related to the parallel...
US20080164917 CIRCUITS AND METHODS FOR IMPLEMENTING SUB-INTEGER-N FREQUENCY DIVIDERS USING PHASE ROTATORS  
Circuits and methods are provided for implementing programmable sub-integer N frequency dividers for use in, e.g., frequency synthesizer applications, providing glitch free outputs signals with...
US20080164916 Broadband Low Noise Complex Regenerative Frequency Dividers  
A regenerative frequency divider device including a plurality of multipliers, each of which has a first input port, a second input port and an output port; a first combiner coupled to the plurality...
US20080136540 METHOD AND SYSTEM FOR USE OF TSPC LOGIC FOR HIGH-SPEED MULTI-MODULUS DIVIDER IN PLL  
Aspects of a method and system for use of true single phase clock (TSPC) logic for a high-speed multi-modulus divider in a phase locked loop (PLL) are provided. A fractional-N PLL synthesizer may...
US20080094113 Fraction-N Frequency Divider and Method Thereof  
A fraction-N frequency divider includes a multi-phase clock generator, a first phase selector, a second phase selector, a glitch-free multiplexer, a control circuit, and a counter. The multi-phase...
US20080068053 FREQUENCY DIVIDER AND METHOD FOR CONTROLLING THE SAME  
Conventional frequency dividers allowing a plurality of output signals with different frequency dividing ratios to be output require a plurality of frequency dividing circuits the number of which...
US20080061855 METHOD AND APPARATUS FOR GENERATING A CLOCK SIGNAL AND FOR CONTROLLING A CLOCK FREQUENCY USING THE SAME  
A method and a device for generating a clock signal determine a number of pulses to be discarded from each predetermined cycle of a reference clock signal in order to obtain, on average, a target...
US20080042699 LOW-POWER MODULUS DIVIDER STAGE  
A modulus divider stage (MDS) includes first and second stages. The MDS receives a modulus divisor control signal S that determines whether the MDS stage operates in a divide-by-two mode or a...
US20080018367 Method and Apparatus for Generating Frequency Divided Signals  
In a method for dividing a frequency of a clock signal, a first frequency divided signal is generated based on a clock signal. Rising edges in the first frequency divided signal are detected....
US20080012611 Clock Generator Circuit With Spectrum Spreading  
A clock generation circuit includes a PLL circuit 60 and a jitter inducing circuit. The jitter inducing circuit generates a bias current for driving the voltage-controlled oscillator of the PLL...
Matches 1 - 44 out of 44