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US20090289661 Integrated Circuit With Crosslinked Interconnect Networks  
The present invention provides in a first aspect a programmable interconnect network for an array of logic blocks, which comprises a plurality of switch boxes being connected in a tree-based...
US20090289660 INTERCONNECTION AND INPUT/OUTPUT RESOURCES FOR PROGRAMMABLE LOGIC INTEGRATED CIRCUIT DEVICES  
A programmable logic integrated circuit device has a plurality of regions of programmable logic disposed on the device in a plurality of intersecting rows and columns of such regions....
US20090278564 RECONFIGURABLE INTEGRATED CIRCUIT AND METHOD FOR INCREASING PERFORMANCE OF A RECONFIGURABLE INTEGRATED CIRCUIT  
Methods are disclosed to increase yielded performance of a reconfigurable integrated circuit; improve performance of an application running on a reconfigurable integrated circuit; reduce...
US20090273367 IC HAVING PROGRAMMABLE DIGITAL LOGIC CELLS  
An integrated circuit (IC) includes at least one programmable digital logic cell that includes first dedicated digital logic cell having a plurality of transistors including at least one PMOS...
US20090273368 SCALABLE NON-BLOCKING SWITCHING NETWORK FOR PROGRAMMABLE LOGIC  
A scalable non-blocking switching network (SN) having switches and intermediate (stages of) conductors that are used to connect a first plurality of conductors to other multiple sets of conductors...
US20090267645 PASSGATE STRUCTURES FOR USE IN LOW-VOLTAGE APPLICATIONS  
Enhanced passgate structures for use in low-voltage systems are presented in which the influence of V t on the range of signals passed by single-transistor passgates is reduced. In one...
US20090261858 PROGRAMMABLE INTERCONNECT NETWORK FOR LOGIC ARRAY  
A programmable interconnect network for an array of logic cells. Said interconnect network has a plurality of switch boxes being connected in a tree structure and providing connections to its logic...
US20090256590 STORAGE ELEMENT FOR CONTROLLING A LOGIC CIRCUIT, AND A LOGIC DEVICE HAVING AN ARRAY OF SUCH STORAGE ELEMENTS  
The present invention is a storage element for controlling a logic circuit and a logic device having a plurality of storage elements. The storage element has a first and a second non-volatile...
US20090256588 PROGRAMMABLE ARRAY LOGIC CIRCUIT EMPLOYING NON-VOLATILE FERROMAGNETIC MEMORY CELLS  
A programmable array logic circuit whose temporary memory circuitry employs single bit non-volatile ferromagnetic memory cells. The ferromagnetic memory cells or bits store data even when there is...
US20090224800 PLD ARCHITECTURE FOR FLEXIBLE PLACEMENT OF IP FUNCTION BLOCKS  
In accordance with one aspect of the invention, a hole is formed within an LE array of a PLD by interrupting the LE array base signal routing architecture such that a hole is left for IP function...
US20090219051 HYBRID NANOTUBE/CMOS DYNAMICALLY RECONFIGURABLE ARCHITECTURE AND AN INTEGRATED DESIGN OPTIMIZATION METHOD AND SYSTEM THEREFOR  
A hybrid nanotube, high-performance, dynamically reconfigurable architecture, NATURE, is provided, and a design optimization flow method and system, NanoMap. A run-time reconfigurable architecture...
US20090174430 LOGIC ELEMENT, AND INTEGRATED CIRCUIT OR FIELD PROGRAMMABLE GATE ARRAY  
A complementary logic element including first and second transistor elements. The first and second gate electrodes of the two transistor elements are electrically parallel to form a common gate....
US20090167351 CO-PROCESSOR HAVING CONFIGURABLE LOGIC BLOCKS  
A co-processor system is provided that includes an array of configurable logic blocks (CLBs). Each CLB including a plurality of look-up tables and a plurality of adders. Each CLB may be dynamically...
US20090167352 Field programmable gate arrays using resistivity sensitive memories  
Field programmable gate arrays using resistivity-sensitive memories are described, including a programmable cell comprising a configurable logic, a memory connected to the configurable logic to...
US20090160482 Formation of a hybrid integrated circuit device  
Formation of a hybrid integrated circuit device ( 400 ) is described. A design for the integrated circuit ( 100 ) is obtained and separated into at least two portions responsive to component sizes....
US20090160483 Field programmable application specific integrated circuit with programmable logic array and method of designing and programming the programmable logic array  
A programmable logic array for use in a field programmable application specific integrated circuit (ASIC) implementation is provided. The programmable logic array includes programmable logic...
US20090146691 LOGIC CELL ARRAY AND BUS SYSTEM  
A logic cell array having a number of logic cells and a segmented bus system for logic cell communication, the bus system including different segment lines having shorter and longer segments for...
US20090146689 Configuration Context Switcher with a Clocked Storage Element  
Some embodiments provide an IC with configuration context switchers. The IC includes several configurable circuits, each of which configurably performs one of several operations at any given time,...
US20090146688 Methods of reducing power in programmable devices using low voltage swing for routing signals  
Reduced voltage swing signal path circuitry is provided that lowers the internal signaling power consumption of the interconnection resources of a programmable logic device. The reduced voltage...
US20090134910 RECONFIGURABLE LOGIC STRUCTURES  
Reconfigurable electronic structures and circuits using programmable, non-volatile memory elements. The programmable, non-volatile memory elements may perform the functions of storage and/or a...
US20090128188 Pad invariant FPGA and ASIC devices  
A three dimensional semiconductor device, comprising: a plurality of circuit blocks including programmable logic blocks having predetermined positions within the device; a plurality of pads having...
US20090128189 Three dimensional programmable devices  
In a first aspect, a three dimensional programmable logic device (PLD) comprises a plurality of distributed programmable elements located in a substrate region; and a contiguous array of...
US20090079468 Debug Network for a Configurable IC  
Some embodiments of the invention provide a configurable integrated circuit (IC) that includes several configurable circuits grouped in several tiles. The configurable IC also includes a...
US20090066365 Reprogrammable three dimensional field programmable gate arrays  
3D FPGAs are elucidated with (a) interlayer information sharing, (b) intermittent and variable timing of layer configuration and (c) multilayer multi-functionality. 3D FPGAs are applied to...
US20090066366 Reprogrammable three dimensional intelligent system on a chip  
A high performance 3D semiconductor is described with cubic dimensional multi-node reprogrammable components for multi-functionality and intelligent behaviors. The system is modeled with dynamic...
US20090051387 Field programmable gate array with integrated application specific integrated circuit fabric  
A field programmable gate array (“FPGA”) is provided having integrated application specific integrated circuit (“ASIC”) fabric. The ASIC fabric may be used to implement one or more custom...
US20090033360 PROGRAMMABLE VIA DEVICES WITH AIR GAP ISOLATION  
Programmable via devices and methods for the fabrication thereof are provided. In one aspect, a programmable via device is provided. The programmable via device comprises a first dielectric layer;...
US20090009215 Integrated Circuit with Multidimensional Switch Topology  
An FPGA needs extremely large numbers of switches in its wiring architecture and therefore shows low logic density and low operating speed. This tendency becomes increasingly evident with high...
US20080315917 Programmable computing array  
Methods, devices, and systems for programmable computing arrays have been described. One or more embodiments include programming both a first and a second floating gate of a combined memory and...
US20080309370 Reprogrammable Integrated Circuit  
A reprogrammable integrated circuit, including one or more logic dies including circuit components; and one or more reprogrammable interconnect dies including reprogrammable interconnect components...
US20080288906 Integrated system on module  
An electronic product includes a circuit board, an integrated system on module, and an application-specific module. The integrated system on module and the application-specific module are...
US20080282214 RECONFIGURABLE INTEGRATED CIRCUIT  
The purpose of the present invention is to realize reduction of power consumption of reconfigurable integrated circuits such as FPGAs by decreasing leakage current in SRAMs. A reconfigurable...
US20080265936 Integrated circuit switching device, structure and method of manufacture  
An integrated circuit device can include a plurality of field effect transistors (FETs) having channel depths no greater than a first depth, and at least a first switch junction FET (JFET) having a...
US20080258760 SYSTEM LEVEL INTERCONNECT WITH PROGRAMMABLE SWITCHING  
Different functional elements are all located on a same integrated circuit wherein at least one of the functional elements comprises a micro-controller. Configuration registers or configuration...
US20080238478 FPGA architecture at conventonal and submicron scales  
Reconfigurable logic devices and methods of programming the devices are disclosed. The logic device includes a look-up table (LUT) and at least one storage element configured for sampling LUT...
US20080231317 Staggered logic array block architecture  
A staggered logic array block (LAB) architecture can be provided. An integrated circuit (IC) device can include a first group of LABs substantially aligned with each other, and a second group of...
US20080218208 PROGRAMMABLE LOGIC DEVICE HAVING LOGIC ARRAY BLOCK INTERCONNECT LINES THAT CAN INTERCONNECT LOGIC ELEMENTS IN DIFFERENT LOGIC BLOCKS  
A PLD with LAB interconnect lines that span adjacent LABs in the array and that have the ability to interconnect two logic elements in the different LABs. The PLD includes a plurality of LABs...
US20080211539 Programmable matrix array with phase-change material  
A phase-change material is proposed for coupling interconnect lines an electrically programmable matrix array. Leakage may be reduced by optionally placing a thin insulating breakdown layer between...
US20080204074 DEDICATED INTERFACE ARCHITECTURE FOR A HYBRID INTEGRATED CIRCUIT  
An interface design for a hybrid IC that utilizes dedicated interface tracks to allow signals to interface distributively with the logic blocks of the FPGA portion providing for faster and more...
US20080197878 ENHANCED FIELD PROGRAMMABLE GATE ARRAY  
An enhanced performance field programmable gate array integrated circuit comprises a field programmable gate array and other functional circuitry such as a mask-programmable gate array in the same...
US20080191740 CLOCK TREE NETWORK IN A FIELD PROGRAMMABLE GATE ARRAY  
A clock tree distribution network for a field programmable gate array comprises an interface with a root signal chosen from at least one of an external clock signal, an internal clock signal, a...
US20080169836 Configuration random access memory  
Integrated circuits such as programmable logic device integrated circuits are provided that have configuration random-access memory elements. The configuration random-access memory elements are...
US20080164907 CUSTOMIZED SILICON CHIPS PRODUCED USING DYNAMICALLY CONFIGURABLE POLYMORPHIC NETWORK  
A fabrication technique called “component and polymorphic network,” in which semiconductor chips are made from small prefabricated bare electronic component dies, e.g., application specific...
US20080157813 APPARATUS AND METHODS FOR COMMUNICATING WITH PROGRAMMABLE LOGIC DEVICES  
A circuit arrangement includes a programmable logic device. The programmable logic device includes configuration logic circuitry. The programmable logic device also includes configurable...
US20080150579 Alterable Application Specific Integrated Circuit (ASIC)  
A semiconductor device includes a plurality of circuit blocks; and a configuration circuit coupled to the plurality of circuit blocks to program the circuit blocks, the configuration circuit...
US20080143382 Programming Matrix  
The invention relates to a programming matrix for the switching of one of n logical inputs to one of j outputs, whereby the programming matrix comprises a slot system with magnetic elements in...
US20080136446 BLOCK LEVEL ROUTING ARCHITECTURE IN A FIELD PROGRAMMABLE GATE ARRAY  
An FPGA architecture has top, middle and low levels. The top level of the architecture is an array of the B16×16 tiles arranged in a rectangular array and enclosed by I/O blocks on the periphery....
US20080129335 Configurable IC with interconnect circuits that have select lines driven by user signals  
Some embodiments of the invention provide a configurable integrated circuit (“IC”). The IC includes a first set of circuits and a second set of circuits interspersed among the first set of...
US20080129336 Via programmable gate array with offset direct connections  
Some embodiments of the invention provide configurable via programmable gate array (“VPGA”) with several configurable circuits arranged in a configurable circuit arrangement. In some...
US20080116931 Embedding Memory within Tile Arrangement of a Configurable IC  
Some embodiments of the invention provide a configurable IC that includes several configurable computational tiles and several memory tiles. Each computational tile has a set of configurable logic...
Matches 1 - 50 out of 65 1 2 >