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US20090295427 |
Programmable switch circuit and method, method of manufacture, and devices and systems including the same
A switching circuit can include a logic circuit having a logic circuit input and a logic circuit output and at least three input transistors coupled to provide three separate paths between three...
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US20090273367 |
IC HAVING PROGRAMMABLE DIGITAL LOGIC CELLS
An integrated circuit (IC) includes at least one programmable digital logic cell that includes first dedicated digital logic cell having a plurality of transistors including at least one PMOS...
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US20090273366 |
SEMICONDUCTOR INTEGRATED CIRCUIT, SEMICONDUCTOR INTEGRATED CIRCUIT CONTROL METHOD, AND TERMINAL SYSTEM
A semiconductor integrated circuit 1 judges whether a power unit is performing a discharge operation or a charge operation. To reduce clock skew between a plurality of logic blocks in the...
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US20090267644 |
SEMICONDUCTOR INTEGRATED CIRCUIT
A semiconductor integrated circuit has a voltage supply terminal; a first input terminal fed with a first input signal; an output terminal that outputs an output signal; a second input terminal fed...
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US20090267643 |
FLEXIBLE ADDER CIRCUITS WITH FAST CARRY CHAIN CIRCUITRY
Configurable adder circuitry is provided on an integrated circuit that includes redundant circuitry. The integrated circuit may contain nonvolatile memory and logic circuitry that produces a...
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US20090261858 |
PROGRAMMABLE INTERCONNECT NETWORK FOR LOGIC ARRAY
A programmable interconnect network for an array of logic cells. Said interconnect network has a plurality of switch boxes being connected in a tree structure and providing connections to its logic...
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US20090261857 |
Universal non-volatile support device for supporting reconfigurable processing systems
A universal support device for supporting a reconfigurable electronics device is disclosed. The universal support device includes an application specific integrated circuit (ASIC) module coupled to...
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US20090256589 |
PROGRAMMABLE DEVICE, ELECTRONIC DEVICE, AND METHOD FOR CONTROLLING PROGRAMMABLE DEVICE
A programmable device connected to a storage unit which stores logic circuit configuration information to form a logic circuit and control circuit configuration information to form a control...
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US20090256588 |
PROGRAMMABLE ARRAY LOGIC CIRCUIT EMPLOYING NON-VOLATILE FERROMAGNETIC MEMORY CELLS
A programmable array logic circuit whose temporary memory circuitry employs single bit non-volatile ferromagnetic memory cells. The ferromagnetic memory cells or bits store data even when there is...
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US20090243652 |
INCREMENTER BASED ON CARRY CHAIN COMPRESSION
A computational unit is disclosed to increment or decrement n-bits of data. The unit has n/3 logic blocks to process the n-bits of data, each logic block including: first and second multiplexers to...
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US20090243651 |
Method and Apparatus for Decomposing Functions in a Configurable IC
Some embodiments of the invention provide a configurable integrated circuit (“IC”). The configurable IC includes a set of multiplexers that each has a set of input terminals, a set of output...
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US20090243650 |
PROGRAMMABLE LOGIC DEVICES COMPRISING TIME MULTIPLEXED PROGRAMMABLE INTERCONNECT
A time multiplexed programmable switch of a semiconductor device comprising: a first node; and a plurality of second nodes, each of the second nodes having a path to couple to the first node, the...
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US20090237112 |
DATA TRANSFER CABLE FOR PROGRAMMABLE LOGIC DEVICES
A programmable logic device (PLD) data transfer cable includes a parallel interface, a programming interface, and a logic control circuit. The parallel interface is used for connecting to PLDs. The...
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US20090237111 |
Integrated Circuits with Hybrid Planer Hierarchical Architecture and Methods for Interconnecting Their Resources
The present invention relates to methods for interconnecting base, switching and interconnect resources for configurable integrated circuits that include the following steps: interconnecting base...
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US20090237110 |
PROGRAMMABLE ON-CHIP LOGIC ANALYZER APPARATUS, SYSTEMS, AND METHODS
Apparatus, systems, and methods disclosed herein may cause an event trigger state machine associated with a programmable on-chip logic analyzer (POCLA) to transition to a programmable state at a...
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US20090230990 |
HARDWARE AND SOFTWARE PROGRAMMABLE FUSES FOR MEMORY REPAIR
The present invention relates to a system and method for increasing the manufacturing yield of a plurality of memory cells used in cell arrays. A programmable fuse, having both hardware and...
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US20090224799 |
LOGICAL CIRCUIT DEVICE, LOGICAL OPERATION VARYING METHOD, AND LOGICAL OPERATION SYSTEM
A logical circuit device comprises a plurality of logical blocks including reconfigurable logical configurations and a network including reconfigurable connections among the plurality of logical...
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US20090219051 |
HYBRID NANOTUBE/CMOS DYNAMICALLY RECONFIGURABLE ARCHITECTURE AND AN INTEGRATED DESIGN OPTIMIZATION METHOD AND SYSTEM THEREFOR
A hybrid nanotube, high-performance, dynamically reconfigurable architecture, NATURE, is provided, and a design optimization flow method and system, NanoMap. A run-time reconfigurable architecture...
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US20090212817 |
Configuration information writing apparatus, configuration information writing method and computer program product
A configuration information writing apparatus for writing configuration information defining a logical configuration of a logic circuit device into the logic circuit device to change the logical...
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US20090206875 |
PROGRAMMABLE IO ARCHITECTURE
A buffer device coupled to at least one input/output port of an integrated circuit has a plurality of control inputs configured to receive configuration programming information. The at least one...
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US20090206874 |
SEMICONDUCTOR DEVICE
A first operation unit stores first code information having a bit length shorter than a first set bit, receives dictionary information expressing each set bit corresponding to each code...
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US20090189637 |
Machine for programming on-board chipsets
The present invention discloses a machine for programming on-board chipsets, wherein the on-board chipsets means that some chipsets are mounted on a circuit board, and the circuit board has a...
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US20090179667 |
RECONFIGURABLE LOGIC CIRCUIT
It is made possible to provide a reconfigurable logic circuit with which high integration can be achieved. A reconfigurable logic circuit includes: a multiplexer which includes a plurality of spin...
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US20090174428 |
PROGRAMMABLE ELEMENT, AND MEMORY DEVICE OR LOGIC CIRCUIT
A multi-terminal programmable element. The programmable element includes a source electrode and a drain electrode on a base. The programmable element includes reference voltage contact that is not...
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US20090167346 |
RECONFIGURABLE CIRCUIT, CONFIGURATION METHOD AND PROGRAM
The present invention is intended to provide a reconfigurable circuit, a configuration method and a program capable of significantly shortening the configuration time without increasing the area of...
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US20090167345 |
Reading configuration data from internal storage node of configuration storage circuit
Some embodiments provide an IC with configuration context switchers. The IC includes several configurable circuits, each of which configurably performs one of several operations at any given time,...
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US20090153187 |
Monolithically integrated interface circuit
The invention relates to integrated circuits comprising a monolithically integrated logic IC and a monolithically integrated interface circuit that is conductively connected to the logic IC. The...
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US20090146686 |
Configuration Context Switcher with a Latch
Some embodiments provide an IC with configuration context switchers. The IC includes several configurable circuits, each of which configurably performs one of several operations at any given time,...
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US20090140767 |
Universal circuit for secure function evaluation
An exemplary method enables implementation of a universal circuit capable of emulating each gate of a circuit designed to calculate a function. A first selection module receives inputs associated...
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US20090115453 |
IC OUTPUT SIGNAL PATH WITH SWITCH, BUS HOLDER, AND BUFFER
An electronic integrated circuit includes a signal path connected between the functional logic ( 15 ) thereof and an external output terminal. The signal path includes a switch (S), a bus holder...
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US20090115452 |
LOGIC BLOCK CONTROL SYSTEM AND LOGIC BLOCK CONTROL METHOD
The number of blocks that can be stopped when performing target processing in a programmable logic unit is obtained, and a stop rate of each of a plurality of logic blocks included in the...
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US20090115451 |
CONFIGURABLE AND REUSABLE NAND SYSTEM
A configurable and reusable hardware-software NAND system adaptive to various NAND devices independent of the NAND device manufacturer and NAND device characteristics. A device identification...
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US20090108868 |
METHOD AND CIRCUIT FOR MATCHING SEMICONDUCTOR DEVICE BEHAVIOR
A design structure and method. The design structure comprises a selection circuit comprising a logic circuit, an array of sub-circuits and a switching circuit electrically coupled to each other....
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US20090106483 |
SECURE PERSONALIZATION OF MEMORY-BASED ELECTRONIC DEVICES
Systems and/or methods that facilitate programming content to a plurality of nonvolatile memory devices are presented. A wafer program component facilitates programming content to a plurality of...
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US20090096481 |
SCHEDULER DESIGN TO OPTIMIZE SYSTEM PERFORMANCE USING CONFIGURABLE ACCELERATION ENGINES
A reusable hardware control structure is provided for a hardware acceleration engine that can be configured for implementation within an electronic integrated circuit design according to any one of...
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US20090080260 |
Programmable CSONOS logic element
A complementary SONOS-type (CSONOS) logic device is programmed and erased with a common voltage. The CSONOS device retains data integrity over extended read endurance cycles.
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US20090079468 |
Debug Network for a Configurable IC
Some embodiments of the invention provide a configurable integrated circuit (IC) that includes several configurable circuits grouped in several tiles. The configurable IC also includes a...
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US20090079467 |
METHOD AND APPARATUS FOR UPGRADING FPGA/CPLD FLASH DEVICES
A method for programming a non-volatile memory associated with a programmable logic device (PLD). The method for programming a non-volatile memory includes a reading a data file, wherein the data...
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US20090072857 |
Integrated circuits with adjustable body bias and power supply circuitry
An integrated circuit is provided with adjustable transistor body bias circuitry and adjustable power supply circuitry. The adjustable circuitry may be used to selectively apply body bias voltages...
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US20090072856 |
MEMORY CONTROLLER FOR HETEROGENEOUS CONFIGURABLE INTEGRATED CIRCUITS
A system including a configurable memory controller, a memory interface, and a configurable high speed communications fabric comprising a plurality of interconnect stations arranged in an array and...
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US20090067632 |
Circuit updating system
An information processing apparatus is provided with a reconfigurable unit ( 101 ) in which a circuit can be reconfigured. The provision of a generation unit ( 103 ) enables the generation of...
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US20090058462 |
FIELD PROGRAMMABLE GATE ARRAY INCLUDING A NONVOLATILE USER MEMORY AND METHOD FOR PROGRAMMING
An integrated circuit includes a programmable logic unit and an on-chip non-volatile memory. A JTAG port, TAP controller circuit, and program/erase control circuitry provide user access to the...
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US20090045838 |
INTEGRATED CIRCUIT APPARATUS
An integrated circuit apparatus includes a reconfigurable arithmetic operation device and a control device that generates mapping data defining a circuit configuration of the reconfigurable...
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US20090045837 |
APPARATUS FOR DYNAMIC DEPLOYMENT OF PIN FUNCTIONS ON A CHIP
An apparatus for dynamic deployment of pin functions on a chip is disclosed in the present invention. The apparatus comprises: an input pin receiving unit, capable of integrating a plurality of...
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US20090039916 |
Systems and Apparatus for Providing a Multi-Mode Memory Interface
An integrated circuit for a memory input/output (I/O) pin has five different modes of operation. The memory chip is enabled to operate with unbuffered (or registered) dual inline memory modules...
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US20090039915 |
Integrated Circuit, Chip Stack and Data Processing System
An integrated circuit includes a first connection and a memory circuit. The integrated circuit is switchable between a master mode of operation, in which a buffer between the first connection and...
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US20090033358 |
PROGRAMMABLE VIA DEVICES IN BACK END OF LINE LEVEL
Programmable via devices and methods for the fabrication thereof are provided. In one aspect, a programmable via device is provided. The programmable via device comprises a first dielectric layer;...
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US20090027079 |
Method and Apparatus for Implementing Complex Logic Within a Memory Array
A logic gate is described that implements complex logic within a memory array. The logic gate receives at least three of a first storage cell signal, a second storage cell signal, a first external...
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US20090002022 |
CONFIGURABLE IC WITH DESKEWING CIRCUITS
Some embodiments provide a configurable integrated circuit (IC) comprising multiple deskew circuits for delaying data passage. Each of the deskew circuits comprises a stepwise delay circuit with...
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US20080309370 |
Reprogrammable Integrated Circuit
A reprogrammable integrated circuit, including one or more logic dies including circuit components; and one or more reprogrammable interconnect dies including reprogrammable interconnect components...
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