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US20090302357 |
AMPLIFIERS USING GATED DIODES
A circuit comprises a control line and a two terminal semiconductor device having first and second terminals. The first terminal is coupled to a signal line, and the second terminal is coupled to...
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US20090294818 |
FERROELECTRIC POLYMER
A ferroelectric film comprising polyaminodifluoroborane (PADFB). Also a memory device utilizing the ferroelectric film, a method of fabricating a ferroelectric polymer and a ferroelectric solution.
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US20090294819 |
METHODS FOR ENHANCING CAPACITORS HAVING ROUGHENED FEATURES TO INCREASE CHARGE-STORAGE CAPACITY
Structures and methods for making a semiconductor structure are discussed. The semiconductor structure includes a rough surface having protrusions formed from an undoped silicon film. If the...
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US20090289289 |
DRAM CELL WITH MAGNETIC CAPACITOR
A DRAM cell includes a substrate, a transistor, and a magnetic capacitor. The substrate is composed of semiconductor material with a main surface, the transistor is formed at the main surface, and...
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US20090273963 |
SEMICONDUCTOR STORAGE DEVICE, SEMICONDUCTOR STORAGE DEVICE MANUFACTURING METHOD AND PACKAGE RESIN FORMING METHOD
A ferroelectric capacitor comprising a transistor layer superimposed on a semiconductor substrate, a ferroelectric capacitor layer provided superior to the transistor layer, a wiring layer provided...
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US20090267123 |
SEMICONDUCTOR DEVICE
A semiconductor device includes: a semiconductor substrate; a plurality of transistors on the semiconductor substrate, each of the transistors has a source and drain region; an interlayer...
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US20090267125 |
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
An isolation region comprises a step structure comprising a step surface that is perpendicular to a depth direction, an upper isolation region and a lower isolation region. An RC transistor is...
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US20090261396 |
SEMICONDUCTOR STRUCTURE AND METHOD OF MANUFACTURE
In various embodiments, semiconductor structures and methods to manufacture these structures are disclosed. In one embodiment, a method includes forming a portion of the unidirectional transistor...
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US20090256182 |
SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME
A semiconductor memory device includes a memory cell portion and a peripheral circuit portion. The memory cell portion includes a pillar capacitor with a lower electrode, a dielectric film, and an...
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US20090256180 |
Standard cell having compensation capacitance
A standard cell includes a capacity element which is made up of a first well diffusion layer into which a first conductive impurity is diffused in a region from a surface of a substrate to a...
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US20090256237 |
SEMICONDUCTOR DEVICE, MANUFACTURING METHOD THEREOF, AND DATA PROCESSING SYSTEM
A miniaturized semiconductor device is provided by reducing the design thickness of a wiring line protecting film covering the surface of a wiring layer, and reducing the distance between the...
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US20090251966 |
SEMICONDUCTOR MEMORY HAVING VOLATILE AND MULTI-BIT, NON-VOLATILE FUNCTIONALITY AND METHODS OF OPERATING
A semiconductor memory cell, semiconductor memory devices comprising a plurality of the semiconductor memory cells, and methods of using the semiconductor memory cell and devices are described. A...
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US20090251946 |
DATA CELLS WITH DRIVERS AND METHODS OF MAKING AND OPERATING THE SAME
Disclosed are methods and devices, among which is a device that includes a first semiconductor fin having a first gate, a second semiconductor fin adjacent the first semiconductor fin and having a...
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US20090242952 |
INTEGRATED CIRCUIT INCLUDING A CAPACITOR AND METHOD
An integrated circuit including a capacitor and a method of fabricating an integrated circuit. The capacitor has a first electrode. A plurality of conductive lines is separated from each other and...
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US20090242953 |
SHALLOW TRENCH CAPACITOR COMPATIBLE WITH HIGH-K / METAL GATE
Forming a shallow trench capacitor in conjunction with an FET by forming a plurality of STI trenches; for the FET, implanting a first cell well having a first polarity between a first and a second...
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US20090236602 |
Integrated Circuit, Semiconductor Device Comprising the Same, Electronic Device Having the Same, and Driving Method of the Same
An integrated circuit mounting a DRAM which can realize high integration without complicated manufacturing steps. The integrated circuit according to the invention comprises a DRAM in which a...
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US20090230510 |
SEMICONDUCTOR STORAGE DEVICE AND METHOD OF MANUFACTURING THE SAME
A rutile phase can be formed even in the case of a thin film by adding nickel or cobalt to titanium dioxide in the range of 0.5 to 10 atm %, and the use of this element-added titanium dioxide film...
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US20090230447 |
Semiconductor Device and Method for Manufacturing the Same
A semiconductor device may include a capacitor and a transistor on a silicon-on-insulator (SOI) substrate and a method for manufacturing the semiconductor device may include forming such a...
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US20090230448 |
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND MANUFACTURE THEREOF
In a semiconductor integrated circuit device, testing pads ( 209 b ) using a conductive layer, such as relocation wiring layers ( 205 ) are provided just above or in the neighborhood of terminals...
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US20090224301 |
SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THEREOF
A semiconductor memory device comprises a field effect transistor including a source/drain region, an interlayer insulation film burying the field effect transistor, a ferroelectric capacitor...
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US20090212338 |
Semiconductor Constructions, And Methods Of Forming Semiconductor Constructions
Some embodiments include methods of forming semiconductor constructions. Oxide is formed over a substrate, and first material is formed over the oxide. Second material is formed over the first...
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US20090207681 |
SYSTEMS AND DEVICES INCLUDING LOCAL DATA LINES AND METHODS OF USING, MAKING, AND OPERATING THE SAME
Disclosed are methods, systems and devices, including a device having a fin field-effect transistor with a first terminal, a second terminal, and two gates. In some embodiments, the device includes...
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US20090200593 |
SEMICONDUCTOR DEVICE HAVING MOS-TRANSISTOR FORMED ON SEMICONDUCTOR SUBSTRATE AND METHOD FOR MANUFACTURING THEREOF
A semiconductor device comprises MOS transistors sequentially arranged in the plane direction of a substrate, wherein a gate electrode and a wiring portion for connecting between the gate...
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US20090194802 |
Semiconductor Constructions, and DRAM Arrays
The invention includes methods for utilizing partial silicon-on-insulator (SOI) technology in combination with fin field effect transistor (finFET) technology to form transistors particularly...
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US20090189222 |
SEMICONDUCTOR MEMORY DEVICE
A memory includes a U-shape layer on a substrate; a first diffusion layer provided at an upper part of the U-shaped layer; a second diffusion layer provided at a lower part of the U-shaped layer; a...
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US20090173980 |
PROVIDING ISOLATION FOR WORDLINE PASSING OVER DEEP TRENCH CAPACITOR
A memory cell has an access transistor and a capacitor with an electrode disposed within a deep trench. STI oxide covers at least a portion of the electrode, and a liner covers a remaining portion...
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US20090166702 |
TRENCH-TYPE SEMICONDUCTOR DEVICE STRUCTURE
A trench-type semiconductor device structure is disclosed. The structure includes a semiconductor substrate, a gate dielectric layer and a substrate channel structure. The semiconductor substrate...
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US20090166701 |
One transistor/one capacitor dynamic random access memory (1T/1C DRAM) cell
In general, in one aspect, a method includes forming a semiconductor fin. A first insulating layer is formed adjacent to the semiconductor fin. A second insulating layer is formed over the first...
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US20090166703 |
MEMORY DEVICE WITH A LENGTH-CONTROLLABLE CHANNEL
A memory device is provided. The memory device includes a substrate, a trench having an upper portion and a lower portion formed in the substrate, a trench capacitor formed in the lower portion of...
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US20090152608 |
DRAM Cell Transistor Device and Method
A method for forming a memory device. The method provides a protective layer overlying a surface region of a substrate before threshold voltage implant. The method then includes depositing a photo...
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US20090147580 |
One-transistor floating-body dram cell device with non-volatile function
Disclosed herein is a one-transistor (1T) floating-body Dynamic Random Access Memory (DRAM) cell device with a non-volatile function for implementing the high integration/high performance DRAM. The...
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US20090146254 |
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREFOR
This semiconductor device according to the present invention includes a plurality of cylindrical lower electrodes aligned densely in a memory array region; a plate-like support which is contacted...
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US20090140308 |
Semiconductor device having capacitor formed on plug, and method of forming the same
A semiconductor device includes a silicon substrate, a capacitor element having a lower electrode, a capacitor dielectric film, a TiN film, and a W film, and an interlayer insulation film covering...
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US20090127603 |
SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD THEREOF
A semiconductor memory device according to an embodiment comprises: a field-effect transistor formed on a substrate; an interlayer insulation film formed on the substrate on which the field-effect...
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US20090127608 |
INTEGRATED CIRCUIT AND METHOD OF MANUFACTURING AN INTEGRATED CIRCUIT
An integrated circuit including a memory cell array is shown. The memory cell array comprises word lines extending in a first direction and bit lines extending in a second direction intersecting...
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US20090121274 |
SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME
A salicide treatment is performed on a common source line to reduce surface resistance and contact resistance, thereby improving a cell current characteristic. Therefore, a chip can be reduced in...
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US20090121268 |
Semiconductor Memory Devices Having Vertical Channel Transistors and Related Methods
A semiconductor memory device may include a semiconductor substrate with an active region extending in a first direction parallel with respect to a surface of the semiconductor substrate. A pillar...
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US20090108313 |
REDUCING SHORT CHANNEL EFFECTS IN TRANSISTORS
Microelectronic structures and associated methods for reducing short channel effects in transistors are generally described. In one example, an apparatus includes a semiconductor channel, one or...
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US20090102017 |
SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SEMICONDUCTOR DEVICE
A semiconductor device and a method of fabricating a semiconductor device provide high quality cylindrical capacitors. The semiconductor device includes a substrate defining a cell region and a...
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US20090101955 |
MOLECULAR ELECTRONIC DEVICE AND METHOD OF FABRICATING THE SAME
A molecular electronic device, and a method of fabricating the same, includes a first electrode having a plurality of prominences and depressions on which a plurality of molecules are...
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US20090101981 |
ONE-TRANSISTOR TYPE DRAM
A one-transistor type DRAM simplifies a manufacturing process and reduces the height of a chip. In the one-transistor type DRAM, an active region is defined by a device isolating film. A first word...
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US20090101956 |
EMBEDDED TRENCH CAPACITOR HAVING A HIGH-K NODE DIELECTRIC AND A METALLIC INNER ELECTRODE
A deep trench is formed in a semiconductor substrate and a pad layer thereupon, and filled with a dummy node dielectric and a dummy trench fill. A shallow trench isolation structure is formed in...
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US20090096003 |
SEMICONDUCTOR CELL STRUCTURE INCLUDING BURIED CAPACITOR AND METHOD FOR FABRICATION THEREOF
A semiconductor structure and a method for fabricating the semiconductor structure include at least one field effect transistor, and also a capacitor, located over a substrate. In particular, the...
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US20090090951 |
Capacitors Integrated with Metal Gate Formation
A semiconductor structure including a capacitor having increased capacitance and improved electrical performance is provided. The semiconductor structure includes a substrate; and a capacitor over...
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US20090090996 |
SEMICONDUCTOR DEVICE WITH CONTACT STABILIZATION BETWEEN CONTACT PLUGS AND BIT LINES AND METHOD FOR MANUFACTURING THE SAME
A semiconductor device includes a semiconductor substrate divided into a cell array region, a core region, and a peripheral region. Bit lines are formed in the respective regions. Storage node...
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US20090090950 |
SEMICONDUCTOR DEVICES
Methods, devices, modules, and systems providing semiconductor devices in a stacked wafer system are described herein. One embodiment includes a first wafer for NMOS transistors in a CMOS...
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US20090090946 |
DRAM CELL WITH MAGNETIC CAPACITOR
A DRAM cell includes a substrate, a transistor, and a magnetic capacitor. The substrate is composed of semiconductor material with a main surface, the transistor is formed at the main surface, and...
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US20090085085 |
DRAM CELL WITH CAPACITOR IN THE METAL LAYER
A DRAM cell includes a substrate, a transistor, and a capacitor. The substrate is composed of semiconductor material with a main surface, the transistor is formed at the main surface, and the...
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US20090085084 |
Integrated Circuit and Methods of Manufacturing the Same
A method of manufacturing an integrated circuit includes forming landing pads in an array region of a substrate, individual ones of the landing pads being electrically coupled to individual ones of...
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US20090073736 |
SEMICONDUCTOR DEVICE HAVING STORAGE NODES ON ACTIVE REGIONS AND METHOD OF FABRICATING THE SAME
A semiconductor device includes an active region in a semiconductor substrate, having first, second and third regions sequentially arranged in the active region. An inactive region in the...
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