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US20090289374 |
SEMICONDUCTOR DEVICE, SEMICONDUCTOR DEVICE MODULE, AND METHOD FOR MANUFACTURING THE SEMICONDUCTOR DEVICE MODULE
A semiconductor device can include a plurality of semiconductor elements. The characteristics of each of the semiconductor elements can be easily tested during the production of the semiconductor...
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US20090289373 |
Semiconductor device
The present invention provides a semiconductor device capable of preventing occurrence of cracking and the like, taking a large area, where wiring and the like that function as elemental devices...
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US20090289367 |
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
A copper interconnection layer is formed in an interconnection trench at a surface of an interlayer insulating film. A diffusion preventing insulating film is formed to cover the copper...
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US20090283911 |
Backend Interconnect Scheme with Middle Dielectric Layer Having Improved Strength
An integrated circuit structure includes a first, a second and a third metallization layer. The first metallization layer includes a first dielectric layer having a first k value; and first metal...
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US20090283901 |
Semiconductor device and multilayer wiring board
A gas or an insulating material having a relative dielectric constant of not more than 2.5 on average is interposed between a first wiring layer and a second wiring layer included in a multilayer...
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US20090278254 |
Dielectric materials and methods for integrated circuit applications
An integrated circuit device is provided having a substrate and areas of electrically insulating and electrically conductive material, where the electrically insulating material is a hybrid...
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US20090278244 |
IC DEVICE HAVING LOW RESISTANCE TSV COMPRISING GROUND CONNECTION
A semiconductor device includes an integrated circuit (IC) die including a substrate, and at least one through substrate via (TSV) that extends through the substrate to a protruding integral tip...
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US20090278126 |
METAL LINE SUBSTRATE, THIN FILM TRANSISTOR SUBSTRATE AND METHOD OF FORMING THE SAME
A metal line substrate and a method of fabricating thereof, the metal line substrate including an insulating layer and a capping layer disposed on an insulating substrate, a trench defined by the...
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US20090273086 |
METHOD OF REDUCING EROSION OF A METAL CAP LAYER DURING VIA PATTERNING IN SEMICONDUCTOR DEVICES
During the patterning of via openings in sophisticated metallization systems of semi-conductor devices, the opening may extend through a conductive cap layer and an appropriate ion bombardment may...
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US20090267208 |
SEMICONDUCTOR PACKAGE HAVING CHIP SELECTION THROUGH ELECTRODES AND STACKED SEMICONDUCTOR PACKAGE HAVING THE SAME
A stacked semiconductor package includes a plurality of stacked semiconductor chips each having a circuit unit, a data pad, and a chip selection pad. The plurality of stacked semiconductor chips...
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US20090261475 |
METHOD FOR FABRICATING A METAL INTERCONNECTION USING A DUAL DAMASCENE PROCESS AND RESULTING SEMICONDUCTOR DEVICE
A semiconductor device includes an interlayer insulating layer including a plurality of trenches connecting to a number of via holes formed on a semiconductor substrate including lower...
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US20090256261 |
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
The reliability of wirings, each of which includes a main conductive film containing copper as a primary component, is improved. On an insulating film including the upper surface of a wiring...
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US20090250820 |
CONFIGURABLE NON-VOLATILE LOGIC STRUCTURE FOR CHARACTERIZING AN INTEGRATED CIRCUIT DEVICE
An integrated circuit (IC) device including a substrate, a plurality of device layers formed over the substrate, and a plurality of multi-level revision (MLR) structures that generate a revision...
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US20090244868 |
Semiconductor device and bonding material
The present invention is directed to enhancing the bonding reliability of a bonding portion between an Al electrode of a semiconductor device and a bonding material having metal particles as a main...
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US20090243117 |
CONTACT STRUCTURE, A SEMICONDUCTOR DEVICE EMPLOYING THE SAME, AND METHODS OF MANUFACTURING THE SAME
A contact structure that includes a first pattern formed on a substrate, wherein the first pattern has a recessed region in an upper surface thereof, a planarized buffer pattern formed on the first...
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US20090243109 |
METAL CAP LAYER OF INCREASED ELECTRODE POTENTIAL FOR COPPER-BASED METAL REGIONS IN SEMICONDUCTOR DEVICES
A conductive cap material for a copper region may be provided with enhanced etch resistivity by taking into consideration the standard electrode potential of one or more of the species contained...
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US20090243076 |
ELECTRONIC SYSTEM MODULES AND METHOD OF FABRICATION
This specification describes techniques for manufacturing an electronic system module. The module includes flexible multi-layer interconnection circuits with trace widths of 5 microns or less. A...
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US20090236723 |
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PACKAGE-IN-PACKAGE AND METHOD OF MANUFACTURE THEREOF
A method of manufacture of an integrated circuit packaging system includes: providing a package substrate, having a component side and a system side; mounting a first integrated circuit die on the...
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US20090230556 |
NONVOLATILE SEMICONDUCTOR MEMORY APPARATUS AND MANUFACTURING METHOD THEREOF
A nonvolatile semiconductor memory apparatus 25 comprises a semiconductor substrate 11 , a lower-layer wire 12 formed on the semiconductor substrate 11 , an upper-layer wire 20 formed above...
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US20090230535 |
SEMICONDUCTOR MODULE
A semiconductor module. In one embodiment, at least two semiconductor chips are placed on a carrier. The at least two semiconductor chips are then covered with a molding material. An exposed...
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US20090230486 |
PIEZOELECTRIC DEVICE AND ELECTRONIC APPARATUS
A piezoelectric device includes an integrated circuit (IC) chip and a piezoelectric resonator element, a part of the piezoelectric resonator element being disposed so as to overlap with a part of...
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US20090212445 |
SEMICONDUCTOR INTEGRATED CIRCUIT
In a semiconductor integrated circuit, a second wiring layer includes a ground conductor having at least one opening formed therein. At least one opening is overlapped by at least one patch...
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US20090212413 |
BALL GRID ARRAY PACKAGE LAYOUT SUPPORTING MANY VOLTAGE SPLITS AND FLEXIBLE SPLIT LOCATIONS
A die package generally including (A) ground paths routing a power ground from a ground power set of contact pads in a first conductive layer to a ground ring in a second conductive layer, (B) core...
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US20090200678 |
Device comprising multi-layered thin film having excellent adhesive strength and method for fabricating the same
A device comprises a multi-layered thin film having excellent adhesion due to the method of fabricating the same. More particularly, the device includes a multi-layered thin film consisting of a...
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US20090200669 |
ENHANCED INTERCONNECT STRUCTURE
The present invention provides a semiconductor interconnect structure with improved mechanical strength at the capping layer/dielectric layer/diffusion barrier interface. The interconnect structure...
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US20090194885 |
SEMICONDUCTOR DEVICE HAVING WIRING LINE AND MANUFACTURING METHOD THEREOF
On the lower surface of a semiconductor construct having an external connection electrode, there are formed an insulating film having a planar size greater than that of the semiconductor construct,...
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US20090194879 |
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
A semiconductor device includes a plurality of first interconnection layers which are provided in an insulating layer and formed in a pattern having a width and space smaller than a resolution...
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US20090184429 |
Integrated Circuit Comprising Conductive Lines and Contact Structures and Method of Manufacturing an Integrated Circuit
An integrated circuit comprises a first conductive lines and second lines as well as contact structures being in contact with the first and second conductive lines. The first conductive lines are...
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US20090184424 |
SEMICONDUCTOR DEVICE AND A METHOD OF MANUFACTURING THE SAME
The production of a crack in an insulating film under an external terminal of a semiconductor device due to external force applied to the external terminal is suppressed or prevented. Over the...
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US20090160070 |
METAL LINE IN A SEMICONDUCTOR DEVICE
A semiconductor having a metal line and a method of manufacturing a metal line in a semiconductor device is disclosed. In one example embodiment, a method of manufacturing a metal line in a...
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US20090146310 |
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
A semiconductor device subjected to an optical annealing process by radiation light whose principal wavelength is 1.5 μm or less includes a circuit pattern region formed on a semiconductor...
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US20090141750 |
SYSTEMS AND METHODS FOR LINK PROCESSING WITH ULTRAFAST AND NANOSECOND LASER PULSES
Systems and methods for processing an electrically conductive link in an integrated circuit use a series of laser pulses having different pulse widths to remove different portions of a target...
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US20090140409 |
SEMICONDUCTOR DEVICE
A semiconductor device includes a substrate having bumps on the backside thereof, a first semiconductor chip mounted on the surface of the substrate, a second semiconductor chip mounted on the...
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US20090134509 |
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH CARRIER AND METHOD OF MANUFACTURE THEREOF
A method of manufacture of an integrated circuit packaging system includes: forming a carrier having a top side and a bottom side; forming an edge terminal pad on the top side and an inner terminal...
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US20090121359 |
SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME
A semiconductor device includes: a semiconductor substrate; a first insulating film (third insulating film 24 ) formed on the semiconductor substrate, having a first trench (second interconnect...
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US20090121355 |
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
A semiconductor device includes a semiconductor substrate, an oxygen-containing insulating film disposed above the above-described semiconductor substrate, a concave portion disposed in the...
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US20090114984 |
POWER DEVICE AND A METHOD FOR PRODUCING A POWER DEVICE
A power device with improved reliability and a method for producing the same is disclosed. One embodiment provides an active area having an electrical power dissipation characteristic, a...
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US20090108413 |
Interlayer Insulating Film, Interconnection Structure, and Methods of Manufacturing the Same
This invention provides an interlayer insulating film for a semiconductor device, which has low permittivity, is free from the evolution of gas such as CFx and SiF 4 and is stable, and a wiring...
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US20090091035 |
Highly integrated and reliable DRAM and its manufacture
A semiconductor device and its manufacture method wherein the semiconductor substrate has first and second insulating films, the first insulating film being an insulating film other than a silicon...
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US20090091018 |
Electronic Component Sealing Substrate, Electronic Component Sealing Substrate to be Divided Into a Plurality of Pieces, Electronic Apparatus Including Electronic Component Sealing Substrate, and Method for Producing Electronic Apparatus
An electronic component sealing substrate capable of configuring an electronic apparatus in which the influence of electromagnetic coupling and radio frequency noises between an electrical...
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US20090078998 |
SEMICONDUCTOR DEVICE HAVING DECREASED CONTACT RESISTANCE
Semiconductor devices having improved contact resistance and methods for fabricating such semiconductor devices are provided. These semiconductor devices include a semiconductor device structure...
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US20090078981 |
SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD THEREFOR
A semiconductor memory device in which a plurality of capacitors each including a columnar lower electrode, a capacitor insulation film and an upper electrode are stacked with interlayer films...
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US20090057911 |
METHOD FOR MANUFACTURING A SEMICONDUCTOR ARRANGEMENT, USE OF A TRENCH STRUCTURE, AND SEMICONDUCTOR ARRANGEMENT
A method for manufacturing a semiconductor arrangement, use of a trench structure, and a semiconductor arrangement is provided that includes a single-crystal semiconductor layer, a conductive...
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US20090051033 |
RELIABILITY IMPROVEMENT OF METAL-INTERCONNECT STRUCTURE BY CAPPING SPACERS
The present invention relates to a metal-interconnect structure for electrically connecting integrated-circuit elements in an integrated-circuit device. It solves several problems of operational...
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US20090032944 |
ELECTRONIC DEVICE, METHOD OF PRODUCING THE SAME, AND SEMICONDUCTOR DEVICE
A semiconductor device includes n 1 first interconnects (n is an integer larger than one) respectively formed on first electrodes and extending over a first resin protrusion, and n 2 second...
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US20090026636 |
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SAME
Semiconductor device has a semiconductor chip embedded in an insulating layer. A semiconductor device comprises a semiconductor chip formed to have external connection pads and a positioning mark...
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US20080308954 |
Semiconductor device and method of forming the same
A semiconductor device includes conductive lines on a substrate, sidewall spacers on sidewalls of the conductive lines, contacts between the conductive lines, the contacts separated from the...
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US20080308943 |
WIRING STRUCTURE AND SEMICONDUCTOR DEVICE, AND THEIR FABRICATION METHODS
A fabrication method for a wiring structure of the present invention includes: a process of forming a conductive wiring layer; a process of forming a wiring pattern on the wiring layer; a process...
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US20080272500 |
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
A semiconductor device according to the present invention has a semiconductor chip provided with an insulating layer formed so as to be thinner in a first secondary-wire-free area than in a first...
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US20080272498 |
Method of fabricating a semiconductor device
A method for fabricating a semiconductor device. A preferred embodiment comprises forming a via in a semiconductor substrate, filling the via with a disposable material such as amorphous carbon,...
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