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US20090294994 |
BOND PAD STRUCTURE
A bond pad structure located over an active circuit structure is disclosed. The bond pad structure includes a bond pad, a passivation layer and a topmost metal layer in the active circuit...
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US20090289346 |
Structure and manufacturing method of chip scale package
A Chip Scale Package (CSP) and a method of forming the same are disclosed. Single chips without the conventional ball mountings, are first attached to an adhesive-substrate (adsubstrate) composite...
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US20090236750 |
Package structure in which coreless substrate has direct electrical connections to semiconductor chip and manufacturing method thereof
A package structure in which a coreless substrate has direct electrical connections to a semiconductor chip and a manufacturing method thereof are disclosed. The method includes the following...
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US20090230560 |
Semiconductor device and manufacturing method thereof
A semiconductor device and manufacturing method thereof improving moisture resistance of a FeRAM. After a probe test using a pad, a metal film is formed to cover the pad in an opening of a...
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US20090206493 |
Flip Chip Interconnection Pad Layout
A flip chip interconnect pad layout has the die signal pads are arranged on the die surface near the perimeter of the die, and the die power and ground pads arranged on the die surface inboard from...
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US20090194889 |
BOND PAD STRUCTURE
A bonding pad structure is provided that includes two conductive layers and a connective layer interposing the two conductive layers. The connective layer includes a contiguous, conductive...
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US20090189298 |
Bonding pad structure and debug method thereof
The bonding pad structure includes a main bonding pad and a blank path. The blank path crosses through the main bonding pad for dividing the main bonding pad into a first sub-bonding pad and a...
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US20090102065 |
BONDING PAD FOR ANTI-PEELING PROPERTY AND METHOD FOR FABRICATING THE SAME
A bonding pad includes an insulation layer with a trench, and a conductive pattern one portion of which is buried into the trench and the other portion of which is formed in a plate shape over the...
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US20090085192 |
Packaging substrate structure having semiconductor chip embedded therein and fabricating method thereof
The present invention relates to a packaging substrate structure having an semiconductor chip embedded therein and a method for manufacturing the same. The structure comprises: a substrate body...
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US20090001541 |
Method and apparatus for stackable modular integrated circuits
Systems and methods for vertically stacking integrated circuit (IC) modules on a motherboard to conserve motherboard space and reduce power consumption are disclosed. IC modules can comprise...
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US20080315420 |
Metal pad formation method and metal pad structure using the same
A metal pad formation method and metal pad structure using the same are provided. A wider first pad metal is formed together with a first metal. A dielectric layer is then deposited thereon. A...
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US20080315423 |
SEMICONDUCTOR DEVICE
A semiconductor device includes a carrier, a chip including a first face having a contact area, where the chip is attached to the carrier such that the contact area faces away from the carrier, a...
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US20080284009 |
Dimple free gold bump for drive IC
A conductive bump structure for an integrated circuit (IC) structure comprises a passivation layer, such as a silicon oxide/silicon nitride stack, that is formed on an upper surface of each of the...
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US20080286968 |
SOLDERABLE TOP METAL FOR SILICON CARBIDE SEMICONDUCTOR DEVICES
A silicon carbide device includes at least one power electrode on a surface thereof, a solderable contract formed on the power electrode, and at least one passivation layer that surrounds the...
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US20080265399 |
Low-cost and ultra-fine integrated circuit packaging technique
A semiconductor package structure and the methods for forming the same are provided. The semiconductor package structure includes an interposer; a first plurality of bonding pads on a side of the...
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US20080258262 |
SEMICONDUCTOR DEVICE WITH IMPROVED PADS
A semiconductor device has: a circuit portion having semiconductor elements formed on a semiconductor substrate; insulating lamination formed above the semiconductor substrate and covering the...
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US20080246125 |
Semiconductor device and method for manufacturing semiconductor device
The present invention is a semiconductor device characterized by including a substrate, an insulating film consisting of a fluorine added carbon film formed on the substrate, a barrier layer...
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US20080237830 |
Semiconductor device
There is provided a semiconductor device whose cost is low and whose case is restrained from breaking. In the semiconductor device having a semiconductor sensor chip, a signal processing circuit...
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US20080237836 |
SEMICONDUCTOR CHIP EMBEDDING STRUCTURE
A semiconductor chip embedding structure is disclosed, including a carrier board having a first and an opposed second surfaces and formed with at least a through hole; a semiconductor chip received...
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US20080237849 |
Method and apparatus providing integrated circuit having redistribution layer with recessed connectors
A method of making a semiconductor die includes forming a trench around a conductive stud extending from the first side to a second side of a substrate to expose a portion of the stud and then...
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US20080230926 |
Surface Treatments for Contact Pads Used in Semiconductor Chip Packagages and Methods of Providing Such Surface Treatments
An inorganic solder mask ( 48 ) for use as a surface treatment in masking a connection conductor ( 32 ) of a semi-conductor chip package ( 10 ) against solder wetting when mounting the chip package...
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US20080197507 |
Electronic package structure and method
An electronic package structure and method use a conductive strip to bond die-to-die, die-to-lead, chip carrier-to-lead, or lead-to-lead. A conductive strip may carry greater current than a bonding...
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US20080197511 |
Bonding pad structure, electronic device having a bonding pad structure and methods of fabricating the same
An electronic device having a bonding pad structure and a method of fabricating the same is provided. The electronic device may include a first bonding pads formed on the substrate. A second...
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US20080197486 |
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
A semiconductor device includes: a semiconductor substrate that has an integrated circuit and an electrode electrically connected to the integrated circuit; a first resin layer that is formed in a...
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US20080197473 |
CHIP HOLDER WITH WAFER LEVEL REDISTRIBUTION LAYER
A chip holder formed of silicon, glass, other ceramics or other suitable materials includes a plurality of recesses for retaining semiconductor chips. The bond pads of the semiconductor chip are...
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US20080194058 |
Method for Manufacturing Passive Device and Semiconductor Package Using Thin Metal Piece
A method for manufacturing passive devices and semiconductor packages using a thin metal piece is provided. According to the method, an adhesive layer is formed on a dummy substrate; a thin metal...
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US20080185732 |
STACKED STRUCTURE USING SEMICONDUCTOR DEVICES AND SEMICONDUCTOR DEVICE PACKAGE INCLUDING THE SAME
This invention provides a semiconductor device. The semiconductor device includes a bonding pad array comprising: a signal bonding pad, a control pin bonding pad and at least one stacking bonding...
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US20080185735 |
Dynamic pad size to reduce solder fatigue
A semiconductor device is provided which comprises a substrate ( 501 ) having a plurality of bond pads ( 503 ) disposed thereon. Each bond pad has a major axis and a minor axis in a direction...
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US20080136033 |
PACKAGING BOARD AND MANUFACTURING METHOD THEREFOR, SEMICONDUCTOR MODULE AND MOBILE APPARATUS
An advantage of the present invention is to suppress moisture infiltrating from a pad electrode portion from spreading over the surface of a wiring pattern and improve the reliability of a...
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US20080122064 |
SEMICONDUCTOR DEVICE
An aspect of the semiconductor device comprising a package substrate which has a plurality of pads to which a power supply voltage is applied on an upper surface thereof, a first memory chip which...
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US20080083992 |
NOVEL BONDING AND PROBING PAD STRUCTURES
A pad structure includes a first metal-containing layer formed over a substrate. A first passivation layer is formed over the first metal-containing layer. The first passivation layer has a first...
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US20080061319 |
SYSTEMS AND METHODS FOR DISTRIBUTING IO IN A SEMICONDUCTOR DEVICE
Various systems and methods for implementing multi-mode semiconductor devices are discussed herein. For example, a multi-mode semiconductor device is disclosed that includes a device package with a...
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US20080042257 |
DIE PAD ARRANGEMENT AND BUMPLESS CHIP PACKAGE APPLYING THE SAME
A bumpless chip package including at least one chip and an interconnection structure is provided. The chip has an active surface and a non-active surface opposite the active surface, and has a die...
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US20080012149 |
Semiconductor chip structure
A semiconductor chip structure includes a top metal layer and an inter-layer dielectric under the top metal layer. The top metal layer includes a bonding pad area and a non-bonding pad area. The...
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