Matches 1 - 50 out of 286 1 2 3 4 5 6 >
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US20090315173 HEAT-TRANSFER STRUCTURE  
An apparatus 100 comprising a first substrate 130 having a first surface 125, a second substrate 132 having a second surface 127 facing the first surface and an array 170 of metallic...
US20090315189 Layered chip package and method of manufacturing same  
A layered chip package includes a main body including a plurality of layer portions, and wiring disposed on a side surface of the main body. Each layer portion includes a semiconductor chip, an...
US20090309202 PACKAGE SUBSTRATE HAVING EMBEDDED SEMICONDUCTOR CHIP AND FABRICATION METHOD THEREOF  
A packaging substrate having a semiconductor chip embedded and a fabrication method thereof are provided. The method includes forming a semiconductor chip in a through cavity of a core board and...
US20090309241 ULTRA THIN DIE ELECTRONIC PACKAGE  
A method for forming an ultra thin die electronic package is provided. The method includes disposing a first polymer film on a first substrate. The method also includes applying a first adhesive...
US20090309204 BALL GRID ARRAY PACKAGE STACKING SYSTEM  
A ball grid array package stacking system includes: providing a base substrate; coupling an integrated circuit to the base substrate; coupling a stacking substrate over the base substrate; mounting...
US20090302457 WIRING SUBSTRATE, MANUFACTURING METHOD THEREOF, SEMICONDUCTOR DEVICE, AND MANUFACTURING METHOD THEREOF  
A wiring substrate is provided, including an insulating resin layer which is provided on both surfaces of a sheet-like fibrous body and with which the sheet-like fibrous body is impregnated, and a...
US20090302463 SEMICONDUCTOR DEVICE HAVING SUBSTRATE WITH DIFFERENTIALLY PLATED COPPER AND SELECTIVE SOLDER  
A semiconductor device having an insulating substrate with differentially plated metal and selective solder. Chip 221 with contact studs 223 is attached onto the traces 203 on tape 101 . The...
US20090303475 Multi-wavelength light source for spectroscopy  
The invention discloses a multi-wavelength semiconductor light source comprising a plurality of semiconductor light sources mounted on a silicon sub-carrier and emitting radiation spanning a...
US20090302456 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE  
To provide a simple method for manufacturing a semiconductor device in which deterioration in characteristics due to electrostatic discharge is reduced, a plurality of element layers each having a...
US20090305467 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE  
An object is to provide a highly reliable semiconductor device that is reduced in thickness and size and has tolerance to external stress and electrostatic discharge. Another object is to prevent...
US20090305463 System and Method for Thermal Optimized Chip Stacking  
A method for thermal optimization comprising the steps of stacking a first chip layer and a second chip layer wherein the second chip layer is rotated in relation to the first chip layer wherein a...
US20090294941 PACKAGE-ON-PACKAGE SYSTEM WITH HEAT SPREADER  
A package-on-package system includes: providing a base substrate; mounting an integrated circuit on the base substrate; positioning a stacking interposer over the integrated circuit; and forming a...
US20090294956 Cooling fin and package substrate comprising the cooling fin and manufacturing method thereof  
Disclosed herein is a cooling fin, which is excellent in cooling performance and is simply manufactured, a package substrate comprising the cooling fin, and a manufacturing method thereof. Fireable...
US20090294914 Semiconductor Device and Method of Forming Through Vias with Reflowed Conductive Material  
A semiconductor device is made by providing a first semiconductor wafer having semiconductor die. A gap is made between the semiconductor die. An insulating material is deposited in the gap. A...
US20090294954 3-D ICs WITH MICROFLUIDIC INTERCONNECTS AND METHODS OF CONSTRUCTING SAME  
Three dimensional integrated circuits with microfluidic interconnects and methods of constructing same are provided. According to some embodiments, and microfluidic integrated circuit system can...
US20090283872 PACKAGE STRUCTURE OF THREE-DIMENSIONAL STACKING DICE AND METHOD FOR MANUFACTURING THE SAME  
This invention provides a package structure of three-dimensional stacking dice and its manufacturing method. This invention employs the Through-Silicon-Vias (TSVs) technology to establish vertical...
US20090283876 ELECTROMAGNETIC INTERFERENCE SHIELD FOR SEMICONDUCTORS USING A CONTINUOUS OR NEAR-CONTINUOUS PERIPHERAL CONDUCTING SEAL AND A CONDUCTING LID  
A semiconductor package structure including a conductive adhesive material which is used to form an electromagnetic interference shield-forming Faraday cage. The Faraday cage incorporates a module...
US20090280604 Heat radiation structure of semiconductor device, and manufacturing method thereof  
The invention of the present application provides a heat radiation structure of a semiconductor device, comprising a substrate having, on a surface thereof, a first area on which the semiconductor...
US20090273067 MULTI-CHIP DISCRETE DEVICES IN SEMICONDUCTOR PACKAGES  
Semiconductor packages that contain multiple dies containing discrete devices and methods for making such devices are described. The semiconductor package contains both a first die containing...
US20090275171 METHODS FOR ASSEMBLING THIN SEMICONDUCTOR DIE  
The invention is based on the discovery that certain self-filleting die attach adhesives are useful in semiconductor die assemblies containing thin die. As used herein, the term...
US20090269885 PACKAGED SEMICONDUCTOR DEVICE WITH DUAL EXPOSED SURFACES AND METHOD OF MANUFACTURING  
The invention claimed is a packaged semiconductor device with dual exposed surfaces and a method of manufacturing the device. A thermal clip and one or multiple source pads are exposed on opposite...
US20090261462 SEMICONDUCTOR PACKAGE WITH STACKED DIE ASSEMBLY  
This application relates to semiconductor packages comprising stacked die assemblies. In some cases, the stacked dies comprise a first die containing gate driver IC that is stacked on a first...
US20090263936 Insulating Liquid Die-Bonding Agent And Semiconductor Device  
An insulating liquid die-bonding agent for bonding a semiconductor-chip-mounting member to an active surface of a semiconductor chip, said agent comprising: (A) a mixture of (a-1) an...
US20090245735 PHOTONIC POWER DEVICES AND METHODS OF MANUFACTURING THE SAME  
A high temperature optoelectronic device package includes a substrate, an optoelectronic die situated on an upper surface of the substrate, a seal surrounding the optoelectronic die and situated on...
US20090243067 MOUNTABLE INTEGRATED CIRCUIT PACKAGE SYSTEM WITH SUBSTRATE  
A mountable integrated circuit package system includes: providing a substrate having an opening provided therein; providing an encapsulated integrated circuit package having an external leadfinger;...
US20090236757 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING  
A semiconductor device and method for manufacturing. One embodiment includes a carrier, a structured layer arranged over the carrier and a semiconductor chip applied to the structured layer. The...
US20090236730 Die substrate with reinforcement structure  
Various semiconductor chip package substrates with reinforcement and methods of making the same are disclosed. In one aspect, a method of manufacturing is provided that includes providing a package...
US20090236754 INTEGRATED CIRCUIT PACKAGE SYSTEM WITH STACKING MODULE  
An integrated circuit package system includes: providing a module substrate having dimension predetermined for attachment adjacent a device; attaching a module die adjacent the module substrate;...
US20090239339 METHOD OF STACKING DIES FOR DIE STACK PACKAGE  
A method of manufacturing a die stack package includes the steps of providing a wafer having a first surface and a second surface, said first surface having a plurality of cut ways thereon, the...
US20090230567 METHOD OF POST-MOLD GRINDING A SEMICONDUCTOR PACKAGE  
A method of grinding a molded semiconductor package to a desired ultra thin thickness without damage to the package is disclosed. Prior to grinding a molded package to a desired package thickness,...
US20090233402 WAFER LEVEL IC ASSEMBLY METHOD  
A wafer level integrated circuit assembly method is conducted as follows. First, a mother device wafer with plural first posts is provided. The first posts are used for electrical connection and...
US20090224412 NON-PLANAR SUBSTRATE STRIP AND SEMICONDUCTOR PACKAGING METHOD UTILIZING THE SUBSTRATE STRIP  
A non-planar substrate strip for semiconductor packages is revealed, primarily comprising a substrate core having an external surface, an external solder mask and a patterned thick solder mask. The...
US20090224361 Semiconductor Package with Stacked Semiconductor Die each Having IPD and Method of Reducing Mutual Inductive Coupling by Providing Selectable Vertical and Lateral Separation Between IPD  
A semiconductor package has first and second semiconductor die mounted to a substrate. The first semiconductor die includes a first inductor coil electrically coupled to the substrate. The second...
US20090218680 PROCESS OF GROUNDING HEAT SPREADER/STIFFENER TO A FLIP CHIP PACKAGE USING SOLDER AND FILM ADHESIVE  
A method of grounding a heat spreader/stiffener to a flip chip package comprising the steps of attaching an adhesive film to a substrate and attaching a stiffener to the adhesive film. The adhesive...
US20090212416 INTEGRATED CIRCUIT PACKAGE AND METHOD OF MANUFACTURING SAME  
An integrated circuit package includes a substrate ( 110, 210 ) having a first surface ( 111, 211 ) and an opposing second surface ( 112, 212 ), and a die platform ( 130, 230 ) adjacent to the...
US20090212390 INDUCTIVELY COUPLED INTEGRATED CIRCUIT AND METHODS FOR USE THEREWITH  
A circuit includes a first integrated circuit or die having a first circuit and a first inductive interface. A second integrated circuit or die has a second circuit and a second inductive...
US20090206473 System and Method for Integrated Waveguide Packaging  
A millimeter wave system or package may include at least one printed wiring board (PWB), at least one integrated waveguide interface, and at least one monolithic microwave integrated circuit...
US20090200650 INTEGRATED CIRCUIT PACKAGE AND A METHOD OF MAKING  
An integrated circuit package includes a substrate and a first semiconductor chip. The first semiconductor chip is provided in a cavity on a first side of the substrate. The package further...
US20090200652 METHOD FOR STACKING CHIPS IN A MULTI-CHIP PACKAGE  
A multi-chip package is provided that has at least a first, second and third chip, each comprising a top and bottom surface. The multi-chip package also has a package substrate for interfacing with...
US20090189292 Integrated Circuit, Semiconductor Module and Method for Manufacturing a Semiconductor Module  
Embodiments of the invention relate to a semiconductor, a semiconductor module and to a method for manufacturing a semiconductor module. In an embodiment of the invention, an integrated circuit...
US20090184416 MCM packages  
An RF/IPD package with improved thermal management is described. The IPD substrate is attached to a system substrate with a thin RF chip mounted in the standoff between the IPD substrate and the...
US20090179327 Packaging structure, method for manufacturing the same, and method for using the same  
A packaging structure applied for a surface mounting process, comprising: a chip module having a packaging surface; and a pre-cured layer formed on the packaging surface of the chip module. As...
US20090181500 Fabrication of Compact Semiconductor Packages  
A wafer-level method of fabricating a chip-to-wafer or wafer-to-wafer semiconductor packages includes etching a cavity into a first semiconductor wafer and etching vias in a bottom of the cavity....
US20090166844 METAL COVER ON FLIP-CHIP MATRIX-ARRAY (FCMX) SUBSTRATE FOR LOW COST CPU ASSEMBLY  
In some embodiments, a metal cover on flip-chip matrix-array (FCMX) substrate for low cost CPU assembly is presented. In this regard, an apparatus is introduced comprising a plurality of integrated...
US20090166857 Method and System for Providing an Aligned Semiconductor Assembly  
A semiconductor assembly is provided that includes a first substrate that has a first surface. A second substrate is coupled to and spaced apart from the first substrate. The second substrate has a...
US20090160482 Formation of a hybrid integrated circuit device  
Formation of a hybrid integrated circuit device ( 400 ) is described. A design for the integrated circuit ( 100 ) is obtained and separated into at least two portions responsive to component sizes....
US20090160046 ELECTRONIC DEVICE AND METHOD  
An electronic device and method is disclosed. In one embodiment, a method includes providing an electrically insulating substrate. A first electrically conductive layer is applied over the...
US20090161709 MULTICHIP PACKAGE, METHODS OF MANUFACTURE THEREOF AND ARTICLES COMPRISING THE SAME  
Disclosed herein is a multichip package comprising an optoelectronics assembly; a socket that houses the optoelectronics assembly; the socket being in electrical communication with the...
US20090163161 SCALABLE RADIO RECEIVER ARCHITECTURE PROVIDING THREE-DIMENSIONAL PACKAGING OF MULTIPLE RECEIVERS  
Methods of forming scalable systems and scalable systems on an integrated circuit (SoC) are provided. First and second radio frequency (RF) systems are disposed on first and second substrates,...
US20090155954 THERMAL ENHANCED LOW PROFILE PACKAGE STRUCTURE AND METHOD FOR FABRICATING THE SAME  
A thermal enhanced low profile package structure and a method for fabricating the same are provided. The package structure typically includes a metallization layer with an electronic component...
Matches 1 - 50 out of 286 1 2 3 4 5 6 >