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US20140124793 SMOOTH DIAMOND SURFACES AND CMP METHOD FOR FORMING  
A method of chemical mechanical polishing (CMP) a diamond containing surface includes providing a slurry including a plurality of particles, at least one oxidizer, and at least one acid, wherein...
US20130062619 EDGE TERMINATION STRUCTURE EMPLOYING RECESSES FOR EDGE TERMINATION ELEMENTS  
Elements of an edge termination structure, such as multiple concentric guard rings, are effectively doped regions in a drift layer. To increase the depth of these doped regions, individual...
US20120181549 STRESSED CHANNEL FET WITH SOURCE/DRAIN BUFFERS  
A method for forming a stressed channel field effect transistor (FET) with source/drain buffers includes etching cavities in a substrate on either side of a gate stack located on the substrate;...
US20150021623 ENHANCED GATE DIELECTRIC FOR A FIELD EFFECT DEVICE WITH A TRENCHED GATE  
The present disclosure relates to a silicon carbide (SiC) field effect device that has a gate assembly formed in a trench. The gate assembly includes a gate dielectric that is an dielectric layer,...
US20150214352 Enhancement Mode Device  
An enhancement mode device includes a floating gate structure. The floating gate structure includes a first bottom dielectric layer, a second bottom dielectric layer on the first bottom dielectric...
US20150041827 BONDING STRUCTURE INCLUDING METAL NANO PARTICLES AND BONDING METHOD USING METAL NANO PARTICLES  
A bonding structure including metal nano particles includes a first member having a metal surface on at least one side, a second member having a metal surface on at least one side, the second...
US20130214289 Short-Resistant Metal-Gate MOS Transistor and Method of Forming the Transistor  
A protective cap is formed on the metal gate of a MOS transistor to protect the metal gate during an etch that forms a source contact opening and a drain contact opening. The protective cap also...
US20070257265 Use of tungsten interlayer to enhance the initial nucleation and conformality of ultrananocrystalline diamond (UNCD) thin films  
Extremely smooth (6 nm roughness) and continuous ultrananocrystalline diamond (UNCD) thin films were achieved by microwave plasma chemical vapor deposition using a thin 10 nm tungsten (W)...
US20130128923 DEVICE FOR RAISING TEMPERATURE AND METHOD FOR TESTING AT ELEVATED TEMPERATURE  
An external DC power supply 2 feeds a power supply voltage to a drain electrode of a MOSFET 10 constituted by silicon carbide (SiC), and a variable bias voltage generated from thus fed power...
US20120126248 MEMBRANE HAVING MEANS FOR STATE MONITORING  
The invention relates to a membrane. Partly permeable membranes often have holes or perforations having a specific diameter to allow substances having a smaller particle diameter to pass through,...
US20130146895 PINCH-OFF CONTROL OF GATE EDGE DISLOCATION  
The embodiments of processes and structures described provide mechanisms for improving the mobility of carriers. A dislocation is formed in a source or drain region between gate structures or...
US20060138430 Heteroisomer boron carbide devices  
Semiconductor devices formed using boron carbide heteroisomer junctions or interfaces are provided. The boron carbide heteroisomer junction devices can be incorporated into diodes and transistors.
US20090173950 CONTROLLING DIAMOND FILM SURFACES AND LAYERING  
A method comprising: providing at least one first diamond film comprising polycrystalline diamond, e.g., nanocrystalline or ultrananocrystalline diamond, disposed on a substrate, wherein the first...
US20100084663 Silicon Carbide Zener Diode  
A silicon carbide Zener diode is a bipolar semiconductor device that has a mesa structure and includes a silicon carbide single crystal substrate of a first conductivity type, formed thereon, a...
US20140225127 MONOCRYSTALLINE SIC SUBSTRATE WITH A NON-HOMOGENEOUS LATTICE PLANE COURSE  
A method is used for producing an SiC volume monocrystal by sublimation growth. During growth, by sublimation of a powdery SiC source material and by transport of the sublimated gaseous components...
US20110024766 ONE HUNDRED MILLIMETER SINGLE CRYSTAL SILICON CARBIDE WAFER  
A method is disclosed for producing a high quality bulk single crystal of silicon carbide in a seeded growth system by reducing the separation between a silicon carbide seed crystal and a seed...
US20070170437 Hierarchical Assembly of Interconnects for Molecular Electronics  
A hierarchical assembly methodology can interconnect individual two- and/or three-terminal molecules with other nanoelements (nanoparticles, nanowires, etc.) to form solution-based suspensions of...
US20140077231 DIAMOND SENSORS, DETECTORS, AND QUANTUM DEVICES  
A thin plate of synthetic single crystal diamond material, the thin plate of synthetic single crystal diamond material having: a thickness in a range 100 nm to 50 μιη; a concentration of quantum...
US20150041829 ELECTRONIC CIRCUIT DEVICE  
A normally-off type silicon carbide junction FET has a problem that the gate thereof is not easy to use due to inferiority in the characteristics of it. This problem occurs because in order to...
US20130056754 ELECTRONIC CIRCUIT DEVICE  
A normally-off type silicon carbide junction FET has a problem that the gate thereof is not easy to use due to inferiority in the characteristics of it. This problem occurs because in order to...
US20110220916 ELECTRONIC CIRCUIT DEVICE  
A normally-off type silicon carbide junction FET has a problem that the gate thereof is not easy to use due to inferiority in the characteristics of it. This problem occurs because in order to...
US20150144964 SILICON CARBIDE EPI-WAFER AND METHOD OF FABRICATING THE SAME  
A method of fabricating an epi-wafer includes providing a wafer in a susceptor, performing a surface treatment on the wafer by heating the susceptor and supplying a surface treatment gas, and...
US20120126247 SELF-POWERED INTEGRATED CIRCUIT WITH MULTI-JUNCTION PHOTOVOLTAIC CELL  
A photovoltaic cell is provided as a composite unit together with elements of an integrated circuit on a common substrate. In a described embodiment, connections are established between a multiple...
US20120175639 TANTALUM CARBIDE, METHOD FOR PRODUCING TANTALUM CARBIDE, TANTALUM CARBIDE WIRING AND TANTALUM CARBIDE ELECTRODE  
It is an object of the present invention to provide a method for manufacturing tantalum carbide which can form tantalum carbide having a prescribed shape using a simple method, can form the...
US20140077230 DEVICE LAYOUT FOR REFERENCE AND SENSOR CIRCUITS  
A band gap reference circuit includes an error-amplifier-based current mirror coupled between a first supply node and a pair of intermediate voltage nodes, and a matched diode pair for providing a...
US20090127566 Method of Selectively Forming Atomically Flat Plane on Diamond Surface, Diamond Substrate Produced by The Method, and Semiconductor Device Using The Same  
[Object] The present invention provides a method of selectively forming a flat plane on an atomic level on a diamond (001), (110) or (111) surface.[Means for Solving Problems]A method of...
US20090127565 P-n junctions on mosaic diamond substrates  
The present invention provides methods of making and using semiconductive single crystal diamond bodies, including semiconductive diamond bodies made by such methods. In one aspect, a method of...
US20140374773 VERTICAL POWER TRANSISTOR WITH BUILT-IN GATE BUFFER  
A vertical power transistor is monolithically packaged on a semiconductor die with gate buffer circuitry. The gate buffer circuitry is adapted to deliver a biasing voltage to a gate contact of the...
US20090140263 METHOD FOR DIAMOND SURFACE TREATMENT AND DEVICE USING DIAMOND THIN FILM  
A method for surface treatment of diamond comprising exposing the surface of diamond to UV light containing wavelengths of 172 nm to 184.9 nm and 253.7 nm at an integrated exposure of 10 to 5,000...
US20130277686 Semiconductor Structure with Metal Gate and Method of Fabricating the Same  
A metal gate process comprises the steps of providing a substrate, forming a dummy gate on said substrate, forming dummy spacers on at least one of the surrounding sidewalls of said dummy gate,...
US20150014706 Vertical Hetero Wide Bandgap Transistor  
A vertical hetero transistor provides a wide bandgap, increases the breakdown voltage or reduces the on resistance of the switching transistor or both.
US20130292704 SILICON CARBIDE STRUCTURE AND METHOD OF PRODUCING THE SAME  
To provide a block-constituted structure of silicon carbide for use as a construction material, and a method of producing the block-constituted silicon carbide structure, which method realizes...
US20150155166 ELIMINATION OF BASAL PLANE DISLOCATIONS IN POST GROWTH SILICON CARBIDE EPITAXIAL LAYERS BY HIGH TEMPERATURE ANNEALING WHILE PRESERVING SURFACE MORPHOLOGY  
A method to remove basal plane dislocations in post growth silicon carbide epitaxial layers by capping post growth silicon carbide epilayers with a graphite cap and annealing the capped silicon...
US20130313575 SEMI-INSULATING SILICON CARBIDE MONOCRYSTAL AND METHOD OF GROWING THE SAME  
A semi-insulating silicon carbide monocrystal and a method of growing the same are disclosed. The semi-insulating silicon carbide monocrystal comprises intrinsic impurities, deep energy level...
US20130341639 DEEP DEPLETED CHANNEL MOSFET WITH MINIMIZED DOPANT FLUCTUATION AND DIFFUSION LEVELS  
CMOS devices are fabricated with a channel layer having minimized dopant fluctuation and diffusion. Embodiments include forming a dummy gate, on a substrate, between a pair of spacers, forming, in...
US20080164802 Diamond Electron Emission Cathode, Electron Emission Source, Electron Microscope, And Electron Beam Exposure Device  
An object of the present invention is to provide an electron emission cathode and an electron emission source using diamond and having a high brightness and a small energy width that are used in...
US20140291696 POWER ELECTRONICS MODULES WITH SOLDER LAYERS HAVING REDUCED THERMAL STRESS  
Power electronics modules having solder layers with reduced thermal-stress are disclosed. In one embodiment, a power electronics module includes a power electronics device having a first surface,...
US20140138709 SILICON CARBIDE SUBSTRATE  
A first circular surface (11) is provided with a first notch portion (N1a) having a first shape. A second circular surface (21) is opposite to the first circular surface and is provided with a...
US20120091472 SILICON CARBIDE SUBSTRATE  
A first circular surface is provided with a first notch portion having a first shape. A second circular surface is opposite to the first circular surface and is provided with a second notch...
US20150097197 FINFET WITH SIGMA CAVITY WITH MULTIPLE EPITAXIAL MATERIAL REGIONS  
Embodiments of the present invention provide an improved finFET and methods of fabrication. A sigma cavity is used with an n-type finFET to allow multiple epitaxial layers to be disposed adjacent...
US20120305940 Defect Free Si:C Epitaxial Growth  
A method and structure are disclosed for a defect free Si:C source/drain in an NFET device. A wafer is accepted with a primary surface of {100} crystallographic orientation. A recess is formed in...
US20130168697 SILICON CARBIDE STRUCTURE AND MANUFACTURING METHOD THEREOF  
A method of manufacturing a silicon carbide structure includes forming a silicon carbide layer by depositing silicon carbide on a base plate by chemical vapor deposition, removing the base plate,...
US20110084285 BASE MATERIAL FOR GROWING SINGLE CRYSTAL DIAMOND AND METHOD FOR PRODUCING SINGLE CRYSTAL DIAMOND SUBSTRATE  
The present invention is a base material for growing a single crystal diamond comprising: at least a single crystal SiC substrate; and an iridium film or a rhodium film heteroepitaxially grown on...
US20120256192 RECESSED TERMINATION STRUCTURES AND METHODS OF FABRICATING ELECTRONIC DEVICES INCLUDING RECESSED TERMINATION STRUCTURES  
An electronic device includes a drift region, a Schottky contact on a surface of the drift region, and an edge termination structure in the drift region adjacent the Schottky contact. The edge...
US20150144963 SILICON CARBIDE EPI-WAFER AND METHOD OF FABRICATING THE SAME  
A method of fabricating an epi-wafer includes providing a wafer in a susceptor, and growing an epi-layer on the wafer. The growing of the epi-layer on the wafer includes a first process of...
US20140008667 METHOD FOR MANUFACTURING A MONOLITHIC LED MICRO-DISPLAY ON AN ACTIVE MATRIX PANEL USING FLIP-CHIP TECHNOLOGY AND DISPLAY APPARATUS HAVING THE MONOLITHIC LED MICRO-DISPLAY  
A high-resolution, Active Matrix (AM) programmed monolithic Light Emitting Diode (LED) micro-array is fabricated using flip-chip technology. The fabrication process includes fabrications of an LED...
US20110127544 GROUP III NITRIDE TEMPLATES AND RELATED HETEROSTRUCTURES, DEVICES, AND METHODS FOR MAKING THEM  
A templated substate includes a base layer, and a template layer disposed on the base layer and having a composition including a single-crystal Group Ill nitride. The template layer includes a...
US20130207123 HIGH CURRENT DENSITY POWER MODULE  
A power module is disclosed that includes a housing with an interior chamber wherein multiple switch modules are mounted within the interior chamber. The switch modules comprise multiple...
US20120161156 TRIBOLOGY COMBINED WITH CORROSION RESISTANCE: A NEW FAMILY OF PVD- AND PACVD COATINGS  
The present invention relates to a coating system on a substrate with improved protection against wear as well as corrosion. According to the invention the substrate is coated with a diamond like...
US20090212301 Double Guard Ring Edge Termination for Silicon Carbide Devices and Methods of Fabricating Silicon Carbide Devices Incorporating Same  
Edge termination structures for semiconductor devices are provided including a plurality of spaced apart concentric floating guard rings in a semiconductor layer that at least partially surround a...