|
Match
|
Document |
Document Title |
|
|
US20130092958 |
NORMALLY-OFF III-NITRIDE METAL-2DEG TUNNEL JUNCTION FIELD-EFFECT TRANSISTORS
Structures, devices and methods are provided for creating heterojunction AlGaN/GaN metal two-dimensional electron gas (2DEG) tunnel-junction field-effect transistors (TJ-FET). In one aspect,...
|
|
|
US20070200115 |
High power silicon carbide (SiC) PiN diodes having low forward voltage drops
Silicon Carbide (SiC) PiN Diodes are provided having a reverse blocking voltage (VR) from about 3.0 kV to about 10.0 kV and a forward voltage (VF) of less than about 4.3 V.
|
|
|
US20130069057 |
WAFER WITH HIGH RUPTURE RESISTANCE
A wafer with high rupture resistance includes a plurality of surfaces, wherein the surfaces include a largest surface having a largest area than others and a side surface connected to the fringe of...
|
|
|
US20080099769 |
PRODUCTION OF AN INTEGRATED CIRCUIT INCLUDING ELECTRICAL CONTACT ON SiC
Production of an integrated circuit including an electrical contact on SiC is disclosed. One embodiment provides for production of an electrical contact on an SiC substrate, in which a conductive...
|
|
|
US20110101377 |
HIGH TEMPERATURE ION IMPLANTATION OF NITRIDE BASED HEMTS
A method is disclosed for forming a high electron mobility transistor. The method includes the steps of implanting a Group III nitride layer at a defined position with ions that when implanted...
|
|
|
US20120211769 |
Sic single crystal wafer and process for production thereof
A SiC single crystal wafer on which a good quality epitaxial film by suppressing defects derived from the wafer can be grown has an affected surface layer with a thickness of at most 50 nm and a...
|
|
|
US20090072241 |
GRID-UMOSFET WITH ELECTRIC FIELD SHIELDING OF GATE OXIDE
A trench metal oxide semiconductor field effect transistor or UMOSFET, includes a buried region that extends beneath the trench and beyond a corner of the trench. The buried region is tied to a...
|
|
|
US20110114968 |
Integrated Nitride and Silicon Carbide-Based Devices
A monolithic electronic device includes a first nitride epitaxial structure including a plurality of nitride epitaxial layers. The plurality of nitride epitaxial layers include at least one common...
|
|
|
US20100059762 |
HEAT REMOVAL FACILITATED WITH DIAMOND-LIKE CARBON LAYER IN SOI STRUCTURES
Described are Silicon-on-Insulator devices containing a diamond-like carbon layer, methods of making the Silicon-on-Insulator devices, and methods of using the Silicon-on-Insulator devices.
|
|
|
US20100187544 |
FABRICATING A GALLIUM NITRIDE LAYER WITH DIAMOND LAYERS
In one aspect, a method includes fabricating a gallium nitride (GaN) layer with a first diamond layer having a first thermal conductivity and a second diamond layer having a second thermal...
|
|
|
US20090194773 |
GALLIUM NITRIDE MATERIAL DEVICES INCLUDING DIAMOND REGIONS AND METHODS ASSOCIATED WITH THE SAME
Gallium nitride material structures are provided, as well as devices and methods associated with such structures. The structures include a diamond region which may facilitate conduction and removal...
|
|
|
US20090272982 |
TRENCH GATE TYPE SEMICONDUCTOR DEVICE AND METHOD OF PRODUCING THE SAME
A method of producing a trench gate type MOSFET is provided in which each intersection trench is formed as a two-stage trench structure. A gate trench is backfilled with a mask material and the...
|
|
|
US20110012130 |
High Breakdown Voltage Wide Band-Gap MOS-Gated Bipolar Junction Transistors with Avalanche Capability
High power wide band-gap MOSFET-gated bipolar junction transistors (“MGT”) are provided that include a first wide band-gap bipolar junction transistor (“BJT”) having a first collector, a first e...
|
|
|
US20120153298 |
EPITAXIAL GROWTH SYSTEM FOR FAST HEATING AND COOLING
A system for crystal growth having rapid heating and cooling. A fluid-cooling jacket having a reflective shield contained therein is disposed around a heating cylinder in which crystal growth takes...
|
|
|
US20120319132 |
SPLIT-GATE STRUCTURE IN TRENCH-BASED SILICON CARBIDE POWER DEVICE
An integrated structure includes a plurality of split-gate trench MOSFETs. A plurality of trenches is formed within the silicon carbide substrate composition, each trench is lined with a...
|
|
|
US20120326162 |
PROCESS FOR FORMING REPAIR LAYER AND MOS TRANSISTOR HAVING REPAIR LAYER
A repair layer forming process includes the following steps. Firstly, a substrate is provided, and a gate structure is formed on the substrate, wherein the gate structure at least includes a gate...
|
|
|
US20090289263 |
System and Method for Emitter Layer Shaping
Embodiments of an LED disclosed has an emitter layer shaped to a controlled depth or height relative to a substrate of the LED to maximize the light output of the LED and to achieve a desired...
|
|
|
US20120298991 |
MULTILAYER SUBSTRATE HAVING GALLIUM NITRIDE LAYER AND METHOD FOR FORMING THE SAME
The present invention provides a method for forming a multilayer substrate having a gallium nitride layer, wherein a mesh layer having a plurality of openings is formed on a substrate, and a buffer...
|
|
|
US20090218579 |
SUBSTRATE HEATING APPARATUS, SEMICONDUCTOR DEVICE MANUFACTURING METHOD, AND SEMICONDUCTOR DEVICE
In a substrate heating apparatus, thermoelectrons generated by a filament (132) in a vacuum heating vessel (103) are accelerated to collide against a conductive heater (131) which forms one surface...
|
|
|
US20110198615 |
High-Sensitivity, High-Resolution Detector Devices and Arrays
Avalanche amplification structures including electrodes, an avalanche region, a quantifier, an integrator, a governor, and a substrate arranged to detect a weak signal composed of as few as several...
|
|
|
US20100078652 |
DIAMOND ELECTRONIC DEVICES INCLUDING A SURFACE AND METHODS FOR THEIR MANUFACTURE
The present invention relates to a diamond electronic device comprising a functional surface formed by a planar surface of a single crystal diamond, the planar surface of the single crystal diamond...
|
|
|
US20100051964 |
METHOD FOR PREPARING A SEMICONDUCTOR ULTRANANOCRYSTALLINE DIAMOND FILM AND A SEMICONDUCTOR ULTRANANOCRYSTALLINE DIAMOND FILM PREPARED THEREFROM
A method for preparing a semiconductor ultrananocrystalline diamond (UNCD) film includes doping an UNCD film with an ion source at a dose not less than 1014 ions/cm2 through ion implantation, and...
|
|
|
US20120126243 |
TRANSISTOR INCLUDING SHALLOW TRENCH AND ELECTRICALLY CONDUCTIVE SUBSTRATE FOR IMPROVED RF GROUNDING
Disclosed is an RF power FET or HEMT including an electrically-conductive substrate, a grounding metallization layer disposed on a bottom surface of the electrically-conductive substrate, an active...
|
|
|
US20110049532 |
SILICON CARBIDE DUAL-MESA STATIC INDUCTION TRANSISTOR
A dual-mesa static induction transistor (SIT) structure includes a silicon carbide substrate having a layer arrangement formed thereon. Laterally spaced ion implanted gate regions are defined in...
|
|
|
US20060091402 |
Silicon carbide single crystal, silicon carbide substrate and manufacturing method for silicon carbide single crystal
SiC single crystal that includes a first dopant functioning as an acceptor, and a second dopant functioning as a donor is provided, where the content of the first dopant is no less than 5×1015 ...
|
|
|
US20080142811 |
MOSFET devices and methods of fabrication
A vertical MOSFET is disclosed. The MOSFET includes a gate dielectric region, a drift region having a drift region dopant concentration profile of a first conductivity type, and a JFET region...
|
|
|
US20110266556 |
METHOD FOR CONTROLLED GROWTH OF SILICON CARBIDE AND STRUCTURES PRODUCED BY SAME
A method for controlled growth of silicon carbide and structures produced by the method are disclosed. A crystal of silicon carbide (SiC) can be grown by placing a sacrificial substrate in a growth...
|
|
|
US20110064105 |
SILICON CARBIDE ON DIAMOND SUBSTRATES AND RELATED DEVICES AND METHODS
A high power, wide-bandgap device is disclosed that exhibits reduced junction temperature and higher power density during operation and improved reliability at a rated power density. The device...
|
|
|
US20100264426 |
DIAMOND CAPACITOR BATTERY
In one embodiment, a charge storage device can include: a first node having a plurality of n-type diamond layers connected together; and a second node having a plurality of p-type diamond layers...
|
|
|
US20100295059 |
SIC SINGLE-CRYSTAL SUBSTRATE AND METHOD OF PRODUCING SIC SINGLE-CRYSTAL SUBSTRATE
The invention provides a high-quality SiC single-crystal substrate, a seed crystal for producing the high-quality SiC single-crystal substrate, and a method of producing the high-quality SiC...
|
|
|
US20100032685 |
MESA TERMINATION STRUCTURES FOR POWER SEMICONDUCTOR DEVICES AND METHODS OF FORMING POWER SEMICONDUCTOR DEVICES WITH MESA TERMINATION STRUCTURES
An electronic device includes a drift layer having a first conductivity type, a buffer layer having a second conductivity type, opposite the first conductivity type, on the drift layer and forming...
|
|
|
US20060261349 |
SINGLE CRYSTAL DIAMOND ELECTROCHEMICAL ELECTRODE
An electrolytic cell includes a container for holding an electrolyte. A conductively doped single crystal diamond anode electrode is positioned to be disposed within the electrolyte, as is a...
|
|
|
US20120132923 |
SUBSTRATE FOR INTEGRATED CIRCUIT AND METHOD FOR FORMING THE SAME
The present invention relates to substrates for ICs and method for forming the same. The method comprises the steps of: forming a hard mask layer on the bulk silicon material; etching the hard mask...
|
|
|
US20090085044 |
SILICON CARBIDE SEMICONDUCTOR SUBSTRATE AND SILICON CARBIDE SEMICONDUCTOR DEVICE BY USING THEREOF
A manufacturing method is provided for a silicon carbide semiconductor substrate adapted for reduced basal plane dislocations in a silicon carbide epitaxial layer. Between a silicon carbide...
|
|
|
US20130069081 |
Layout Method To Minimize Context Effects and Die Area
An integrated circuit with an active geometry with a wide active region and with a narrow active region with at least one jog where said wide active region transitions to said narrow active region...
|
|
|
US20100038653 |
DIAMOND ELECTRONIC DEVICES AND METHODS FOR THEIR MANUFACTURE
The present invention relates to a diamond electronic device comprising a functional interface between two solid materials, wherein the interface is formed by a planar first surface of a first...
|
|
|
US20120098599 |
ENHANCEMENT MODE HEMT FOR DIGITAL AND ANALOG APPLICATIONS
An enhancement mode (E-mode) HEMT is provided that can be used for analog and digital applications. In a specific embodiment, the HEMT can be an AlN/GaN HEMT. The subject E-mode device can be...
|
|
|
US20110220915 |
Off-Axis Silicon Carbide Substrates
A method of epitaxial growth of a material on a crystalline substrate includes selecting a substrate having a crystal plane that includes a plurality of terraces with step risers that join adjacent...
|
|
|
US20110012129 |
High-Gain Wide Bandgap Darlington Transistors and Related Methods of Fabrication
A packaged power electronic device includes a wide bandgap bipolar driver transistor having a base, a collector, and an emitter terminal, and a wide bandgap bipolar output transistor having a base,...
|
|
|
US20120267632 |
SELECT DEVICES
Methods, devices, and systems are provided for a select device that can include a semiconductive stack of at least one semiconductive material formed on a first electrode, where the semiconductive...
|
|
|
US20110316494 |
SWITCHING POWER SUPPLY DEVICE, SWITCHING POWER SUPPLY CIRCUIT, AND ELECTRICAL EQUIPMENT
According to an embodiment of the invention, there is provided a switching power supply device including an integrated body and a plurality of external terminals. In the integrated body, a first...
|
|
|
US20110204382 |
LAYERED STRUCTURES COMPRISING SILICON CARBIDE LAYERS, A PROCESS FOR THEIR MANUFACTURE AND THEIR USE
A layered structure comprising in this order: (A) a silicon carbide layer, (B) at least one stratum (b1) located at least one major surface of the silicon carbide layer (A), (b2) chemically bonded...
|
|
|
US20090300805 |
Photon-Emission Scanning Tunneling Microscopy
The present invention relates to an indirect-gap semiconductor substrate, the gap being greater than that of silicon and preferably greater than 1.5 eV, to its use for imaging a specimen by...
|
|
|
US20130082237 |
ULTRAVIOLET LIGHT EMITTING DEVICES HAVING ENHANCED LIGHT EXTRACTION
Light emitting devices having an enhanced degree of polarization, PD, and methods for fabricating such devices are described. A light emitting device may include a light emitting region that is...
|
|
|
US20090014730 |
SILICON CARBIDE TRANSISTORS AND METHODS FOR FABRICATING THE SAME
An exemplary method for forming an insulator layer over a silicon carbide substrate includes providing a silicon carbide substrate and anodizing the silicon carbide substrate in a liquid ambient at...
|
|
|
US20100258786 |
SELF-ASSEMBLED ORGANIC MONOLAYERS ON GRAPHENE AND METHODS OF MAKING AND USING
Self-assembled organic monolayers on epitaxial graphene are described. The organic molecules are perylene derivatives including 3,4,9,10-perylene-tetracarboxylic dianhydride (PTCDA) molecules...
|
|
|
US20110260163 |
PERMEABLE DIAPHRAGM PIEZORESISTIVE BASED SENSORS
An improved piezoresistive-based sensor (78) can include a cavity (66) in a substantially solid substrate (68). A reactive agent can optionally be present in the cavity (66). A flexible machined...
|
|
|
US20100019378 |
SEMICONDUCTOR MODULE AND A METHOD FOR PRODUCING AN ELECTRONIC CIRCUIT
A semiconductor module has at least one die, made of silicon carbide, in which semiconductor components are patterned. The die includes at least one exposed surface for contacting an external heat...
|
|
|
US20090134403 |
DIAMOND ULTRAVIOLET SENSOR
In a conventional ultraviolet sensing device using a diamond semiconductor in a light-receiving unit, an Au-based electrode material is used for both a rectifier electrode and an ohmic electrode....
|
|
|
US20060125057 |
Method for the production of a composite sicoi-type substrate comprising an epitaxy stage
The invention relates to an SiCOI type composite substrate manufacturing method comprising the following steps: supply of an initial substrate comprising an Si or SiC support (1) bearing a layer...
|