Matches 1 - 50 out of 236 1 2 3 4 5 >


Match Document Document Title
US20120248594 JUNCTION BOX AND MANUFACTURING METHOD THEREOF  
The present disclosure relates to a junction box and a manufacturing method thereof. The junction box includes terminal member to which electric energy is supplied, a diode provided to the...
US20120074558 Circuit Board Packaged with Die through Surface Mount Technology  
A package of a circuit board and a die are packed through surface mount technology (SMT). The shortest circuit is formed with at a low cost. Thus, the package can work in high speed and high...
US20080017970 Brick type stackable semiconductor package  
A brick-type stackable semiconductor package primarily comprises a substrate, at least a memory chip and an encapsulant. The memory chip is disposed on an inner surface of the substrate and is...
US20090008768 SEMICONDUCTOR PACKAGE SYSTEM WITH PATTERNED MASK OVER THERMAL RELIEF  
A semiconductor package system including: providing a substrate having a thermal relief thereon; depositing a mask on the substrate and the thermal relief, the mask deposited on the thermal relief...
US20100314748 Chip packaging method and structure thereof  
The present invention relates to a chip packaging method and structure, in which bonding pads provided on the chip are connected by a plurality of metal wires via bonding, each of the metal wires...
US20100019375 Housing for a semiconductor component  
A housing for a semiconductor component, in which the housing has a plurality of pins which are provided at the edge of the housing at distances, the pins each having a width, a thickness and a...
US20110012249 IC CHIP PACKAGE HAVING IC CHIP WITH OVERHANG AND/OR BGA BLOCKING UNDERFILL MATERIAL FLOW AND RELATED METHODS  
An IC chip package, in one embodiment, may include an IC chip including an upper surface including an overhang extending beyond a sidewall of the IC chip, and underfill material about the sidewall...
US20060125079 High density package interconnect wire bond strip line and method therefor  
In an example embodiment, an integrated circuit (105) is placed in a package (100), the package having signal pad connections, power connections, and ground connections. A lower strip line (110)...
US20100013084 Surface mount package with high thermal conductivity  
A package for use in encapsulating an electronic device is disclosed. In some embodiments, the package includes the following: a dielectric frame having first and second sides, an aperture, a...
US20130093074 MULTI-DIE INTEGRATED CIRCUIT STRUCTURE WITH HEAT SINK  
An integrated circuit structure can include a first die including a first surface and a second surface and a second die including a first surface and a second surface. The first surface of the...
US20080073771 Semiconductor package and semiconductor system in package using the same  
Disclosed are a semiconductor package and semiconductor system in package using the same. The semiconductor package includes: a printed circuit board (PCB); a semiconductor die disposed on the PCB...
US20150243612 CHIP PARTS AND METHOD FOR MANUFACTURING THE SAME, CIRCUIT ASSEMBLY HAVING THE CHIP PARTS AND ELECTRONIC DEVICE  
A chip part according to the present invention includes a substrate having a penetrating hole, a pair of electrodes formed on a front surface of the substrate and including one electrode...
US20060055024 Adapted leaded integrated circuit module  
An interposer is provided having an array of surface mount pads along the upper side and an array of BGA (ball grid array) contacts on the lower side. A module of one or more leaded packaged ICs...
US20050139984 Package element and packaged chip having severable electrically conductive ties  
According to one aspect of the invention, a capped chip is provided which includes a chip having a front surface, a back surface opposite the front surface and a plurality of bond pads exposed at...
US20120241937 PACKAGE STRUCTURE HAVING MICRO-ELECTROMECHANICAL ELEMENT  
Proposed is a package structure having a micro-electromechanical (MEMS) element, including a chip having a plurality of electrical connecting pads and a MEMS element formed thereon; a lid disposed...
US20130043580 DIODE STRUCTURE  
A diode structure includes a body, a first electrode, and a second electrode. The body has a longitudinal length and a transverse length. The first electrode has an end extending into the body...
US20120074557 Integrated Circuit Package Lid Configured For Package Coplanarity  
An integrated circuit package apparatus comprises a packaging substrate, an integrated circuit coupled to an upper side of the packaging substrate, an array of contacts coupled to an underside of...
US20070029662 Semiconductor device having termination circuit line  
A semiconductor device may have a plurality of dielectric layers and at least one termination circuit line between the dielectric layers. The termination circuit lines may be formed over the...
US20080246139 Polar hybrid grid array package  
A grid array package includes a rectangular pattern of electrical contacts around a perimeter of the package. The grid array package also includes a polar pattern of electrical contacts inside of,...
US20090127694 SEMICONDUCTOR MODULE AND IMAGE PICKUP APPARATUS  
A semiconductor module including multiple semiconductor devices prevents a signal that flows through a bonding wire connected to one semiconductor device from acting as noise which affects the...
US20110285009 INTEGRATED CIRCUIT PACKAGING SYSTEM WITH DUAL SIDE CONNECTION AND METHOD OF MANUFACTURE THEREOF  
A method of manufacture of an integrated circuit packaging system includes: forming a first terminal; connecting an integrated circuit to the first terminal; forming a second terminal connected...
US20080246136 Chips having rear contacts connected by through vias to front contacts  
A microelectronic unit is provided in which front and rear surfaces of a semiconductor element may define a thin region which has a first thickness and a thicker region having a thickness at least...
US20140217572 Heat Sink Package  
Provided are a heat sink package in which a semiconductor package and a heat sink are bound to each other and a method of fabricating the same. The heat sink package includes a heat sink having a...
US20110140265 Packaging of Silicon Wafers and Mating Pieces  
By creating a package (MVLC) that has a redundant set of pins, twice as many points of contact are generated. More contacts create more routing and component placement options. Incorporating slots...
US20110089557 Area reduction for die-scale surface mount package chips  
Using side-wall conductor leads to form package level conductor leads for active circuits manufactured on silicon substrate, the preferred embodiments of the present invention significantly...
US20110215462 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF  
A method of manufacturing semiconductor devices is provided, in which a resin sealing structure includes an interconnection substrate board, semiconductor chips, a heat radiation plate, and...
US20080315397 DIE MOUNTING STRESS ISOLATOR  
One method of the present invention includes preparing a die with traces and pads as desired for the intended use of the die. A MEMS device is mounted to the die. The die is then mounted to a...
US20150235935 SEMICONDUCOR DEVICE AND METHOD OF MANUFACTURING THE SAME  
A method of making a semiconductor device is characterized by the step of attaching a chip-on-interposer subassembly to a heat spreader with the chip inserted into a cavity of the heat spreader...
US20100301469 INTEGRATED CIRCUIT PACKAGING SYSTEM WITH INTERPOSER INTERCONNECTIONS AND METHOD OF MANUFACTURE THEREOF  
A method of manufacture of an integrated circuit packaging system includes: providing an integrated circuit; mounting a routing structure having a functional side above the integrated circuit;...
US20080237834 CHIP PACKAGING STRUCTURE AND CHIP PACKAGING PROCESS  
A chip packaging structure comprising a chip, a plurality of conductive pillars surrounding the chip, an encapsulation encapsulating the chip and the conductive pillars, and a connecting layer is...
US20080055291 CHIP FILM PACKAGE AND DISPLAY PANEL ASSEMBLY HAVING THE SAME  
A chip film package which can achieve a fine pitch and a display panel assembly having the same are provided. The chip film package includes a base film made of an insulating material, a wire...
US20110057302 IMPEDANCE OPTIMIZED CHIP SYSTEM  
A high bandwidth circuit is segmented into a plurality of portions, each portion for implementation on a corresponding semiconductor chip, an arrangement of one or more die bond pads for each...
US20100244233 Chip stack package and method of fabricating the same  
Provided is a chip stack package and a method of manufacturing the same. A chip stack package may include a base chip including a base substrate, a base through via electrode penetrating the base...
US20090045501 STRUCTURE ON CHIP PACKAGE TO SUBSTANTIALLY MATCH STIFFNESS OF CHIP  
Chip packages and a related method are disclosed that provide a structure on a side opposite a chip on a carrier of a chip package to substantially match a stiffness of the chip. In one...
US20100013085 POWER SEMICONDUCTOR DEVICE  
A power semiconductor device includes power semiconductor elements joined to wiring patterns of a circuit substrate, cylindrical external terminal communication sections, and wiring means for...
US20110108976 STACKED INTEGRATED CIRCUIT AND PACKAGE SYSTEM AND METHOD FOR MANUFACTURING THEREOF  
A method for manufacturing a stacked integrated circuit and package system includes: attaching a high temperature resistant layer on a top substrate; mounting a first top integrated circuit on the...
US20060138650 Integrated circuit packaging device and method for matching impedance  
An integrated circuit device is provided. The integrated circuit includes an integrated circuit chip (110) having a chip input/output element (240); a packaging component (220) having a package...
US20090045502 CHIP SCALE PACKAGE WITH THROUGH-VIAS THAT ARE SELECTIVELY ISOLATED OR CONNECTED TO THE SUBSTRATE  
A semiconductor chip scale package formed with through-vias, which can be either isolated or electrically connected to a substrate, and a method of producing the semiconductor chip scale package...
US20110057301 SEMICONDUCTOR PACKAGE  
A semiconductor package includes a patterned metal foil, a chip, wires, a patterned dielectric layer, an adhesive layer, and a molding compound. The patterned metal foil has a first surface and a...
US20100077607 Assembly Techniques for Electronic Devices Having Compact Housing  
Improve techniques for assembling electronic devices within housings are disclosed. The improved techniques enable distinct electrical components of an assembly to be separately inserted into a...
US20110037163 DEVICE INCLUDING A RING-SHAPED METAL STRUCTURE AND METHOD  
A device includes a semiconductor chip with a ring-shaped metal structure extending along the contour of a first main surface of the semiconductor chip. An encapsulation body encapsulates the...
US20100164083 PROTECTIVE THIN FILM COATING IN CHIP PACKAGING  
A protective thin film coating for device packaging. A dielectric thin film coating is formed over die and package substrate surfaces prior to applying a molding compound. The protective thin film...
US20120086115 INTEGRATED CIRCUIT PACKAGING SYSTEM WITH INTERPOSER INTERCONNECTIONS AND METHOD OF MANUFACTURE THEREOF  
A method of manufacture of an integrated circuit packaging system includes: providing an integrated circuit; mounting a routing structure having a functional side above the integrated circuit;...
US20070170577 Semiconductor Device with Surface-Mountable External Contacts and Method for Manufacturing the Same  
A semiconductor device includes surface-mountable external contacts on an underside of the semiconductor device, wherein the external contacts are arranged on external contact pads and surrounded...
US20090012439 Attachment Member for Semiconductor Sensor Device  
A semiconductor sensor device is electrically coupled to an object. An attachment member attaches the semiconductor sensor device to the object. The attachment member comprises a first conductive...
US20100213600 Apparatus having thermal-enhanced and cost-effective 3D IC integration structure with through silicon via interposers  
An apparatus having a three-dimensional integrated circuit structure is described herein. The apparatus include an interposer for carrying a plurality of high and low-power chips. The high-power...
US20070155048 Methods for packaging microelectronic devices and microelectronic devices formed using such methods  
Methods for packaging microelectronic devices and microelectronic devices formed using such methods are disclosed herein. One aspect of the invention is directed toward a method for packaging a...
US20100065960 RESIN SHEET, CIRCUIT DEVICE AND METHOD OF MANUFACTURING THE SAME  
Provided is a circuit device manufacturing method for coating a bottom surface of a circuit board with a thin coating of sealing resin. In the present invention, a circuit board having a circuit...
US20090065919 SEMICONDUCTOR PACKAGE HAVING RESIN SUBSTRATE WITH RECESS AND METHOD OF FABRICATING THE SAME  
In one embodiment, a semiconductor package disclosed herein can be generally characterized as including a resin substrate having a first recess, a first interconnection disposed on a surface of...
US20090302453 CONTACT PADS FOR SILICON CHIP PACKAGES  
A method for manufacturing a silicon chip package for a circuit board assembly provides a package with a silicon chip and an array of first contact pads that are provided by a first conductive...

Matches 1 - 50 out of 236 1 2 3 4 5 >