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Document |
Document Title |
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US20100127356 |
STRUCTURES AND METHODS FOR REDUCING JUNCTION LEAKAGE IN SEMICONDUCTOR DEVICES
Structures and method for reducing junction leakage in semiconductor devices. The die can include a substrate having a cut edge, a first region of first conductivity type within the substrate and... |
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US20100127355 |
SEMICONDUCTOR DEVICE AND METHOD
A semiconductor device and method. One embodiment provides a semiconductor substrate having a plurality of cut regions. A metal layer is located within a cut region. The metal layer includes a... |
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US20100102318 |
Semiconductor device, semiconductor module, and electronic apparatus including process monitoring pattern overlapping with I/O pad
A semiconductor device includes a process monitoring pattern overlapping with an input/output (I/O) pad. The semiconductor device may include a semiconductor substrate having a cell array region... |
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US20090294913 |
Method for manufacturing semiconductor chip and semiconductor device
An improved yield of chips is realized by reducing the width of dicing streets on the front surface side of a semiconductor wafer. A method for semiconductor chip, divided a semiconductor wafer 10... |
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US20080185689 |
Semiconductor device, method of manufacturing semiconductor device, and electronic apparatus
A semiconductor device includes a substrate having a resin layer on at least a surface thereof; a thin-film circuit layer provided on the substrate, and a reinforcing section provided on the... |
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US20080128865 |
Carrier structure embedded with semiconductor chip and method for fabricating thereof
A carrier structure embedded with semiconductor chips is disclosed, which comprises a core board and a plurality of semiconductor chips mounted therein. The core board comprises two metal plates... |
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US20080122039 |
INTERGRATED CIRCUIT DEVICE, CHIP, AND METHOD OF FABRICATING THE SAME
A method of manufacturing an integrated circuit (IC) chip is provided. The method includes the following steps. First, a substrate is provided. The substrate is divided into an internal region and... |
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US20080042155 |
Semiconductor device, LED head and image forming apparatus
A semiconductor device is manufactured using dicing of a semiconductor wafer. The semiconductor device includes a substrate, a base insulating layer formed on the substrate, a semiconductor... |
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US20170186725 |
SEMICONDUCTOR DEVICE MANUFACTURING METHOD AND SEMICONDUCTOR WAFER
A semiconductor device manufacturing method improves the yield of manufacturing semiconductor devices. There are provided an insulating film for covering multiple bonding pads, a first protective... |
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US20170179046 |
HIGH YIELD SUBSTRATE ASSEMBLY
In accordance with a first method embodiment, a plurality of piggyback substrates are attached to a carrier substrate. The edges of the plurality of the piggyback substrates are bonded to one... |
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US20170179044 |
INTEGRATED CIRCUIT
An integrated circuit includes a scribe line, a bonding pad structure and an extension pad structure. The scribe line is disposed on a substrate, and the bonding pad structure and the extension... |
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US20170162463 |
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
A semiconductor device includes a semiconductor chip having a passivation film, a stress relieving layer provided on the passivation film, and a groove formed in a periphery of a surface of the... |
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US20170154818 |
METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, SEMICONDUCTOR SUBSTRATE, AND SEMICONDUCTOR DEVICE
A method of manufacturing a semiconductor device includes the steps of preparing a semiconductor substrate including a semiconductor layer having a first main surface and a second main surface... |
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US20170148742 |
SEMICONDUCTOR CHIP, METHOD OF MANUFACTURING THE SEMICONDUCTOR CHIP, AND SEMICONDUCTOR PACKAGE AND DISPLAY APPARATUS INCLUDING THE SEMICONDUCTOR CHIP
A semiconductor chip having an improved structure without an investment in photolithography equipment, a method of manufacturing the semiconductor chip, and a semiconductor package and a display... |
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US20170148697 |
SEMICONDUCTOR DEVICE AND METHOD OF MAKING A SEMICONDUCTOR DEVICE
A semiconductor device and a method of making the same. The device includes a semiconductor substrate having a major surface, a backside and side surfaces extending between the major surface and... |
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US20170133271 |
Method to produce a semiconductor wafer for versatile products
Aspects of the disclosure provide a method for semiconductor wafer manufacturing. The method includes utilizing a subset of lower level masks in a mask set to form multiple modular units of lower... |
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US20170125315 |
System and Method for Dual-Region Singulation
A semiconductor die includes a semiconductor circuit disposed within or over a substrate. A conductive contact pad is disposed over the substrate outside the semiconductor circuit. A floating... |
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US20170092540 |
PLASMA DICING WITH BLADE SAW PATTERNED UNDERSIDE MASK
Consistent with an example embodiment, there is a method for preparing an integrated circuit (IC) device from a wafer substrate, the wafer substrate having a top-side surface with a plurality of... |
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US20170069578 |
Ultra-Thin Semiconductor Component Fabrication Using a Dielectric Skeleton Structure
In one implementation, a method for forming ultra-thin semiconductor components includes fabricating multiple devices including a first device and a second device in a semiconductor wafer, and... |
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US20170033032 |
SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THE SAME, AND SEMICONDUCTOR PACKAGES INCLUDING THE SEMICONDUCTOR DEVICES
A semiconductor device includes a substrate having a die region and a scribe region surrounding the die region, a plurality of via structures penetrating through the substrate in the die region, a... |
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US20170018512 |
SEMICONDUCTOR DEVICE
The present disclosure provides a technique for improving the reliability of a semiconductor device where spreading of cracking that occurs at the time of dicing to a seal ring can be restricted... |
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US20160379884 |
Method of Dicing a Wafer
A method of dicing a wafer includes providing a wafer and etching the wafer to singulate die between kerf line segments defined within an interior region of the wafer and to singulate a plurality... |
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US20160365318 |
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
A semiconductor device includes an integrated circuit, at least one outer seal ring, and at least one inner seal ring. The outer seal ring surrounds the integrated circuit. The outer seal ring... |
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US20160358863 |
METHOD OF MANUFACTURING SEMICONDUCTOR CHIP, SEMICONDUCTOR CHIP, AND SEMICONDUCTOR DEVICE
A method of manufacturing a semiconductor chip according to an embodiment includes forming on a semiconductor substrate a plurality of etching masks each including a protection film to demarcate a... |
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US20160343800 |
METHOD OF FORMING A SEMICONDUCTOR DIE
In one embodiment, semiconductor die having non-rectangular shapes and die having various different shapes are formed and singulated from a semiconductor wafer. |
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US20160343574 |
Segmented Edge Protection Shield
A segmented edge protection shield for plasma dicing a wafer. The segmented edge protection shield includes an outer structure and a plurality of plasma shield edge segments. The outer structure... |
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US20160336211 |
BONDING STRUCTURE, METHOD OF MANUFACTURING THE SAME, AND DIE STRUCTURE
A bonding structure including a first substrate, a second substrate, and an adhesive layer is provided. The first substrate has a plurality of first trenches. The adhesive layer is located between... |
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US20160276295 |
Packaging Devices and Methods of Manufacture Thereof
Packaging devices and methods of manufacture thereof for semiconductor devices are disclosed. In some embodiments, a method of manufacturing a packaging device includes forming an interconnect... |
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US20160276233 |
System and Method for Dual-Region Singulation
A method for semiconductor fabrication includes forming a first array of semiconductor circuitry and a second array of semiconductor circuitry separated by a singulation region and a contact... |
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US20160260675 |
SLOTTED SUBSTRATE FOR DIE ATTACH INTERCONNECTS
A method of forming slots into a substrate surrounding via interconnects at the periphery of a die to create a standoff between mismatched materials and the resulting device are provided.... |
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US20160260674 |
REMOVAL OF INTEGRATED CIRCUIT CHIPS FROM A WAFER
Upon a wafer, integrated circuit (IC) chips are separated by a kerf that includes a through kerf via (TKV). The chips are removed from the wafer and separated from each other by removing the TKV.... |
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US20160254232 |
Combined wafer production method with laser treatment and temperature-induced stresses
The present invention relates to a method for the production of layers of solid material. The method according to the invention comprises at the very least the steps of providing a solid body (2)... |
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US20160254160 |
Method of Manufacturing Semiconductor Device and Semiconductor Device
Reliability of a semiconductor device is improved. A power device includes: a semiconductor chip; a chip mounting part; a solder material electrically coupling a back surface electrode of the... |
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US20160247771 |
SEMICONDUCTOR DEVICE
A seal ring structure is formed through a multilayer structure of a plurality of dielectric films in a peripheral part of a chip region to surround the chip region. A dual damascene interconnect... |
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US20160233171 |
SEMICONDUCTOR DEVICE
Provided is a semiconductor device including an interconnection structure provided on a cell region of a substrate to include a first line and a second line sequentially stacked on the substrate,... |
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US20160211179 |
METHOD OF PROCESSING A SEMICONDUCTOR SUBSTRATE AND SEMICONDUCTOR CHIP
A method of processing a semiconductor substrate is provided. The method may include forming a film over a first side of a semiconductor substrate, forming at least one separation region in the... |
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US20160204071 |
SEMICONDUCTOR DIE AND DIE CUTTING METHOD
The present disclosure provides die cutting methods and semiconductor dies. A semiconductor substrate has a test region, isolation regions, and core regions. A device layer, an interconnection... |
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US20160204032 |
METHOD FOR DIVIDING A COMPOSITE INTO SEMICONDUCTOR CHIPS, AND SEMICONDUCTOR CHIP
The invention relates to a method for dividing a composite into a plurality of semiconductor chips along a dividing pattern. A composite, which comprises a substrate, a semiconductor layer... |
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US20160190070 |
Multiple Edge Enabled Patterning
Provided is an alignment mark having a plurality of sub-resolution elements. The sub-resolution elements each have a dimension that is less than a minimum resolution that can be detected by an... |
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US20160181210 |
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
An inventive semiconductor device includes a semiconductor chip having a passivation film, and a sealing resin layer provided over the passivation film for sealing a front side of the... |
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US20160172263 |
METHOD AND STRUCTURE FOR WAFER-LEVEL PACKAGING
A method for wafer-level packaging includes providing a semiconductor wafer having a plurality of semiconductor chips connected by connection stems in the wafer. The method further includes... |
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US20160148875 |
SEMICONDUCTOR ELEMENT SUBSTRATE, AND METHOD FOR PRODUCING SAME
A diffusion time when forming an isolation region is shortened without deteriorating strength against wafer cracks. A plurality of circular holes 4a and 4b are respectively provided side by side... |
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US20160148842 |
DICING OF LOW-K WAFERS
Consistent with an example embodiment, there is a method for sawing a wafer substrate, the wafer substrate having a front-side surface containing active devices separated by saw lanes and a... |
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US20160141209 |
DEVICE MANUFACTURING METHOD AND DEVICE
A device manufacturing method according to an embodiment includes forming a film on the second surface side of a substrate having a first surface and the second surface, forming a trench in part... |
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US20160133580 |
SCRIBE SEALS AND METHODS OF MAKING
A semiconductor die includes a plurality of layers, the plurality of layers having a top surface. A scribe seal is located in the plurality of layers and includes a first metal stack having a... |
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US20160118352 |
SEMICONDUCTOR DEVICE
To improve reliability of a semiconductor device obtained through a dicing step. In a ring region, a first outer ring is provided outside a seal ring, and a second outer ring is provided outside... |
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US20160104682 |
Crack Stop Barrier and Method of Manufacturing Thereof
A wafer is disclosed. The wafer comprises a plurality of chips and a plurality of kerfs. A kerf of the plurality of kerfs separates one chip from another chip. The kerf comprises a crack stop barrier. |
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US20160093534 |
Method for Separating Chips from a Wafer
The invention relates to a method for producing chips (13) by dividing a wafer along dividing lines (11, 12) defining dimensions of the chip, wherein a focus (18) of a preferably pulsed laser... |
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US20160086854 |
Semiconductor Device and Method of Manufacturing a Semiconductor Device Having a Glass Piece and a Single-Crystalline Semiconductor Portion
A semiconductor device includes a glass piece and an active semiconductor element formed in a single-crystalline semiconductor portion. The single-crystalline semiconductor portion has a working... |
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US20160079183 |
SEMICONDUCTOR DEVICE ARRANGEMENT AND A METHOD FOR FORMING A SEMICONDUCTOR DEVICE ARRANGEMENT
A semiconductor device arrangement includes a semiconductor substrate which includes a semiconductor substrate front side and a semiconductor substrate back side. The semiconductor substrate... |