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US20110291235 COPPER INTERCONNECTION STRUCTURE WITH MIM CAPACITOR AND A MANUFACTURING METHOD THEREOF  
The present invention discloses a copper interconnection structure with MIM capacitor and a manufacturing method thereof. The method firstly makes a copper conductive pattern in a copper...
US20150158719 MEMS Device with Sealed Cavity and Method for Fabricating Same  
Disclosed is a MEMS device having lower and upper chambers with a similar pressure and/or a similar gaseous chemistry. The MEMS device includes a top MEMS plate and a bottom MEMS plate. The MEMS...
US20110272782 POWER LAYOUT FOR INTEGRATED CIRCUITS  
A power layout of an integrated circuit includes at least one power grid cell. Each power gird cell includes at least one first power layer configured to be coupled to a high power supply voltage...
US20090195967 Constructions Comprising Hafnium Oxide And/Or Zirconium Oxide  
The invention includes ALD-type methods in which two or more different precursors are utilized with one or more reactants to form a material. In particular aspects, the precursors are hafnium and...
US20130093049 High Productivity Combinatorial Dual Shadow Mask Design  
Dual shadow mask design can overcome the size and resolution limitations of shadow masks to provide capacitor structures with small effective areas. The capacitor structures have bottom and top...
US20120326270 INTERDIGITATED VERTICAL NATIVE CAPACITOR  
A metal capacitor structure includes a plurality of line level structures vertically interconnected with via level structures. Each first line level structure and each second line level structure...
US20130256807 Integrated Dual Power Converter Package Having Internal Driver IC  
An integrated dual power converter package is disclosed. The package includes a leadframe having a first control FET paddle configured to support a drain of a first control FET, and a second...
US20110193193 STRUCTURE AND METHOD FOR FORMING ISOLATION AND BURIED PLATE FOR TRENCH CAPACITOR  
A structure and method for forming isolation and a buried plate for a trench capacitor is disclosed. Embodiments of the structure comprise an epitaxial layer serving as the buried plate, and a...
US20120104550 HIGH ASPECT RATIO CONTACTS  
A contact formed in accordance with a process for etching a insulating material to produce an opening having an aspect ratio of at least 15:1 by first exposing the insulating material to a second...
US20140374881 CONCENTRIC CAPACITOR STRUCTURE  
A concentric capacitor structure generally comprising concentric capacitors is disclosed. Each concentric capacitor comprises a first plurality of perimeter plates formed on a first layer of a...
US20120199947 METHOD FOR MANUFACTURING AND REOXIDIZING A TIN/TA2O5/TIN CAPACITOR  
A method for manufacturing a TiN/Ta2O5/TiN capacitor, including the steps of forming a Ta2O5 layer on a TiN support by a plasma-enhanced atomic layer deposition method, or PEALD; and submitting...
US20110169134 CAPACITOR WITH PILLAR TYPE STORAGE NODE AND METHOD FOR FABRICATING THE SAME  
A capacitor includes a pillar-type storage node, a supporter disposed entirely within an inner empty crevice of the storage node, a conductive capping layer over the supporter and contacting the...
US20120181661 METHOD FOR TUNING THE TRHESHOLD VOLTAGE OF A METAL GATE AND HIGH-K DEVICE  
A method of forming a deep trench capacitor includes providing a wafer. Devices are formed on a front side of the wafer. A through-silicon-via is formed on a substrate of the wafer. Deep trenches...
US20110304014 PASSIVE INTEGRATED CIRCUIT  
A passive integrated circuit formed on a substrate, including contact areas of a conductive material specifically capable of receiving bonding pads, wherein the conductive material further creates...
US20140264742 Integrated Capacitor  
A structure includes first, second, and third conductive leaf structures. The first conductive leaf structure includes a first conductive midrib and conductive veins. The second conductive leaf...
US20140291803 CAPACITOR STRUCTURE OF GATE DRIVER IN PANEL  
A capacitor structure of gate driver in panel (GIP) includes a first metal layer, a first dielectric layer, a second metal layer, a second dielectric layer, a first and second transparent...
US20140117500 IMPLEMENTING DECOUPLING DEVICES INSIDE A TSV DRAM STACK  
A method and structures are provided for implementing decoupling capacitors within a DRAM TSV stack. A DRAM is formed with a plurality of TSVs extending completely through the substrate and filled...
US20150061072 VARIABLE CAPACITANCE INTEGRATED CIRCUIT  
A variable capacitance semiconductor structure is disclosed. Embodiments include a capacitor having three plates, a top plate, a middle plate, and a bottom plate. The top plate serves as a...
US20150170999 MULTIPLE DEPTH VIAS IN AN INTEGRATED CIRCUIT  
An integrated circuit with vias with different depths stopping on etch stop layers with different thicknesses. A method of simultaneously etching vias with different depths without causing etch...
US20130334659 Multiple Depth Vias In An Integrated Circuit  
An integrated circuit with vias with different depths stopping on etch stop layers with different thicknesses. A method of simultaneously etching vias with different depths without causing etch...
US20120187530 USING BACKSIDE PASSIVE ELEMENTS FOR MULTILEVEL 3D WAFERS ALIGNMENT APPLICATIONS  
Passive circuit elements are formed at surfaces of two integrated circuit wafers. The passive circuit elements are utilized to align the two integrated circuit wafers to form an integrated circuit...
US20130193554 Cell Array with Density Features  
A method includes defining an array including a plurality of unit cells, receiving unit cell density parameters in a computing apparatus, and defining a plurality of sub-arrays of unit cells using...
US20120139083 POWER DISTRIBUTION NETWORK  
In one embodiment, an integrated circuit (IC) is presented. The IC includes first and second sets of power distribution lines formed in the IC. The IC includes first and second capacitors formed...
US20140103490 METAL-OXIDE-METAL CAPACITOR STRUCTURE  
A capacitor from a Metal-Oxide-Metal (“MoM”) process may include a plurality of metal layers arranged with different design structures. The metal layers may be connected with vias. The metal...
US20110309474 TRENCH CAPACITOR  
A trench and method of fabrication is disclosed. The trench shape is cylindrosymmetric, and is created by forming a dopant profile that is monotonically increasing in dopant concentration level as...
US20150179731 EMBEDDED THREE-DIMENSIONAL CAPACITOR  
An embedded capacitor is provided that includes a substrate having a dielectric-filled window. A metal-insulator-metal structure lines a plurality of vias extending through the dielectric-filled...
US20140131836 DIELECTRIC TRENCHES, NICKEL/TANTALUM OXIDE STRUCTURES, AND CHEMICAL MECHANICAL POLISHING TECHNIQUES  
A portion of a conductive layer (310, 910) provides a capacitor electrode (310.0, 910.0). Dielectric trenches (410, 414, 510) are formed in the conductive layer to insulate the capacitor electrode...
US20150061075 METAL TRENCH DE-COUPLING CAPACITOR STRUCTURE AND METHOD FOR FORMING THE SAME  
A metal trench de-coupling capacitor structure includes a vertical trench disposed in a substrate, an insulating layer deposited on the sidewall of the vertical trench, an inter-layer dielectric...
US20130175665 THERMALLY STABLE HIGH-K TETRAGONAL HFO2 LAYER WITHIN HIGH ASPECT RATIO DEEP TRENCHES  
A trench structure that in one embodiment includes a trench present in a substrate, and a dielectric layer that is continuously present on the sidewalls and base of the trench. The dielectric...
US20150028449 NANOPARTICLES FOR MAKING SUPERCAPACITOR AND DIODE STRUCTURES  
Structures and methods of making a supercapacitor may include a first electrode comprising a first conductive plate and a 3-dimensional (3D) aggregate of sintered nanoparticles electrically...
US20120091561 MEMS DEVICES  
A method of manufacturing a MEMS device comprises forming a MEMS device element (12). A sidewall (20) is formed around the MEMS device element, and a sacrificial layer (14) is formed over the...
US20150137254 GRADED DIELECTRIC STRUCTURES  
Graded dielectric layers and methods of fabricating such dielectric layers provide dielectrics in a variety of electronic structures for use in a wide range of electronic devices and systems. In...
US20110156205 INTEGRATED CIRCUIT DEVICE AND ELECTRONIC INSTRUMENT  
An integrated circuit device includes a receiving circuit, a transmission circuit, and common pads common to the receiving circuit and the transmission circuit, which are disposed in such a way...
US20120228739 HYDROGEN BARRIER FOR FERROELECTRIC CAPACITORS  
An integrated circuit containing a FeCap array. The FeCap array is at least partially surrounded on the sides by hydrogen barrier walls and on the top by a hydrogen barrier top plate. A method for...
US20110062550 HYDROGEN BARRIER FOR FERROELECTRIC CAPACITORS  
An integrated circuit containing a FeCap array. The FeCap array is at least partially surrounded on the sides by hydrogen barrier walls and on the top by a hydrogen barrier top plate. A method for...
US20150171004 FINGER METAL OXIDE METAL CAPACITOR FORMED IN A PLURALITY OF METAL LAYERS  
A finger metal oxide metal capacitor including an outer conducting structure and an inner conducting structure. The outer conducting structure is defined in a plurality of metal layers and a...
US20140159201 SINGLE PATTERN HIGH PRECISION CAPACITOR  
An integrated circuit contains a high precision capacitor having a bottom plate, a dielectric layer over the bottom plate, a capacitor opening in the dielectric layer exposing, and not...
US20130099355 MEMS Structures and Methods for Forming the Same  
A method includes forming a MEMS device, forming a bond layer adjacent the MEMS device, and forming a protection layer over the bond layer. The steps of forming the bond layer and the protection...
US20150102461 Cost Effective Method of Forming Embedded DRAM Capacitor  
A high capacitance embedded metal interconnect capacitor and associated fabrication processes are disclosed for using a directional barrier metal formation sequence in a dual damascene copper...
US20120217614 POWER CONVERTOR DEVICE AND CONSTRUCTION METHODS  
In one aspect, the present invention relates generally to integrated circuit (IC) packages and more specific to some embodiments of IC power convertor technologies. In particular, IC packages that...
US20140203401 METAL-ON-METAL (MOM) CAPACITORS HAVING LATERALLY DISPLACED LAYERS, AND RELATED SYSTEMS AND METHODS  
Metal-on-Metal (MoM) capacitors having laterally displaced layers and related systems and methods are disclosed. In one embodiment, a MoM capacitor includes a plurality of vertically stacked...
US20120153431 INTEGRATED CIRCUIT AND A METHOD USING INTEGRATED PROCESS STEPS TO FORM DEEP TRENCH ISOLATION STRUCTURES AND DEEP TRENCH CAPACITOR STRUCTURES FOR THE INTEGRATED CIRCUIT  
Disclosed is an integrated circuit having at least one deep trench isolation structure and a deep trench capacitor. A method of forming the integrated circuit incorporates a single etch process to...
US20110133310 INTEGRATED CIRCUIT AND A METHOD USING INTEGRATED PROCESS STEPS TO FORM DEEP TRENCH ISOLATION STRUCTURES AND DEEP TRENCH CAPACITOR STRUCTURES FOR THE INTEGRATED CIRCUIT  
Disclosed is an integrated circuit having at least one deep trench isolation structure and a deep trench capacitor. A method of forming the integrated circuit incorporates a single etch process to...
US20120118739 DEVICES AND METHODS FOR SEQUENCING NUCLEIC ACIDS  
Methods and devices for sequencing nucleic acids are disclosed herein. Devices are also provided herein for measuring DNA with nano-pores sized to allow DNA to pass through the nano-pore. The...
US20110298089 TRENCH CAPACITOR AND METHOD OF FABRICATION  
An improved trench capacitor and method of fabrication are disclosed. The trench capacitor utilizes a rare-earth oxide layer to reduce depletion effects, thereby improving performance of the...
US20120061798 HIGH CAPACITANCE TRENCH CAPACITOR  
A dual node dielectric trench capacitor includes a stack of layers formed in a trench. The stack of layers include, from bottom to top, a first conductive layer, a first node dielectric layer, a...
US20150091134 ATOMIC LAYER DEPOSITION  
A method of depositing a material on a substrate using an atomic layer deposition process, wherein the deposition process comprises a first deposition step, a second deposition step subsequent to...
US20130113077 Metal Finger Capacitor for High-K Metal Gate Processes  
Embodiments described herein provide a structure for finger capacitors, and more specifically metal-oxide-metal (“MOM”) finger capacitors and arrays of finger capacitors. A plurality of Shallow...
US20130313679 INTEGRATED CIRCUIT WITH INTEGRATED DECOUPLING CAPACITORS  
Ferroelectric capacitor structures for integrated decoupling capacitors and the like. The ferroelectric capacitor structure includes two or more ferroelectric capacitors connected in series with...
US20130062733 Integrated Circuit with Integrated Decoupling Capacitors  
Ferroelectric capacitor structures for integrated decoupling capacitors and the like. The ferroelectric capacitor structure includes two or more ferroelectric capacitors connected in series with...