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US20080191205 Test structure for seal ring quality monitor  
A semiconductor structure includes a daisy chain adjacent to an edge of a semiconductor chip. The daisy chain includes a plurality of horizontal metal lines distributed in a plurality of...
US20130277794 Tuning the Efficiency in the Transmission of Radio-Frequency Signals Using Micro-Bumps  
A device includes a die including a main circuit and a first pad coupled to the main circuit. A work piece including a second pad is bonded to the die. A first plurality of micro-bumps is...
US20080265361 METHOD FOR GENERATING A LAYOUT, USE OF A TRANSISTOR LAYOUT, AND SEMICONDUCTOR CIRCUIT  
A method for generating a layout, use of a transistor layout, and semiconductor circuit is provided that includes a matching structure, which has a number of transistors, whose structure is...
US20080246108 Semiconductor device including power switch and power reinforcement cell  
A semiconductor device according to one embodiment includes a cell disposition region in which plural basic cells are disposed and a basic power supply wiring. In the cell disposition region are...
US20110057288 MEMS DEVICE AND METHOD FOR FABRICATING THE SAME  
A microelectromechanical system (MEMS) device and a method for fabricating the same are described. The MEMS device includes a first electrode and a second electrode. The first electrode is...
US20150249057 Seal Ring Structure With A Metal Pad  
A method includes providing a substrate having a seal ring region and a circuit region, forming a seal ring structure over the seal ring region, forming a first frontside passivation layer above...
US20130082346 SEAL RING STRUCTURE WITH A METAL PAD  
A method includes providing a substrate having a seal ring region and a circuit region, forming a seal ring structure over the seal ring region, forming a first frontside passivation layer above...
US20120038020 SEAL RING STRUCTURE WITH METAL PAD  
A method includes providing a substrate having a seal ring region and a circuit region, forming a seal ring structure over the seal ring region, forming a first frontside passivation layer above...
US20100283117 FUSE BOX GUARD RINGS INCLUDING PROTRUSIONS AND METHODS OF FORMING SAME  
A structure included in a semiconductor device can include a fuse box guard ring that defines an interior region of the fuse box inside the fuse box guard ring and that defines an exterior region...
US20120049274 Trench Structures in Direct Contact  
A semiconductor structure includes a semiconductor substrate of a first conductivity, an epitaxial layer of a second conductivity on the substrate and a buried layer of the second conductivity...
US20150249051 THREE DIMENSIONAL CIRCUIT INCLUDING SHIELDED INDUCTOR AND METHOD OF FORMING SAME  
The three dimensional (3D) circuit includes a first tier including a semiconductor substrate, a second tier disposed adjacent to the first tier, a three dimensional inductor including an inductive...
US20080017949 Front-rear contacts of electronics devices with induced defects to increase conductivity thereof  
An electronic device is proposed. The device is integrated in a chip including at least one stacked layer having a front surface and a rear surface opposite the front surface, the device...
US20110233717 INTEGRATED CIRCUIT GUARD RINGS  
Integrated circuits with guard rings are provided. Integrated circuits may include internal circuitry that is sensitive to external noise sources. A guard ring may surround the functional...
US20090321871 Chip Pad Resistant to Antenna Effect and Method  
A chip pad structure of an integrated circuit (IC) and the method of forming are disclosed. The chip pad comprises a main pad portion and a ring pad portion. During a charging process involved in...
US20110101487 CRACK RESISTANT CIRCUIT UNDER PAD STRUCTURE AND METHOD OF MANUFACTURING THE SAME  
A circuit under pad structure includes a substrate, a pad electrode, wiring layers interlayer insulation layers alternately disposed between the pad electrode and the substrate, and at least one...
US20120273917 High Voltage Resistance Coupling Structure  
The disclosed invention provides a structure and method for providing a high lateral voltage resistance between the electrical networks, sharing a lateral plane, of conductive elements (e.g.,...
US20110095392 HIGH VOLTAGE RESISTANCE COUPLING STRUCTURE  
The disclosed invention provides a structure and method for providing a high lateral voltage resistance between the electrical networks, sharing a lateral plane, of conductive elements (e.g.,...
US20120091455 PAD STRUCTURE HAVING CONTACT BARS EXTENDING INTO SUBSTRATE AND WAFER HAVING THE PAD STRUCTURE  
A pad structure in a semiconductor wafer for wafer testing is described. The pad structure includes at least two metal pads connected there-between by a plurality of conductive vias in one or more...
US20120241900 SELF DETECTION DEVICE FOR HIGH VOLTAGE ESD PROTECTION  
An electrostatic discharge (ESD) protected device may include a substrate, an N-type well region disposed corresponding to a first portion of the substrate and having two N+ segments disposed at a...
US20110272776 STANDARD CELL, SEMICONDUCTOR DEVICE HAVING STANDARD CELLS, AND METHOD FOR LAYING OUT AND WIRING THE STANDARD CELL  
The chip area of a semiconductor device having a plurality of standard cells is to be made smaller. A semiconductor device includes first and second standard cells. The first standard cell...
US20100001366 Semiconductor device having shared bit line structure and method of manufacturing the same  
A semiconductor device, including a substrate having first and second active regions, the first and second active regions being disposed on opposite sides of an isolation structure, and a bit line...
US20100295146 SEAL RING STRUCTURE FOR INTEGRATED CIRCUITS  
A seal ring structure for an integrated circuit includes a seal ring being disposed along a periphery of the integrated circuit and being divided into at least a first portion and a second...
US20070235832 GROUND LAYER OF PRINTED CIRCUIT BOARD  
A ground layer of a printed circuit board (PCB) includes a digital area, an analog area, and a connecting portion. The digital area is connected to the analog area via the connecting portion. The...
US20120319228 SEMICONDUCTOR DEVICE  
A semiconductor device is disclosed, which includes first and second power supply pads supplied with first and second power voltages, respectively, a first protection circuit coupled between the...
US20130075856 Integrated Circuit Structure and Method of Forming the Same  
An embodiment is an integrated circuit (IC) structure. The structure comprises a deep n well in a substrate, a first pickup device in the deep n well, a first signal device in the deep n well, a...
US20070069327 Method for manufacturing an integrated semiconductor device  
In a method for manufacturing an integrated semiconductor device with low capacitive coupling between a conductive member and a via, a semiconductor substrate with a surface is provided. The...
US20100140734 Electronic Device and Method for Manufacturing Thereof  
An electronic device, including a substrate, a functional structure constituting a functional element formed on the substrate, and a cover structure forming a cavity portion in which the...
US20150123238 SEMICONDUCTOR DEVICES  
There is provided a semiconductor device. The semiconductor device may include multiple contacts plugs, an insulation layer pattern, a metal oxide layer pattern, a metal pattern and a metal line....
US20150214291 SEMICONDUCTOR DEVICE INCLUDING LANDING PAD  
A semiconductor device includes conductive lines spaced from a substrate, and an insulating spacer structure between the conductive lines and defining a contact hole. The insulating spacer...
US20080290444 CAPACITOR STRUCTURE IN A SEMICONDUCTOR DEVICE  
A semiconductor device comprises an integrated circuit formed on a substrate with a signal interface and at least one isolator capacitor. The integrated circuit comprises a plurality of...
US20140339674 SEMICONDUCTOR DEVICE  
A semiconductor device includes: a substrate; a lower wiring on the substrate; an inter-layer insulating film covering the lower wiring; first and second upper wirings on the inter-layer...
US20130161749 SEMICONDUCTOR INTEGRATED CIRCUIT  
A semiconductor integrated circuit includes: a first conductive line coupled with a first pad for receiving a first voltage; a second conductive line coupled with a second pad for receiving a...
US20140035092 RADIO FREQUENCY ISOLATION FOR SOI TRANSISTORS  
According to one example embodiment, a structure includes at least one SOI (semiconductor-on-insulator) transistor situated over a buried oxide layer, where the buried oxide layer overlies a bulk...
US20120025345 METHOD, APPARATUS, AND DESIGN STRUCTURE FOR SILICON-ON-INSULATOR HIGH-BANDWIDTH CIRCUITRY WITH REDUCED CHARGE LAYER  
A method, integrated circuit and design structure includes a silicon substrate layer having trench structures and an ion impurity implant. An insulator layer is positioned on and contacts the...
US20140151842 SEMICONDUCTOR APPARATUS  
A semiconductor apparatus includes a semiconductor chip formed with cut fuses over one surface thereof; and migration preventing modules preventing occurrence of a phenomenon in which metal ions...
US20110309465 SEAL RING STRUCTURE IN SEMICONDUCTOR DEVICES  
The present disclosure provides a semiconductor device that includes a substrate having a seal ring region and a circuit region, a plurality of dummy gates disposed over the seal ring region of...
US20100264508 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD  
A semiconductor device and manufacturing method is disclosed. One embodiment provides a common substrate of a first conductivity type and at least two wells of a second conductivity type. A buried...
US20100207234 SEMICONDUCTOR DEVICE AND WIRE BONDING METHOD  
A semiconductor device (2) includes: a FLR (65) that is disposed on a semiconductor substrate so as to divide the semiconductor substrate into an inner region and an outer region; a first bonding...
US20100164053 SEMICONDUCTOR DEVICE  
A semiconductor device includes a semiconductor wafer in which semiconductor chip forming regions and a scribe region located between the semiconductor chip forming regions are formed, a plurality...
US20100155879 SEMICONDUCTOR DEVICE  
A semiconductor device is provided that comprises a semiconductor substrate comprising an active area and a peripheral region adjacent the active area and structure positioned in the peripheral...
US20100134183 SEMICONDUCTOR DEVICE HAVING ELECTRODE PAD, AND WIRELESS CIRCUIT DEVICE INCLUDING THE SEMICONDUCTOR DEVICE  
A semiconductor device includes a layered region (104) formed in a semiconductor substrate (101) of a first conductivity type, and an electrode pad (106) formed on the semiconductor substrate with...
US20170186648 BIPOLAR JUNCTION SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THEREOF  
A bipolar junction semiconductor device and associated method of manufacturing, the bipolar junction semiconductor device has a P type substrate, a N type buried layer formed in the substrate, a...
US20170148707 SEMICONDUCTOR DEVICE  
An ESD protection device including a Si substrate with an ESD protection circuit formed at the surface of the substrate; pads formed on the Si substrate; a rewiring layer opposed to the surface of...
US20170033059 MULTI-LAYER GROUND SHIELD STRUCTURE OF INTERCONNECTED ELEMENTS  
A multi-layer ground shield structure of interconnected elements is disclosed. The ground shield structure may include a first patterned layer of a ground shield structure, a second patterned...
US20170025367 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF  
A semiconductor device includes an integrated circuit and a guard ring. The integrated circuit includes a first circuit and a second circuit separated from the first circuit. The guard ring is...
US20170018498 Method Of Semiconductor Integrated Circuit Fabrication  
A method of fabricating a semiconductor integrated circuit (IC) is disclosed. A conductive feature over a substrate is provided. A first dielectric layer is deposited over the conductive feature...
US20170012032 SEMICONDUCTOR DEVICE  
In a semiconductor device (SD), plate-shaped upper electrodes (UEL) are formed on a lower electrode (LEL) with a dielectric film (DEC) interposed therebetween. The lower electrode (LEL), the...
US20160379999 HIGH PERFORMANCE HEAT SHIELDS WITH REDUCED CAPACITANCE  
Methods and structures for capacitively isolating a heat shield from a handle wafer of a silicon-on-insulator substrate. A contact plug is located in a trench extending through a trench isolation...
US20160307841 Semiconductor Device and Method Fabricating the Same  
According to an exemplary embodiment, a semiconductor device is provided. The semiconductor device includes a first seal ring and a first circuit. The first circuit includes a first capacitor and...
US20160300795 SEMICONDUCTOR DEVICES INCLUDING EMPTY SPACES AND METHODS OF FORMING THE SAME  
Semiconductor devices including empty spaces and methods of forming the semiconductor devices are provided. The semiconductor devices may include first and second line structures extending in a...

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