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US20090315113 |
Low side zener reference voltage extended drain SCR clamps
In a CMOS implemented free or parasitic pnp transistor, triggering is controlled by introducing a low side zener reference voltage.
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US20090315112 |
Forming ESD Diodes and BJTs Using FinFET Compatible Processes
A method of forming an electrostatic discharging (ESD) device includes forming a first and a second semiconductor fin over a substrate and adjacent to each other; epitaxially growing a...
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US20090312656 |
Electrostatic Discharge Protection For Wrist-Worn Device
Electro static discharge (ESD) protection is provided for electronic devices with integrated circuits, such as for example heart rate monitors. The ESD protection protects against voltage...
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US20090294855 |
Electrostatic Discharge Protection Device
An electrostatic discharge protection device includes a first well comprising a MOS transistor; a second well comprising a first impurity region to which a first voltage is applied, and a second...
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US20090283832 |
SEMICONDUCTOR DEVICE
A semiconductor device, which is connected to a protected device and protects a protected device, includes a semiconductor layer provided on an insulating film; a plurality of source layers which...
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US20090283831 |
Electrostatic discharge (ESD) protection applying high voltage lightly doped drain (LDD) CMOS technologies
An electrostatic discharge (ESD) protection circuit includes a triggering diode that includes a junction between a P-grade (PG) region and an N-well. The PG region has a dopant profile equivalent...
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US20090267154 |
MOS COMPRISING SUBSTRATE POTENTIAL ELEVATING CIRCUITRY FOR ESD PROTECTION
An integrated circuit ( 25 ) formed at a semiconducting surface of a substrate including a common p-layer ( 38 ) includes functional circuitry ( 24 ) formed on the p-layer ( 38 ) including a...
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US20090261417 |
TRIG MODULATION ELECTROSTATIC DISCHARGE (ESD) PROTECTION DEVICES
Trig modulation electrostatic discharge (ESD) protection devices are presented. An ESD protection device includes a semiconductor substrate. A high voltage N-well (HVNW) region is formed in the...
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US20090242991 |
Semiconductor device
Aimed at reducing the area of a protective circuit in a semiconductor device provided therewith, a semiconductor device of the present invention has a first-conductivity-type well, a plurality of...
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US20090242968 |
NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING SAME
In a nonvolatile semiconductor memory device, a stacked body is formed by alternately stacking dielectric films and conductive films on a silicon substrate and a plurality of through holes...
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US20090224325 |
ANTIFUSE ELEMENTS
An antifuse element ( 102, 152, 252, 302, 352, 402, 602, 652, 702 ) includes a substrate material ( 101 ) having an active area ( 106 ) formed in an upper surface, a gate electrode ( 104 ) having...
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US20090224323 |
INTEGRATED CIRCUIT WITH MOSFET FUSE ELEMENT
At least one MOS parameter of a MOS fuse is characterized to provide at least one MOS parameter reference value. Then, the MOS fuse is programmed by applying a programming signal to the fuse...
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US20090224324 |
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
A semiconductor device includes a semiconductor substrate, and an electric fuse element, the electric fuse element including: first impurity-diffused layer regions formed in an active region of the...
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US20090189461 |
INTEGRATED CIRCUIT INCLUDING A POWER MOS TRANSISTOR
An integrated circuit includes a first transistor having a first gate and a first source and a second transistor having a second gate and a second source. The integrated circuit includes a first...
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US20090179271 |
METHOD AND INTEGRATED CIRCUITS CAPABLE OF SAVING LAYOUT AREAS
An integrated circuit includes a diffusion layer, a first poly-silicon layer, and a second poly-silicon layer. The first poly-silicon layer is located on the diffusion layer to form a transistor....
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US20090179270 |
Electrostatic Discharge Protection Pattern for High Voltage Applications
Electrostatic discharge (ESD) protection in high voltage semiconductor devices is disclosed that provides enhanced current isolation between transistor drains or sources by creating an isolation...
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US20090166740 |
Reduced mask configuration for power mosfets with electrostatic discharge (ESD) circuit protection
A semiconductor power device supported on a semiconductor substrate includes an electrostatic discharge (ESD) protection circuit disposed on a first portion of patterned ESD polysilicon layer on...
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US20090140339 |
ESD Protection Device and Method for Manufacturing the Same
Disclosed is an electro-static discharge protection device. The electro-static discharge protection device can include a second conductive type epitaxial layer on a substrate; a second conductive...
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US20090114990 |
HIGH VOLTAGE SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
A semiconductor device, particularly, a method for manufacturing a high voltage semiconductor device is disclosed. The method includes forming a high voltage gate oxide film on a semiconductor...
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US20090090972 |
TUNABLE VOLTAGE ISOLATION GROUND TO GROUND ESD CLAMP
A tunable voltage isolation ground to ground ESD clamp is provided. The clamp includes a dual-direction silicon controlled rectifier (SCR) and trigger elements. The SCR is coupled between first and...
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US20090086394 |
PROTECTION CIRCUIT AND SEMICONDUCTOR INTEGRATED CIRCUIT
In a circuit in which a protected element 42 is connected between an input terminal 61 and an output terminal 62 , and a protected element 41 is connected between the input terminal 61 and...
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US20090079001 |
MULTI-CHANNEL ESD DEVICE AND METHOD THEREFOR
In one embodiment, an ESD device is configured to include a zener diode and a P-N diode.
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US20090079002 |
Superjunction Structures for Power Devices and Methods of Manufacture
A power device includes an active region and a termination region surrounding the active region. A plurality of pillars of first and second conductivity type are alternately arranged in each of the...
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US20090072314 |
Depletion Mode Field Effect Transistor for ESD Protection
The object of this invention is to present a field effect transistor by which the drain capacitance per unit gate width can be reduced. The gate electrode 21 (G) having a plurality of sides is...
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US20090045463 |
ACTIVE DEVICE ARRAY SUBSTRATE
An active device array substrate including a substrate, a plurality of pixel units, a plurality of driving lines, a plurality of common lines, an electrostatic discharge (ESD) protection circuit,...
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US20090014800 |
SILICON CONTROLLED RECTIFIER DEVICE FOR ELECTROSTATIC DISCHARGE PROTECTION
An SCR device includes a substrate, a plurality of isolation structures defining a first region and a second region in the substrate, an n well disposed in the substrate, an n type first doped...
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US20090001472 |
ELECTROSTATIC DISCHARGE PROTECTION DEVICES AND METHODS FOR FABRICATING SEMICONDUCTOR DEVICES INCLUDING THE SAME
A method for fabricating a semiconductor device is provided. According to this method, a first gate electrode and a second gate electrode are formed overlying a first portion of a silicon...
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US20080308868 |
HIGH VOLTAGE METAL OXIDE SEMICONDUCTOR TRANSISTOR AND FABRICATION METHOD THEREOF
A high voltage metal oxide semiconductor includes a doped substrate, two first isolation structures, a gate structure, a source region, a drain region, two second isolation structures, and two...
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US20080310061 |
Transistor with EOS protection and ESD protection circuit including the same
A transistor with an electrical overstress (EOS) protection may include an active region, a plurality of impurity regions and a conduction pattern. The active region may be formed in a substrate....
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US20080303092 |
Asymetrical Field-Effect Semiconductor Device with Sti Region
A high voltage asymmetric semiconductor device ( 20 ) that includes a shallow trench isolation (STI) region ( 22 ) that forms a dielectric between a drain ( 34 ) and a gate ( 36 ) to allow for high...
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US20080296685 |
ANALOG SWITCH
An analog switch having a low capacitance is achieved. Potentials of input/output terminals of the analog switch and a well potential and a gate potential of an NMOS switching device are operated...
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US20080296684 |
SEMICONDUCTOR APPARATUS
A semiconductor apparatus includes a semiconductor substrate, an insulating film provided on the semiconductor substrate, and a semiconductor film provided on the insulating film. The semiconductor...
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US20080277727 |
Apparatus and method for electrostatic discharge protection with p-well integrated components
An electrostatic protection circuit has a transistor for pumping charge into the substrate and a transistor, including a parasitic transistor, for removing charge from the substrate and tabs. The...
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US20080265327 |
Substrate Isolated Intergrated High Voltage Diode Integrated Within A Unit Cell
An asymmetric semiconductor device ( 3 ) that includes an integrated high voltage diode ( 72 ), including: a substrate comprising an epitaxial layer ( 47 ) and a deep well implant ( 42 ) of a first...
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US20080265326 |
Structure and method for self protection of power device with expanded voltage ranges
A vertical semiconductor power device includes a top surface and a bottom surface of a semiconductor substrate constituting a vertical current path for conducting a current there through. The...
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US20080258223 |
ESD PROTECTION DEVICE
An ESD protection device is provided. The ESD protection device of the present invention includes a semiconductor substrate/well, a first doped region, a second doped region and a third doped...
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US20080251846 |
METHOD AND STRUCTURE FOR LOW CAPACITANCE ESD ROBUST DIODES
A diode having a capacitance below 0.1 pF and a breakdown voltage of at least 500V. The diode has an anode of a first conductivity type and a cathode of a second conductivity type disposed below...
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US20080224219 |
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME
A semiconductor device is provided having a high performance resistance element. In an N-type well isolated by an insulating film, two higher concentration N-type regions are formed. An interlayer...
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US20080211026 |
Coupling well structure for improving HVMOS performance
A semiconductor structure includes a substrate, a first well region of a first conductivity type overlying the substrate, a second well region of a second conductivity type opposite the first...
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US20080203424 |
DIODE AND APPLICATIONS THEREOF
A diode with low substrate current leakage and suitable for BiCMOS process technology. A buried layer is formed on a semiconductor substrate. A connection region and well contact the buried layer....
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US20080197415 |
ELECTROSTATIC DISCHARGE PROTECTION CIRCUIT HAVING MULTIPLE DISCHARGE PATHS
The present invention relates to an electrostatic discharge protection circuit of a semiconductor memory device to protect an internal circuit from static electricity. The electrostatic discharge...
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US20080173945 |
ESD protection scheme for semiconductor devices having dummy pads
A semiconductor device formed in a semiconductor substrate for dissipating electrostatic discharge and/or accumulated charge in an integrated circuit is provided. In one embodiment, the device...
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US20080151590 |
METHOD AND APPARATUS FOR PROTECTION AGAINST PROCESS-INDUCED CHARGING
A semiconductor device ( 400 ) for improved charge dissipation protection includes a substrate ( 426 ), a layer of semiconductive or conductive material ( 406 ), one or more thin film devices ( 408...
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US20080142889 |
STRAPPING CONTACT FOR CHARGE PROTECTION
A semiconductor device includes a substrate and a memory cell formed on the substrate. The memory cell includes a word line. The semiconductor device also includes a protection area formed in the...
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US20080135939 |
Fabrication method of semiconductor package and structure thereof
A fabrication method of semiconductor and a structure thereof are disclosed herein. The present invention includes: providing a substrate; disposing a mask on the substrate, wherein the mask has a...
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US20080128816 |
ESD PROTECTION CIRCUIT
An ESD protection circuit connected between an input pad and an internal circuit is disclosed. The ESD protection circuit includes a main ESD protection device, a first resistor and a secondary...
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US20080111191 |
ELECTRONIC CIRCUIT, ELECTRONIC DEVICE, METHOD OF DRIVING ELECTRONIC DEVICE, ELECTRO-OPTICAL DEVICE AND ELECTRONIC APPARATUS
An electronic circuit that drives a driven element to which driving voltage or driving current is supplied. The electronic circuit includes a signal line, a unit circuit connected to the signal...
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US20080099848 |
Method and apparatus for electrostatic discharge protection having a stable breakdown voltage and low snapback voltage
Electrostatic discharge (ESD) protection is provided for an integrated circuit. Snap back from a lower initial critical voltage and critical current is provided, as compared to contemporary...
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US20080093672 |
String contact structure for high voltage ESD
The present invention relates to an electrostatic discharge (ESD) protection scheme and particularly to a string contact structure for an improved ESD performance. In an embodiment, the invention...
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US20080093671 |
Semi-Conductor Element Comprising An Integrated Zener Diode And Method For The Production Thereof
In order to protect a semiconductor component against overvoltages, the steps which are used for production of bipolar transistors and CMOS structures in the semiconductor component are used for...
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