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US20150108564 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME  
A source region of a MOSFET includes: a source contact region connected to a source pad; a source extension region adjacent to a channel region in a well region; and a source resistance control...
US20130032877 N-CHANNEL TRANSISTOR COMPRISING A HIGH-K METAL GATE ELECTRODE STRUCTURE AND A REDUCED SERIES RESISTANCE BY EPITAXIALLY FORMED SEMICONDUCTOR MATERIAL IN THE DRAIN AND SOURCE AREAS  
When forming sophisticated semiconductor devices including high-k metal gate electrode structures and N-channel transistors, superior performance may be achieved by incorporating epitaxially grown...
US20110018045 DRAM Arrays, Vertical Transistor Structures, and Methods of Forming Transistor Structures and DRAM Arrays  
The invention includes a method of forming a semiconductor construction. Dopant is implanted into the upper surface of a monocrystalline silicon substrate. The substrate is etched to form a...
US20110017971 INTEGRATED CIRCUIT DEVICES INCLUDING LOW-RESISTIVITY CONDUCTIVE PATTERNS IN RECESSED REGIONS  
An integrated circuit device includes a device isolation pattern on a semiconductor substrate to define an active area therein. The active area includes a doped region therein. A conductive...
US20100155831 Deep trench insulated gate bipolar transistor  
In one embodiment, a power transistor device comprises a substrate of a first conductivity type that forms a PN junction with an overlying buffer layer of a second conductivity type. The power...
US20140252454 VERTICAL BIT LINE TFT DECODER FOR HIGH VOLTAGE OPERATION  
A 3D memory array having a vertically oriented thin film transistor (TFT) selection device that has a channel extension, otherwise referred to as a gate/junction offset, is disclosed. The...
US20130001675 SEMICONDUCTOR DEVICES AND METHODS FOR MANUFACTURING THE SAME  
A semiconductor device includes a semiconductor substrate including first trenches defining outer sidewalls of a pair of active pillars and a second trench defining opposing inner sidewalls of the...
US20120132987 Reducing Device Performance Drift Caused by Large Spacings Between Active Regions  
A method of forming an integrated circuit structure includes providing a semiconductor substrate; and forming a first and a second MOS device. The first MOS device includes a first active region...
US20090242972 VERTICAL CHANNEL TRANSISTOR IN SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME  
A method of fabricating a vertical channel transistor for a semiconductor device includes forming, on a substrate, a plurality of active pillars each having a gate electrode formed on and...
US20080217657 Power Semiconductor Device and Method of Manufacturing a Power Semiconductor Device  
A semiconductor power switch having an array of basic cells in which peripheral regions in the active drain region extend beside the perimeter of the base-drain junction, the peripheral regions...
US20140299916 MONOLITHIC CELL FOR AN INTEGRATED CIRCUIT AND ESPECIALLY A MONOLITHIC SWITCHING CELL  
A cell includes at least two semiconductor structures of the same nature, these two structures both employing voltages and currents that are unidirectional, each structure having an anode (10), a...
US20130320431 Vertical Power MOSFET and Methods for Forming the Same  
A device includes a semiconductor region in a semiconductor chip, a gate dielectric layer over the semiconductor region, and a gate electrode over the gate dielectric. A drain region is disposed...
US20130234240 SEMICONDUCTOR DEVICE HAVING JUNCTIONLESS VERTICAL GATE TRANSISTOR AND METHOD OF MANUFACTURING THE SAME  
A junctionless vertical gate transistor includes an active pillar vertically protruding from a substrate and including a first impurity region, a second impurity region and a third impurity region...
US20110095350 VERTICAL TYPE INTEGRATED CIRCUIT DEVICES, MEMORY DEVICES, AND METHODS OF FABRICATING THE SAME  
A vertical type integrated circuit device includes a substrate and a pillar vertically protruding from the substrate. The pillar includes a lower impurity region and an upper impurity region...
US20100013005 INTEGRATED CIRCUIT INCLUDING A VERTICAL TRANSISTOR AND METHOD  
An integrated circuit including a vertical transistor and method of manufacturing. In one embodiment a vertical transistor is formed in a pillar of a semiconductor substrate. A buried conductive...
US20090302375 METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE AND DEVICE MANUFACTURED BY THE METHOD  
A method of manufacturing a semiconductor device includes forming trenches (22), and then selectively etching a buried layer (14) to form a cavity. An insulator is then deposited on the sidewalls...
US20050082605 Semiconductor device and method for manufacturing semiconductor device  
A gate insulating film is formed in a first region and a second region of a substrate, a first metallic film is formed on the gate insulating film in one of the first region or the second region,...
US20150243589 COMBINED PACKAGED POWER SEMICONDUCTOR DEVICE  
A combined packaged power semiconductor device includes flipped top source low-side MOSFET electrically connected to top surface of a die paddle, first metal interconnection plate connecting...
US20150054064 POWER SEMICONDUCTOR DEVICE WITH SUPER JUNCTION STRUCTURE AND INTERLACED, GRID-TYPE TRENCH NETWORK  
A power semiconductor device includes a semiconductor wafer having thereon a plurality of die regions and scribe lanes between the die regions. A first epitaxial layer is disposed on the...
US20140117437 Super Junction Semiconductor Device Comprising a Cell Area and an Edge Area  
A super junction semiconductor device may include one or more doped zones in a cell area. A drift layer is provided between a doped layer of a first conductivity type and the one or more doped...
US20120280252 Field Effect Transistor Devices with Low Source Resistance  
A semiconductor device includes a drift layer having a first conductivity type, a well region in the drift layer having a second conductivity type opposite the first conductivity type, and a...
US20090108339 HIGH VOLTAGE TMOS SEMICONDUCTOR DEVICE WITH LOW GATE CHARGE STRUCTURE AND METHOD OF MAKING  
A TMOS device (10) is formed using a semiconductor layer (16) of a first type. First and second regions (62,64) of the second type are formed in the semiconductor layer and are spaced apart. A...
US20140197478 POWER TRANSISTOR DEVICE WITH SUPER JUNCTION AND MANUFACTURING METHOD THEREOF  
The present invention provides a power transistor device with a super junction including a substrate, a first epitaxial layer, a second epitaxial layer, and a third epitaxial layer. The first...
US20140054679 DOPING A NON-PLANAR SEMICONDUCTOR DEVICE  
In doping a non-planar semiconductor device, a substrate having a non-planar semiconductor body formed thereon is obtained. A first ion implant is performed in a region of the non-planar...
US20120098053 SEMICONDUCTOR DEVICE WITH VERTICAL TRANSISTOR AND METHOD FOR FABRICATING THE SAME  
A semiconductor device with a vertical transistor includes a plurality of active pillars; a plurality of vertical gates surrounding sidewalls of the active pillars; a plurality of word lines...
US20120001256 SEMICONDUCTOR DEVICE  
A semiconductor device includes: a first insulator pillar surrounding an active region; a second insulator pillar with a second side surface opposed in a y direction to a first side surface of the...
US20100219462 MOS-Gated Power Devices, Methods, and Integrated Circuits  
MOS-gated devices, related methods, and systems for vertical power and RF devices including an insulated trench and a gate electrode. A body region is positioned so that a voltage bias on the gate...
US20090065856 Semiconductor device having vertical MOS transistor and method for manufacturing the semiconductor device  
In a vertical MOS transistor in which a semiconductor pillar is formed by etching a semiconductor substrate in a portion surrounded by an isolation film, the semiconductor pillar is covered with a...
US20150214242 VERTICAL NON-VOLATILE MEMORY DEVICES AND METHODS OF MANUFACTURING THE SAME  
A vertical non-volatile memory device includes gate electrodes stacked in a first region of a substrate in a third direction perpendicular to a top surface of the substrate including the first...
US20150194423 SEMICONDUCTOR DEVICE WITH MULTIPLE THRESHOLD VOLTAGE AND METHOD OF FABRICATING THE SAME  
According to an exemplary embodiment, a chip is provided. The chip includes a first vertical device having a first threshold and second vertical device having a second threshold. The first...
US20150145005 TRANSISTOR AMPLIFIER CIRCUIT AND INTEGRATED CIRCUIT  
Disclosed is a transistor having a first region of a first conductivity type for injecting charge carriers into the transistor and a laterally extended second region) of the first conductivity...
US20100102361 VERTICAL TRANSISTOR AND FABRICATING METHOD THEREOF AND VERTICAL TRANSISTOR ARRAY  
A vertical transistor including a substrate, a gate, a base line and a gate dielectric layer is provided. The substrate includes a pillar protruding out of a surface of the substrate. The pillar...
US20090179258 NITRIDE SEMICONDUCTOR DEVICE AND METHOD FOR PRODUCING NITRIDE SEMICONDUCTOR DEVICE  
A nitride semiconductor device includes: a nitride semiconductor structure portion including a first layer made of an n-type group III nitride semiconductor, a second layer made of a group III...
US20130256784 MOSFETs with Channels on Nothing and Methods for Forming the Same  
A device includes a semiconductor substrate, and a channel region of a transistor over the semiconductor substrate. The channel region includes a semiconductor material. An air gap is disposed...
US20130009241 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME  
According to one embodiment, a semiconductor device includes a drain layer, a drift, a base, a source region, a plurality of gates provided on the drift region, the base, and the source region,...
US20120228697 NONVOLATILE MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME  
A nonvolatile memory device having a vertical structure and a method of manufacturing the same, the nonvolatile memory device including a channel region that vertically extends from a substrate;...
US20120211824 VERTICAL TRANSISTOR HAVING A GATE STRUCTURE FORMED ON A BURIED DRAIN REGION AND A SOURCE REGION OVERLYING THE UPPER MOST LAYER OF THE GATE STRUCTURE  
Raised structures comprising overlying silicon layers formed by controlled selective epitaxial growth, and methods for forming such raised-structure on a semiconductor substrate are provided. The...
US20110006360 SEMICONDUCTOR DEVICE HAVING 3D-PILLAR VERTICAL TRANSISTOR AND MANUFACTURING METHOD THEREOF  
A semiconductor device includes: a semiconductor substrate; a silicon pillar having a side surface perpendicular to a main surface of the semiconductor substrate; a gate dielectric film that...
US20150243748 VERTICAL ACCESS DEVICES, SEMICONDUCTOR DEVICE STRUCTURES, AND RELATED METHODS  
A vertical access device comprises a semiconductive base comprising a first source/drain region, a semiconductive pillar extending vertically from the semiconductive base, and a gate electrode...
US20150221666 VERTICAL MEMORY DEVICES  
According to example embodiments, a vertical memory device includes a low resistance layer on a lower insulation layer, a channel layer on the low resistance layer, a plurality of vertical...
US20150200308 Field Effect Transistor Constructions And Memory Arrays  
In some embodiments, a transistor includes a stack having a bottom source/drain region, a first insulative material, a conductive gate, a second insulative material, and a top source/drain region....
US20130187220 VERTICAL MEMORY DEVICES, APPARATUSES INCLUDING VERTICAL MEMORY DEVICES, AND METHODS FOR FORMING SUCH VERTICAL MEMORY DEVICES AND APPARATUSES  
Methods of forming vertical memory devices include forming first trenches, at least partially filling the first trenches with a polysilicon material, and forming second trenches generally...
US20120256252 COMPATIBLE VERTICAL DOUBLE DIFFUSED METAL OXIDE SEMICONDUCTOR TRANSISTOR AND LATERAL DOUBLE DIFFUSED METAL OXIDE SEMICONDUCTOR TRANSISTOR AND MANUFACTURE METHOD THEREOF  
A method for manufacturing compatible vertical double diffused metal oxide semiconductor (VDMOS) transistor and lateral double diffused metal oxide semiconductor (LDMOS) transistor includes:...
US20120104489 SEMICONDUCTOR DEVICE WITH VERTICAL GATE AND METHOD FOR FABRICATING THE SAME  
A semiconductor device includes a substrate; a plurality of active pillars formed over the substrate; bulb-type trenches, each of the bulb-type trenches formed inside the substrate between the...
US20120007151 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND MANUFACTURING METHOD OF SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE  
A high breakdown voltage circuit containing a high breakdown voltage MOSFET in LSI, unlike a quintessential internal circuit, has an operating voltage fixed in a high state due to the relation...
US20110169063 INTEGRATED CIRCUITS AND TRANSISTOR DESIGN THEREFOR  
The invention includes a semiconductor structure having a gateline lattice surrounding vertical source/drain regions. In some aspects, the source/drain regions can be provided in pairs, with one...
US20100230733 VERTICAL GATED ACCESS TRANSISTOR  
According to one embodiment of the present invention, a method of forming an apparatus comprises forming a plurality of deep trenches and a plurality of shallow trenches in a first region of a...
US20100219466 SEMICONDUCTOR DEVICE WITH VERTICAL CHANNEL TRANSISTOR  
In a high speed vertical channel transistor, a pillar structure is formed over a substrate, a gate electrode surrounds an outer wall of a lower portion of the pillar structure; and a word line...
US20150263160 SEMICONDUCTOR DEVICE WITH SELF-ALIGNED CONTACT ELEMENTS  
One method disclosed herein includes forming a sacrificial etch stop material in a recess above a replacement gate structure, with the sacrificial etch stop material in position, forming a...
US20150206897 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF  
A semiconductor device according to the embodiment includes a first stack structure. The first stack structure includes at least one first insulating film and a plurality of first conducting films...