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US20090283811 Flash memory device and methods of forming the same  
A flash memory device and/or methods of forming the flash memory device are provided, the flash memory device including a charge storage gate, a gate pattern over the charge storage gate, and a...
US20090278193 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME  
A nonvolatile semiconductor memory device includes a first stack unit with a first selection transistor and a second selection transistor formed on a semiconductor substrate and a second stack unit...
US20090278184 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE IN WHICH DECREASE IN COUPLING RATIO OF MEMORY CELLS IS SUPPRESSED  
A first insulation film is formed on a semiconductor substrate. A first gate electrode is formed on the first insulation film. A second insulation film is formed on an upper surface and a side...
US20090267128 THREE DIMENSIONAL STACKED NONVOLATILE SEMICONDUCTOR MEMORY  
A three dimensional stacked nonvolatile semiconductor memory according to an example of the present invention includes a memory cell array comprised of first and second blocks disposed side by side...
US20090267127 Single Poly NVM Devices and Arrays  
A single-poly non-volatile memory includes a PMOS select transistor ( 210 ) formed with a select gate ( 212 ), and P+ source and drain regions ( 211, 213 ) formed in a shared n-well region ( 240 ),...
US20090256187 SEMICONDUCTOR DEVICE HAVING VERTICAL PILLAR TRANSISTORS AND METHOD FOR MANUFACTURING THE SAME  
A semiconductor device includes vertical pillar transistors formed in respective silicon pillars of a silicon substrate. The gates of the vertical pillar transistor are selectively formed on a...
US20090256186 SPLIT GATE NON-VOLATILE MEMORY CELL  
A non-volatile memory (NVM) cell comprising a layer of discrete charge storing elements, a control gate, and a select gate is provided. The control gate has a first sidewall with a lower portion...
US20090250745 Memory devices and methods of forming and operating the same  
A memory device, including a first ground selection transistor, a first string selection transistor, and first memory cell transistors disposed in series between the first ground selection...
US20090250740 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME  
A semiconductor device has a semiconductor substrate in which a plurality of device regions and a plurality of device isolation regions are alternately formed to extend in a first direction; and a...
US20090236650 TANTALUM LANTHANIDE OXYNITRIDE FILMS  
Electronic apparatus and methods of forming the electronic apparatus include a tantalum lanthanide oxynitride film on a substrate for use in a variety of electronic systems. The tantalum lanthanide...
US20090230459 NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME  
A non-volatile semiconductor memory device includes a memory string which is electrically rewritable and includes a plurality of memory cells connected in series. The memory string includes a...
US20090230454 MEMORY ARRAY WITH A PAIR OF MEMORY-CELL STRINGS TO A SINGLE CONDUCTIVE PILLAR  
Memory arrays and methods of forming memory arrays are disclosed. One such memory array has a first string of serially-coupled first memory cells and a second string of serially-coupled second...
US20090230450 NON-VOLATILE SEMICONDUCTOR STORAGE DEVICE  
A non-volatile semiconductor storage device includes: a memory cell area in which a plurality of electrically rewritable memory cells are formed; and a peripheral circuit area in which transistors...
US20090225604 NON-VOLATILE MEMORY AND-ARRAY  
A non-volatile memory cell on a semiconductor substrate includes a first and a second transistor. Each transistor is arranged as a memory element that includes two diffusion regions capable of...
US20090207662 Multi-Transistor Non-Volatile Memory Element  
The present disclosure provides a multi-transistor element including a substrate, a first floating gate disposed on the substrate, a second floating gate disposed on the substrate and coupled to...
US20090184346 Nonvolatile memory and three-state FETs using cladded quantum dot gate structure  
The present invention discloses structures and method of fabricating cladded quantum dot gate nonvolatile memory and three-state field-effect transistor devices that can be scaled down to sub-22 nm...
US20090173983 SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME  
A semiconductor device, comprising: a substrate; a floating body region formed in the substrate, a gate electrode formed above a first surface region of the floating body region via a gate...
US20090146201 WORK FUNCTION ENGINEERING FOR FN ERAS OF A MEMORY DEVICE WITH MULTIPLE CHARGE STORAGE ELEMENTS IN AN UNDERCUT REGION  
A memory device comprised of a plurality of memory cells that can each include multiple charge storage elements in undercut regions that are formed under a tunneling barrier and adjacent to a gate...
US20090140313 Nonvolatile memory devices and methods of forming the same  
A method of forming nonvolatile memory devices according to example embodiments of the present invention includes forming a device isolation layer defining active regions in a semiconductor...
US20090140312 SEMICONDUCTOR STORAGE DEVICE AND MANUFACTURING METHOD THEREOF  
A semiconductor storage device include a semiconductor substrate, an insulating layer provided on the semiconductor substrate and having an opening, a semiconductor layer provided on the insulating...
US20090116287 OPERATION METHODS FOR MEMORY CELL AND ARRAY THEREOF IMMUNE TO PUNCHTHROUGH LEAKAGE  
An integrated circuit includes a memory cell structure including a first cell and a second cell. The first cell includes a first storage structure and a first gate over a substrate. The first gate...
US20090101959 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME  
According to an aspect of the present invention, there is provided a nonvolatile semiconductor memory device including: a semiconductor substrate; memory cell transistors that are series-connected;...
US20090096004 SEMICONDUCTOR STORAGE DEVICE AND MANUFACTURING METHOD THEREOF  
A semiconductor storage device includes: a substrate having a semiconductor layer at least on a surface thereof; and a plurality of quantum dot elements forming a charge storage layer formed above...
US20090090953 FLASH MEMORY DEVICE WITH STRAIGHT WORD LINES  
Embodiments of the present invention disclose a memory device having an array of flash memory cells with source contacts that facilitate straight word lines, and a method for producing the same....
US20090090952 PLASMA SURFACE TREATMENT FOR SI AND METAL NANOCRYSTAL NUCLEATION  
A device, such as a nonvolatile memory device, and methods for forming the device in an integrated process tool are provided. The method includes depositing a tunnel oxide layer on a substrate,...
US20090085088 SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME AS WELL AS DATA PROCESSING SYSTEM INCLUDING THE SEMICONDUCTOR DEVICE  
A semiconductor device includes low voltage and high voltage transistors over a substrate. The low voltage transistor is configured by at least one unit transistor. The high voltage transistor is...
US20090085087 LINER FOR TUNGSTEN/SILICON DIOXIDE INTERFACE IN MEMORY  
A semiconductor wafer assembly includes a base of dielectric. A layer of silicon is deposited thereover. A metal hard mask is deposited over the silicon. A dielectric hard mask is deposited over...
US20090080250 NONVOLATILE SEMICONDUCTOR STORAGE DEVICE AND OPERATION METHOD THEREOF  
A multi-valued nonvolatile semiconductor storage device and an operation method thereof capable of setting a plurality of positive levels having positive threshold voltages and a plurality of...
US20090065840 FLASH MEMORY AND MANUFACTURING METHOD OF THE SAME  
A flash memory and a manufacturing method of the same includes a shallow trench isolation and an active region formed at a substrate, a plurality of stacked gates formed on and/or over the active...
US20090057744 THICKENED SIDEWALL DIELECTRIC FOR MEMORY CELL  
Methods and devices are disclosed, such as those involving memory cell devices with improved charge retention characteristics. In one or more embodiments, a memory cell is provided having an active...
US20090057743 Integrated Circuit Including Structures Arranged at Different Densities and Method of Forming the Same  
A method of forming an integrated circuit includes forming first structures in a first portion of the integrated circuit and forming second structures, which are arranged more densely than the...
US20090045448 Non-volatile memory device and methods of forming the same  
Example embodiments provide a non-volatile memory device and methods of forming the same. The non-volatile memory device may define an active region in a semiconductor substrate, and may include a...
US20090045447 COMPLEX OXIDE NANODOTS  
Methods and devices are disclosed, such as those involving forming a charge trap for, e.g., a memory device, which can include flash memory cells. A substrate is exposed to temporally-separated...
US20090034341 Non-volatile memory devices and programming methods thereof including moving electrons through pad oxide layers between charge trap layers  
Non-volatile memory devices and methods of programming a non-volatile memory device in which electrons are moved between charge trap layers through a pad oxide layer are provided. The non-volatile...
US20090032858 LAYOUT AND STRUCTURE OF MEMORY  
A flash memory is provided. The flash memory features of having the select gate transistors to include two different channel structures, which are a recessed channel structure and a horizontal...
US20090026519 Capacitorless dram and methods of manufacturing and operating the same  
A capacitorless DRAM and methods of manufacturing and operating the same are provided. The capacitorless DRAM includes a source, a drain and a channel layer, formed on a substrate. A charge...
US20090020799 Semiconductor device and method of manufacturing the same  
One embodiment in accordance with the invention can include a semiconductor device that includes: a groove that is formed in a semiconductor substrate; bottom oxide films that are formed on both...
US20090014769 SUSPENDED-GATE MOS TRANSISTOR WITH NON-VOLATILE OPERATION  
A transistor device with a mobile suspended gate, the device comprising means for piezoelectric actuation of the gate, and a method for producing such a device.
US20080315278 Insulated Gate Field Effect Transistors  
The invention relates to FETs with stripe cells ( 6 ). Some of the cells have alternating low and high threshold regions ( 10, 8 ) along their length. In a linear operations regime, the low...
US20080308855 Memory devices with isolation structures and methods of forming and programming the same  
Memory devices and methods of programming and forming the same are disclosed. In one embodiment, a memory device has memory cells contained within dielectric isolation structures to isolate them...
US20080303080 BACK-SIDED TRAPPED NON-VOLATILE MEMORY DEVICE  
Non-volatile memory devices and arrays are described that utilize back-side trapped floating node memory cells with band-gap engineered gate stacks with asymmetric tunnel barriers. Embodiments of...
US20080303077 FLASH MEMORY WITH 4-BIT MEMORY CELL AND METHOD FOR FABRICATING THE SAME  
A memory device having at least one memory cell, and each memory cell is configured to store multiple bits. Each bit is stored in a charge storage layer of the memory cell. The memory device can...
US20080283894 Forming floating body RAM using bulk silicon substrate  
A method for forming Z-RAM cells and the resulting semiconductor structure are provided. The semiconductor structure includes a semiconductor substrate; a dielectric layer on the semiconductor...
US20080280410 SELF ALIGNED NARROW STORAGE ELEMENTS FOR ADVANCED MEMORY DEVICE  
A method of forming a sub-lithographic charge storage element on a semiconductor substrate is provided. The method can involve providing first and second layers on a semiconductor substrate, a...
US20080280409 Memory Arrays, Semiconductor Constructions And Electronic Systems; And Methods Of Forming Memory Arrays, Semiconductor Constructions And Electronic Systems  
Some embodiments include DRAM having transistor gates extending partially over SOI, and methods of forming such DRAM. Unit cells of the DRAM may be within active region pedestals, and in some...
US20080272423 Conductive structures, non-volatile memory device including conductive structures and methods of manufacturing the same  
Conductive structures in an integrated circuit device including an integrated circuit substrate and first conductive layer patterns on the substrate. Second conductive layer patterns are on the...
US20080258198 STABILIZATION OF FLATBAND VOLTAGES AND THRESHOLD VOLTAGES IN HAFNIUM OXIDE BASED SILICON TRANSISTORS FOR CMOS  
The present invention provides a metal stack structure that stabilizes the flatband voltage and threshold voltages of material stacks that include a Si-containing conductor and a Hf-based...
US20080251830 SEMICONDUCTOR STORAGE DEVICE AND DRIVING METHOD THEREOF  
This disclosure concerns a semiconductor storage device comprising a semiconductor layer provided on the insulation layer provided on the semiconductor substrate; a source layer and a drain layer...
US20080246073 Nonvolatile Memory Devices Including a Resistor Region  
Methods of forming a memory device include forming a device isolation layer in a semiconductor substrate including a cell array region and a resistor region, the device isolation layer extending...
US20080246072 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD OF THE SAME  
In a nonvolatile semiconductor memory device including a memory cell column formed by connecting in series a plurality of memory cells each having a structure in which a charge-storage layer and a...
Matches 1 - 50 out of 94 1 2 >