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US20050023583 Multi media card formed by transfer molding  
A semiconductor card is made by a method which in one molding step forms a plastic body on a substrate attached to a surrounding frame by narrow connecting segments spanning a peripheral opening....
US20130313623 THRESHOLD GATE AND THRESHOLD LOGIC ARRAY  
Threshold gates and related circuitry are disclosed. In one embodiment, a threshold gate includes a threshold realization element and a magnetic tunnel junction (MTJ) element. The MTJ element is...
US20070018214 Magnesium titanium oxide films  
Embodiments of a magnesium titanium oxide structure on a substrate provide a dielectric for use in a variety of electronic devices. Embodiments of methods of fabricating such a dielectric include...
US20150041873 Vertical Ferroelectric Field Effect Transistor Constructions, Constructions Comprising A Pair Of Vertical Ferroelectric Field Effect Transistors, Vertical Strings Of Ferroelectric Field Effect Transistors, And Vertical Strings Of Laterally Opposing Pairs Of Vertical Ferroelectric Field Effect Transistors  
A vertical ferroelectric field effect transistor construction comprises an isolating core. A transition metal dichalcogenide material encircles the isolating core and has a lateral wall thickness...
US20100327333 SPIN TRANSPORT DEVICE  
A spin transport device which comprises a channel, first and second insulating layers, a magnetization fixed layer, a magnetization free layer, first and second wirings, and satisfies at least one...
US20140254255 MRAM WTIH METAL GATE WRITE CONDUCTORS  
In one embodiment of the invention, there is provided a magnetic random access (MRAM) device. The device comprises a plurality of MRAM cells, wherein each MRAM cell comprises a magnetic bit, and...
US20070012975 Coated conductors  
Articles are provided including a base substrate having a layer of an IBAD oriented material thereon, and, a layer of barium-containing material selected from the group consisting of barium...
US20050269612 Solid-state component based on current-induced magnetization reversal  
A solid-state component including a network of multi-layer structures is described. Each multi-layer structure exhibits magnetoresistance and has magnetization vectors associated therewith which...
US20120074476 INTEGRATED CIRCUIT  
In accordance with an embodiment, an integrated circuit includes a circuit in which first and second spin transistors are connected in series. The first spin transistor has a first node and a...
US20140291744 SPIN FET AND MAGNETORESISTIVE ELEMENT  
A spin FET of an aspect of the present invention includes source/drain regions, a channel region between the source/drain regions, and a gate electrode above the channel region. Each of the...
US20130175588 COHERENT SPIN FIELD EFFECT TRANSISTOR  
A coherent spin field effect transistor is provided by depositing a ferromagnetic base like cobalt on a substrate. A magnetic oxide layer is formed on the cobalt by annealing at temperatures on...
US20150214323 ENGINEERING MULTIPLE THRESHOLD VOLTAGES IN AN INTEGRATED CIRCUIT  
An integrated circuit and method for forming an integrated circuit. There are at least three field-effect transistors with at least two of the field-effect transistors having the same electrically...
US20120086059 ENGINEERING MULTIPLE THRESHOLD VOLTAGES IN AN INTEGRATED CIRCUIT  
An integrated circuit and method for forming an integrated circuit. There are at least three field-effect transistors with at least two of the field-effect transistors having the same electrically...
US20070296007 Shared ground contact isolation structure for high-density magneto-resistive RAM  
A buried ground contact that connects the ground electrodes of transistors in adjacent memory cells that are separated by an isolation region is described. In some embodiments, the buried ground...
US20120018788 MAGNETIC STACK WITH LAMINATED LAYER  
A magnetic stack with a multilayer free layer having a switchable magnetization orientation, the free layer comprising a first ferromagnetic portion and a second ferromagnetic portion with an...
US20110084323 Transistor Performance Modification with Stressor Structures  
A transistor structure with stress enhancement geometry aligned above the channel region. Also, a transistor structure with stress enhancement geometries located above and aligned with opposite...
US20120056254 SPIN INJECTION ELECTRODE STRUCTURE, SPIN TRANSPORT ELEMENT, AND SPIN TRANSPORT DEVICE  
The present invention provides a spin injection electrode structure, a spin transport element, and a spin transport device which enable effective spin injection in a silicon channel layer at room...
US20070152254 Magnetic Transistor Structure  
A magnetic transistor includes a first magnetic section, a second magnetic section, a conductive section, a first metal terminal, and a second metal terminal. The conductive section is disposed...
US20050133841 Charge-dipole coupled information storage medium  
An information storage medium in which charges and electric dipoles are coupled with one another. The information storage medium includes a substrate, an electrode layer formed on the substrate, a...
US20050263808 Ferroelectric electron beam source and method for generating electron beams  
A comb-shaped electrode is formed on the main surface of a ferroelectric thin film and a planar electrode is formed on the rear surface of a ferroelectric thin film. Then, the property of the main...
US20090278182 SPIN INJECTOR  
A spin injector for use in a microelectronic device such as a field effect transistor (FET) is disclosed. The spin injector includes an array of ferromagnetic elements disposed within a...
US20120068235 INTEGRATED CIRCUIT  
In accordance with an embodiment, an integrated circuit includes a first spin transistor and a second spin transistor. The first spin transistor has a first channel length. The first spin...
US20140231888 Magneto-Electric Voltage Controlled Spin Transistors  
The invention relates to a magneto-electric spin-FET including a gate film of chromia and a thin film of a conductive channel material which may be graphene, InP, GaAs, GaSb, PbS, MoS2, WS2,...
US20130200446 SPIN-BASED DEVICE  
A spin-based device comprises a channel, first and second electrodes configured, in response to a bias configuration, to generate an electric field along the channel, and a spin injector arranged...
US20110147816 SPIN TORQUE MAGNETIC INTEGRATED CIRCUITS AND DEVICES THEREFOR  
Spin torque magnetic integrated circuits and devices therefor are described. A spin torque magnetic integrated circuit includes a first free ferromagnetic layer disposed above a substrate. A...
US20130240963 STT-MRAM Reference Layer Having Substantially Reduced Stray Field and Consisting of a Single Magnetic Domain  
An STT MTJ cell is formed with a magnetic anisotropy of its free and reference layers that is perpendicular to their planes of formation. The reference layer of the cell is an SAF multilayered...
US20140264514 COMPLEMENTARY SPIN DEVICE AND METHOD FOR OPERATION  
A complementary device including a gate electrode, a channel, a source electrode connected to the gate electrode and the channel, and a first drain electrode and a second drain electrode connected...
US20100072529 STACK HAVING HEUSLER ALLOY, MAGNETORESISTIVE ELEMENT AND SPIN TRANSISTOR USING THE STACK, AND METHOD OF MANUFACTURING THE SAME  
A stack includes a crystalline MgO layer, crystalline Heusler alloy layer, and amorphous Heusler alloy layer. The crystalline Heusler alloy layer is provided on the MgO layer. The amorphous...
US20070145449 Capacitor to be incorporated in wiring substrate, method for manufacturing the capacitor, and wiring substrate  
A wiring substrate in which a capacitor is provided, the capacitor comprising a capacitor body including a plurality of dielectric layers and internal electrode layers provided between the...
US20120007158 NON-VOLATILE MEMORY TRANSISTOR HAVING DOUBLE GATE STRUCTURE  
Provided is a non-volatile memory transistor having a double gate structure, including a first gate electrode formed on a substrate and to which an operating voltage is applied, a first gate...
US20070152252 Reducing aluminum dissolution in high pH solutions  
A method for reducing the dissolution of aluminum gate electrodes in a high pH clean chemistry comprises modifying the high pH clean chemistry to include a silanol-based chemical. The...
US20050191829 Solid material comprising a structure of almost-completely-polarised electronic orbitals, method of obtaining same and use thereof in electronics and nanoelectronics  
The invention relates to a solid material which is characterized in that the electrons of the conduction band are almost completely polarised in the selected orbital. The invention also relates to...
US20070164336 SPIN FET AND SPIN MEMORY  
A spin FET according to an example of the present invention includes a magnetic pinned layer whose magnetization direction is fixed, a magnetic free layer whose magnetization direction is changed,...
US20100019798 SPIN MOSFET AND RECONFIGURABLE LOGIC CIRCUIT USING THE SPIN MOSFET  
It is made possible to provide a spin MOSFET that can minimize the increase in production costs and can perform both spin injection writing and reading. A spin MOSFET includes: a substrate that...
US20100096678 NANOSTRUCTURED BARIUM STRONTIUM TITANATE (BST) THIN-FILM VARACTORS ON SAPPHIRE  
Varactor shunt switches based on a nonlinear dielectric tunability of BaxSr(1−x)TiO3 (BST) thin-film on a sapphire substrates are presented. Nanostructured BST thin-films with dielectric...
US20070029592 Oriented bismuth ferrite films grown on silicon and devices formed thereby  
A functional perovskite cell formed on a silicon substrate layer and including a functional layer of bismuth ferrite (BiFeO3 or BFO) sandwiched between two electrode layers. An intermediate...
US20100019297 Multi-Stacked Spin Transfer Torque Magnetic Random Access Memory and Method of Manufacturing the Same  
A spin transfer torque magnetic random access memory (STT-MRAM) device comprises adjacent magnetic tunneling junctions (MTJ), respectively, formed in different layers, thereby preventing...
US20110147723 ENHANCED E-FIELD SENSING USING NEGATIVE CAPACITANCE FET SUBTHRESHOLD SLOPE ENHANCEMENT  
In certain embodiments, a field effect transistor (FET) can include a substrate, a source electrode, a drain electrode, a ferroelectric material layer, a first gate electrode, and a second gate...
US20110233524 SPIN TRANSISTOR HAVING MULTIFERROIC GATE DIELECTRIC  
A carrier-mediated magnetic phase change spin transistor is disclosed. In general, the spin transistor includes a Dilute Magnetic Semiconductor (DMS) channel and a gate stack formed on the DMS...
US20150001601 SPIN INJECTION ELECTRODE STRUCTURE AND SPIN TRANSPORT ELEMENT HAVING THE SAME  
To provide a spin injection electrode structure capable of injecting spins into a semiconductor with high efficiency and a spin transport element having the same. Aluminum oxide containing a...
US20070040195 Monolithic integrated passive and active electronic devices with biocompatible coatings  
A bio-compatible electrical element including a high-dielectric amorphous TixAl1-xOy oxide alloy wherein a TiO2 layer is between the bio-compatible electrical element and a biological such as...
US20100140589 FERROELECTRIC TUNNEL FET SWITCH AND MEMORY  
A Ferroelectric tunnel FET switch as ultra-steep (abrupt) switch with subthreshold swing better than the MOSFET limit of 60 mV/decade at room temperature combining two key principles:...
US20110316058 FERRO-ELECTRIC CAPACITOR MODULES, METHODS OF MANUFACTURE AND DESIGN STRUCTURES  
Ferro-electric capacitor modules, methods of manufacture and design structures. The method of manufacturing the ferro-electric capacitor includes forming a barrier layer on an insulator layer of a...
US20150014755 JANUS COMPLEMENTARY MEMS TRANSISTORS AND CIRCUITS  
A method of fabricating an electromechanical device includes the following steps. A first and a second back gate are formed over a substrate. An etch stop layer is formed covering the first and...
US20100271112 SPIN TRANSISTOR AND METHOD OF OPERATING THE SAME  
Disclosed are a spin transistor and a method of operating the spin transistor. The disclosed spin transistor includes a channel formed of a magnetic material selectively passing a spin-polarized...
US20140027830 ACCESS TRANSISTOR WITH A BURIED GATE  
A magnetic memory cell is formed including a magneto tunnel junction (MTJ) and an access transistor, which is used to access the MTJ in operation. The access transistor, which is formed on a...
US20120241826 ACCESS TRANSISTOR WITH A BURIED GATE  
A magnetic memory cell is formed including a magneto tunnel junction (MTJ) and an access transistor, which is used to access the MTJ in operation. The access transistor, which is formed on a...
US20080121959 SEMICONDUCTOR DEVICE AND SEMICONDUCTOR PRODUCT  
The embodiments discussed herein reduce, in a semiconductor device having a ferroelectric capacitor, the film thickness of an interlayer insulation film covering the ferroelectric capacitor...
US20110031545 Spin transistor based on the spin-filter effect, and non-volatile memory using spin transistors  
A spin transistor comprises a spin injector for injecting, from a first nonmagnetic electrode carriers with a spin parallel to a spin band forming the band edge of a first ferromagnetic barrier...
US20130064011 STT-MRAM CELL STRUCTURE INCORPORATING PIEZOELECTRIC STRESS MATERIAL  
A magnetic memory cell including a piezoelectric material, and methods of operating the memory cell are provided. The memory cell includes a stack, and the piezoelectric material may be formed as...