Matches 1 - 50 out of 251 1 2 3 4 5 6 >
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US20090289375 Dual Stress Liner Device and Method  
A dual stress liner manufacturing method and device is described. Overlapping stress liner layers of opposite effect (e.g., tensile versus compression) may be deposited over portions of the device,...
US20090289285 Semiconductor device and method of fabricating the same  
Provided is a semiconductor device including a transistor that has a silicide layer formed over a semiconductor substrate. The gate electrode of each transistor is composed of a polysilicon...
US20090289284 High shrinkage stress silicon nitride (SiN) layer for NFET improvement  
A method (and semiconductor device) of forming a high shrinkage stressed silicon nitride layer for use as a contact etch stop layer (CESL) or capping layer in a stress management technique (SMT)...
US20090283806 MOSFET WITH ASYMMETRICAL EXTENSION IMPLANT  
A method for fabricating a MOSFET (e.g., a PMOS FET) includes providing a semiconductor substrate having surface characterized by a (110) surface orientation or (110) sidewall surfaces, forming a...
US20090278179 CHIP SCALE SURFACE MOUNT PACKAGE FOR SEMICONDUCTOR DEVICE AND PROCESS OF FABRICATING THE SAME  
A semiconductor package has contacts on both sides of the dice on a wafer scale. The back side of the wafer is attached to a metal plate. The scribe lines separating the dice expose the metal plate...
US20090278178 SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME  
Disclosed is a semiconductor device which includes a MIS FET on a surface of a substrate, an insulating film on the substrate to cover the MIS FET, an opening that gets to an impurity diffusing...
US20090273011 Metal-Oxide-Semiconductor Device Including an Energy Filter  
A MOS device includes first and second source/drains spaced apart relative to one another. A channel is formed in the device between the first and second source/drains. A gate is formed in the...
US20090273010 REMOVAL OF IMPURITIES FROM SEMICONDUCTOR DEVICE LAYERS  
A method for removing impurities from at least one semiconductor device layer during manufacturing of a semiconductor device is disclosed. The semiconductor device layer has a compound...
US20090267119 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE  
The semiconductor device includes a silicon substrate having a channel region, a gate electrode formed over the channel region, buried semiconductor regions formed in a surface of the silicon...
US20090267118 METHOD FOR FORMING CARBON SILICON ALLOY (CSA) AND STRUCTURES THEREOF  
Methods for forming carbon silicon alloy (CSA) and structures thereof are disclosed. The method provides improvement in substitutionality and deposition rate of carbon in epitaxially grown carbon...
US20090267117 ENHANCED STRESS FOR TRANSISTORS  
A transistor disposed on a substrate includes a gate, spacers on gate sidewalls, and diffusion regions adjacent to the gate. Silicide contacts on the diffusion regions are displaced from the...
US20090267114 FIELD EFFECT TRANSISTOR  
A field effect transistor 100 includes a group III-V nitride semiconductor layer structure containing a hetero junction, a source electrode 105 and a drain electrode 106 formed on the group...
US20090267113 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME  
A semiconductor device has a semiconductor base of a first conductivity type; a hetero semiconductor region in contact with the semiconductor base; a gate electrode adjacent to a portion of a...
US20090267055 TRANSISTOR, METHOD FOR MANUFACTURING SAME, AND SEMICONDUCTOR DEVICE COMPRISING SUCH TRANSISTOR  
The invention provides a process for production of a transistor that can form an oriented active layer by a convenient method while yielding a transistor with excellent carrier mobility. The...
US20090261391 Complementary Metal Oxide Semiconductor Integrated Circuit Using Raised Source Drain and Replacement Metal Gate  
A complementary metal oxide semiconductor integrated circuit may be formed with a PMOS device formed using a replacement metal gate and a raised source drain. The raised source drain may be formed...
US20090261390 SEMICONDUCTOR MEMORY DEVICE AND A METHOD OF MANUFACTURING THE SAME  
A memory cell of an SRAM has two drive MISFETs and two vertical MISFETs. The p channel vertical MISFETs are formed above the n channel drive MISFETs. The vertical MISFETs respectively mainly...
US20090261389 COMPOSITION FOR OXIDE SEMICONDUCTOR THIN FILM, FIELD EFFECT TRANSISTOR USING THE COMPOSITION, AND METHOD OF FABRICATING THE TRANSISTOR  
A composition for an oxide semiconductor thin film, a field effect transistor (FET) using the composition, and a method of fabricating the FET are provided. The composition includes an aluminum...
US20090261388 DICE BY GRIND FOR BACK SURFACE METALLIZED DIES  
Semiconductor device processing and methods for dicing a semiconductor wafer into a plurality of individual dies that can have back surface metallization are described. The methods comprise...
US20090261351 Silicon Carbide Devices Having Smooth Channels  
Power devices are provided including a p-type conductivity well region and a buried p + conductivity region in the p-type conductivity well region. An n + conductivity region is provided on the...
US20090261349 SEMICONDUCTOR DEVICE WITH STRAINED CHANNEL AND METHOD OF FABRICATING THE SAME  
A semiconductor device includes: a gate pattern over a substrate; recess patterns provided in the substrate at both sides of the gate pattern, each having a side surface extending below the gate...
US20090256178 SEMICONDUCTOR DEVICE HAVING MISFETS AND MANUFACTURING METHOD THEREOF  
A semiconductor device includes a dielectric film and gate electrode that are stacked on a substrate, sidewalls formed to cover the side surfaces of the electrode and dielectric film, and SiGe...
US20090256172 METHOD OF LASER ANNEALING SEMICONDUCTOR LAYER AND SEMICONDUCTOR DEVICES PRODUCED THEREBY  
A laser annealing method includes forming a nitrogen-doped layer on a semiconductor layer, the nitrogen-doped layer having a nitrogen concentration of at least 3×10 20 atoms/cc, irradiating a...
US20090256151 DISPLAY SUBSTRATE AND METHOD OF MANUFACTURING THE SAME  
A display substrate comprises a substrate; a source electrode arranged on the substrate; a drain electrode arranged on the substrate and spaced from the source electrode; a semiconductor layer...
US20090250732 Semiconductor device and method of fabricating the same  
In a method of fabricating a semiconductor device on a substrate having thereon a conductive layer, the conductive layer is patterned to form a plurality of opened regions. A gate insulation layer...
US20090250731 Field-effect transistor structure and fabrication method thereof  
A field-effect transistor (FET) structure is provided. The FET structure includes a gate substrate, a dielectric layer, conductive electrodes, and a carbon nanotube (CNT). The gate substrate is...
US20090242947 SEMICONDUCTOR DEVICE AND FABRICATION METHOD FOR THE SEMICONDUCTOR DEVICE  
A semiconductor device and a fabrication method for the semiconductor device which can remove the sacrifice layer deposited on the semiconductor device surface in a short time and whose...
US20090242946 SEMICONDUCTOR DEVICE AND FABRICATION METHOD FOR THE SEMICONDUCTOR DEVICE  
A semiconductor device which could strengthen the mechanical strength of the protective film and with which packaging of the wafer level with electric high reliability is performed and a...
US20090242945 Semiconductor device and method of fabricating the same  
In a method of fabricating a semiconductor device on a substrate having a pillar pattern, a gate electrode is formed on the pillar pattern without etching the latter. A conductive pattern is filled...
US20090242944 METHOD OF FORMING A SEMICONDUCTOR DEVICE USING STRESS MEMORIZATION  
A stress memorization technique (SMT) film is deposited over a semiconductor device. The SMT film is annealed with a low thermal budget anneal that is sufficient to create and transfer the stress...
US20090238000 SYSTEMS AND DEVICES INCLUDING MULTI-GATE TRANSISTORS AND METHODS OF USING, MAKING, AND OPERATING THE SAME  
Disclosed are methods, systems and devices, including a device having a digit line and a plurality of transistors each having one terminal connected to the digit line and another terminal disposed...
US20090237770 OPTICAL DEVICE INCLUDING GATE INSULATOR WITH MODULATED THICKNESS  
Provided is an optical device with improved phase shift and propagation loss of light without decreasing the dynamic characteristics of the optical device. The optical device includes a first...
US20090236642 TRANSISTOR AND CVD APPARATUS USED TO DEPOSIT GATE INSULATING FILM THEREOF  
In a transistor adapted to suppress characteristic degradation resulting from fluorine contained in a deposited film, the concentration of fluorine contained in a gate insulating film is reduced to...
US20090236641 Method of manufacturing semiconductor device for providing improved isolation between contact and cell gate electrode  
A manufacture method is provided for forming a semiconductor device. The method includes: forming a plurality of gate electrodes through etching a conductive film deposited on a semiconductor...
US20090236594 METHOD FOR FABRICATING AN INORGANIC NANOCOMPOSITE  
An inorganic nanocomposite is prepared by obtaining a solution of a soluble hydrazine-based metal chalcogenide precursor; dispersing a nanoentity in the precursor solution; applying a solution of...
US20090236593 ORGANIC THIN FILM TRANSISTOR AND PROCESS FOR MANUFACTURING SAME  
An organic thin film transistor includes a dielectric layer and an active layer overlapping the dielectric layer, a source contact and a drain contact arranged on a surface of the active layer...
US20090230442 Semiconductor apparatus and manufacturing method of the same  
Provided is a semiconductor apparatus including a substrate region, an active region on the substrate region, a gate pattern on the active region, and first and second impurities-doped regions...
US20090230441 Device and Method for Switching Electric Signals and Powers  
A device for switching an electric signal having a first member having a p-doped area with a first terminal and an n-doped area with a second terminal and a second member coupled to the first...
US20090230440 SINGLE EVENT TRANSIENT HARDENED MAJORITY CARRIER FIELD EFFECT TRANSISTOR  
Described herein is a majority carrier device. Specifically, an exemplary device may comprise source, channel, and drain regions in a thin semiconductor layer, and the source, channel, and drain...
US20090230439 Strain Bars in Stressed Layers of MOS Devices  
A semiconductor structure includes an active region; a gate strip overlying the active region; and a metal-oxide-semiconductor (MOS) device. A portion of the gate strip forms a gate of the MOS...
US20090230438 SELECTIVE NITRIDATION OF TRENCH ISOLATION SIDEWALL  
A method is provided of forming a trench isolation region adjacent to a single-crystal semiconductor region for a transistor. Such method can include, for example, recessing a single-crystal...
US20090224337 MOS Devices with Partial Stressor Channel  
A semiconductor structure includes a semiconductor substrate having a first lattice constant; a gate dielectric on the semiconductor substrate; a gate electrode on the semiconductor substrate; and...
US20090224297 SEMICONDUCTOR DEVICE HAVING A COMPRESSED DEVICE ISOLATION STRUCTURE  
The semiconductor device includes a lower device isolation structure formed in a semiconductor substrate to define an active region. The lower device isolation structure has a first compressive...
US20090224296 Methods, Systems and Structures for Forming Semiconductor Structures Incorporating High-Temperature Processing Steps  
A method ( 100 ) of forming semiconductor structures ( 202 ) including high-temperature processing steps (step 118 ), incorporates the use of a high-temperature nitride-oxide mask ( 220 ) over...
US20090224295 MOS TRANSISTOR MANUFACTURING  
A MOS transistor made in monolithic form, vias contacting the gate and the source and drain regions of the transistor being formed on the other side of the channel region with respect to the gate.
US20090224294 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME  
A method of manufacturing a semiconductor device includes the following processes. Multiple bit lines including a first silicide layer and/or a first polysilicon layer are formed. Then, multiple...
US20090224293 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME  
A semiconductor device includes: a sidewall insulating film; a gate electrode; source and drain regions; a first stress film; and a second stress film.
US20090224292 Thin film transistor and method of producing thin film transistor  
A method of producing a thin film transistor includes a gate electrode formation step that forms a gate electrode on a substrate, a gate insulating layer formation step that forms a gate insulating...
US20090224237 Semiconductor Device, Electronic Device, and Method of Manufacturing Semiconductor Device  
To provide a semiconductor device and a display device which can be manufactured through a simplified process and the manufacturing technique. Another object is to provide a technique by which a...
US20090218687 Semiconductor Chip with Passivation Layer Comprising Metal Interconnect and Contact Pads  
The invention provides a semiconductor chip comprising a semiconductor substrate comprising a MOS device, an interconnecting structure over said semiconductor substrate, and a metal bump over said...
US20090218605 Methods of Enhancing Performance of Field-Effect Transistors and Field-Effect Transistors Made Thereby  
Methods of enhancing the performance of a field-effect transistor (FET) by providing a percolating network of metallic islands to the inversion layer of the FET so as to effectively reduce the...
Matches 1 - 50 out of 251 1 2 3 4 5 6 >