Matches 1 - 35 out of 35
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US20090309137 FIELD EFFECT TRANSISTOR AND METHOD OF MANUFACTURE THEREOF  
A field effect transistor comprising a semiconductor substrate comprising an electrically conducting channel layer therein; a plurality of source and drain fingers on a first face of the substrate,...
US20090294804 HIGH-EFFICIENCY THINNED IMAGER WITH REDUCED BORON UPDIFFUSION  
A method for fabricating a back-illuminated semiconductor imaging device on an ultra-thin semiconductor-on-insulator wafer (UTSOI) is disclosed. The UTSOI wafer includes a mechanical substrate, an...
US20090294803 METHODS AND DEVICES FOR FABRICATING AND ASSEMBLING PRINTABLE SEMICONDUCTOR ELEMENTS  
The invention provides methods and devices for fabricating printable semiconductor elements and assembling printable semiconductor elements onto substrate surfaces. Methods, devices and device...
US20090256175 Method of doping transistor comprising carbon nanotube, method of controlling position of doping ion, and transistors using the same  
Provided are a method of doping a carbon nanotube (CNT) of a field effect transistor and a method of controlling the position of doping ions. The method may include providing a source, a drain, the...
US20090250727 SUPER JUNCTION SEMICONDUCTOR DEVICE  
In the specification and drawing a super junction semiconductor device is disclosed. The super junction semiconductor device comprises a P-type layer, a N + substrate, a N-type layer, a silicon...
US20090236666 Integrated Circuitry  
Some embodiments include formation of at least one cavity in a first semiconductor material, followed by epitaxially growing a second semiconductor material over the first semiconductor material...
US20090236603 PROCESS FOR FORMING A WIRING FILM, A TRANSISTOR, AND AN ELECTRONIC DEVICE  
A wiring film having excellent adhesion and a low resistance is formed. A barrier film having copper as a main component and containing oxygen is formed on an object to form a film thereon by...
US20090184322 ELECTROCONDUCTIVE FILM-FORMING METHOD, A THIN FILM TRANSISTOR, A THIN FILM TRANSISTOR-PROVIDED PANEL AND A THIN FILM TRANSISTOR-PRODUCING METHOD  
An electroconductive film having high adhesion and a low resistivity is formed. An electroconductive film composed mainly of copper and containing an addition metal such as Ti is formed by...
US20090184343 ISOLATION STRUCTURE, NON-VOLATILE MEMORY HAVING THE SAME, AND METHOD OF FABRICATING THE SAME  
A method of forming an isolation structure, comprising: (a) providing a base having a recess; (b) forming a stop layer on the base and in the recess; (c) forming a dielectric material on the stop...
US20090179230 Wiring Substrate, Semiconductor Device and Manufacturing Method Thereof  
The present invention provides a method for forming a wiring having a minute shape on a large substrate with a small number of steps, and further a wiring substrate formed by the method. Moreover,...
US20090174428 PROGRAMMABLE ELEMENT, AND MEMORY DEVICE OR LOGIC CIRCUIT  
A multi-terminal programmable element. The programmable element includes a source electrode and a drain electrode on a base. The programmable element includes reference voltage contact that is not...
US20090166719 LDMOS SEMICONDUCTOR DEVICE MASK  
Embodiments relate to an LDMOS semiconductor device mask that may reduce current leakage under a gate-off condition. According to embodiments, an LDMOS semiconductor device mask may include a moat...
US20090135229 ELEMENT SUBSTRATE, PRINTHEAD, AND HEAD CARTRIDGE  
This invention provides an element substrate having a heater selection circuit normally operable even in the use of voltage conversion circuits, which are arranged along the nozzle arrayed...
US20090127588 PATTERNING TECHNIQUES  
A method of forming a patterned layer, including the steps of: (i) depositing via a liquid medium a first material onto a substrate to form a first body on said substrate; (ii) depositing via a...
US20090020786 SEMICONDUCTOR DEVICE  
A method for forming a semiconductor device on a substrate having a first major surface lying in a plane and the semiconductor device are disclosed. In one aspect, the method comprises, after...
US20080290378 Transistor package with wafer level dielectric isolation  
A low cost transistor package is provided for high power applications. The package provides high thermal conductivity and dissipation for a silicon transistor die, high current carrying capability...
US20080283874 Field-Effect Transistors  
The present invention provides a field-effect transistor and method for the fabrication of a field-effect transistor by deposition on a substrate ( 480 ), which method comprises a wet chemical...
US20080277694 SEMICONDUCTOR COMPONENT AND METHOD OF MANUFACTURE  
A semiconductor component that includes a Schottky device, an edge termination structure, a non-Schottky semiconductor device, combinations thereof and a method of manufacturing the semiconductor...
US20080185615 Method and Apparatus for Double-Sided Biasing of Nonvolatile Memory  
Methods and apparatuses are disclosed for biasing the source-side and the drain-side of a nonvolatile memory to add electrons to the charge trapping structure.
US20080173901 CMOS DEVICES HAVING CHANNEL REGIONS WITH A V-SHAPED TRENCH AND HYBRID CHANNEL ORIENTATIONS, AND METHOD FOR FORMING THE SAME  
The present invention relates to a field effect transistor (FET) containing a channel extending perpendicularly across at least one V-shaped trench and along the interior surfaces thereof. In one...
US20080142849 Semiconductor ESD device and method of making same  
An ESD protection device includes a semiconductor body, a gate formed over a channel in the semiconductor body, the channel being doped with a first concentration of dopants of a first conductivity...
US20080142850 MEMORY ELEMENTS AND CROSS POINT SWITCHES AND ARRAYS OF SAME USING NONVOLATILE NANOTUBE BLOCKS  
Under one aspect, a covered nanotube switch includes: (a) a nanotube element including an unaligned plurality of nanotubes, the nanotube element having a top surface, a bottom surface, and side...
US20080116492 High voltage GaN transistors  
A multiple field plate transistor includes an active region, with a source, a drain, and a gate. A first spacer layer is over the active region between the source and the gate and a second spacer...
US20080099791 Memory Cell Device with Circumferentially-Extending Memory Element  
A memory cell device, including a memory material switchable between electrical property states by the application of energy, has bottom and top electrode members and a dielectric material between...
US20080099757 Organic field effect transistor and semiconductor device  
It is an object to provide an organic field effect transistor including an electrode which can reduce an energy barrier at an interface between a conductive layer and a semiconductor layer, and a...
US20080087921 Image sensor device suitable for use with logic-embedded CIS chips and methods for making the same  
An image sensor device is provided. A substrate has a photosensor region formed therein and/or thereon. An interconnection structure is formed over the substrate, and includes metal lines formed in...
US20080079029 Multi-terminal electrically actuated switch  
A multi-terminal electrically actuated switch comprises a source electrode, a drain electrode, and an active region physically connected to both electrodes. The active region comprises at least one...
US20080067613 FIELD EFFECT TRANSISTOR WITH RAISED SOURCE/DRAIN FIN STRAPS  
Therefore, disclosed above are embodiments of a multi-fin field effect transistor structure (e.g., a multi-fin dual-gate FET or tri-gate FET) that provides low resistance strapping of the...
US20080061322 Transistor, memory cell array and method of manufacturing a transistor  
A transistor includes a first and second source/drain regions, a channel connecting the first and second source/drain regions, and a gate electrode to control an electrical current flowing in the...
US20080054309 HIGH VOLTAGE DEVICE AND MANUFACTURING METHOD THEREOF  
A high voltage device includes a semiconductor substrate and a gate. The semiconductor substrate includes a first doped region having a first conductive type, a second doped region having a second...
US20080017890 Highly dense monolithic three dimensional memory array and method for forming  
A method to form a highly dense monolithic three dimensional memory array is provided. In preferred embodiments, conductive or semiconductor spacers can be formed, then used as hard masks to...
US20080012047 Two-terminal nanotube devices and systems and methods of making same  
A two terminal switching device includes first and second conductive terminals and a nanotube article. The article has at least one nanotube, and overlaps at least a portion of each of the first...
US20080006849 FABRICATING METHOD OF NITRIDE SEMICONDUCTOR SUBSTRATE AND COMPOSITE MATERIAL SUBSTRATE  
A fabricating method of nitride semiconductor substrate is provided. First, a first substrate including a first base material, a nitride semiconductor template layer stacked on the first base...
US20080006850 System and method for forming through wafer vias using reverse pulse plating  
A method for forming through wafer vias in a substrate uses a Cr/Au seed layer to plate the bottom of a blind trench formed in the front side of a substrate. Thereafter, a reverse plating process...
US20080001178 TRANSISTOR HAVING A CHANNEL WITH BIAXIAL STRAIN INDUCED BY SILICON/GERMANIUM IN THE GATE ELECTRODE  
By forming a stressed semiconductor material in a gate electrode, a biaxial tensile strain may be induced in the channel region, thereby significantly increasing the charge carrier mobility. This...
Matches 1 - 35 out of 35